2 * © Copyright 2017-2018 Alyssa Rosenzweig
3 * © Copyright 2017-2018 Connor Abbott
4 * © Copyright 2017-2018 Lyude Paul
5 * © Copyright2019 Collabora, Ltd.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
28 #ifndef __PANFROST_JOB_H__
29 #define __PANFROST_JOB_H__
32 #include <panfrost-misc.h>
34 #define MALI_SHORT_PTR_BITS (sizeof(u64)*8)
36 #define MALI_FBD_HIERARCHY_WEIGHTS 8
38 #define MALI_PAYLOAD_SIZE 256
40 typedef u32 mali_jd_core_req
;
45 JOB_TYPE_SET_VALUE
= 2,
46 JOB_TYPE_CACHE_FLUSH
= 3,
49 JOB_TYPE_GEOMETRY
= 6,
52 JOB_TYPE_FRAGMENT
= 9,
59 MALI_LINE_STRIP
= 0x4,
62 MALI_TRIANGLE_STRIP
= 0xA,
63 MALI_TRIANGLE_FAN
= 0xC,
66 MALI_QUAD_STRIP
= 0xF,
68 /* All other modes invalid */
71 /* Applies to tiler_gl_enables */
74 #define MALI_OCCLUSION_QUERY (1 << 3)
75 #define MALI_OCCLUSION_PRECISE (1 << 4)
77 /* Set for a glFrontFace(GL_CCW) in a Y=0=TOP coordinate system (like Gallium).
78 * In OpenGL, this would corresponds to glFrontFace(GL_CW). Mesa and the blob
79 * disagree about how to do viewport flipping, so the blob actually sets this
80 * for GL_CW but then has a negative viewport stride */
81 #define MALI_FRONT_CCW_TOP (1 << 5)
83 #define MALI_CULL_FACE_FRONT (1 << 6)
84 #define MALI_CULL_FACE_BACK (1 << 7)
86 /* TODO: Might this actually be a finer bitfield? */
87 #define MALI_DEPTH_STENCIL_ENABLE 0x6400
89 #define DS_ENABLE(field) \
90 (field == MALI_DEPTH_STENCIL_ENABLE) \
91 ? "MALI_DEPTH_STENCIL_ENABLE" \
92 : (field == 0) ? "0" \
93 : "0 /* XXX: Unknown, check hexdump */"
95 /* Used in stencil and depth tests */
101 MALI_FUNC_LEQUAL
= 3,
102 MALI_FUNC_GREATER
= 4,
103 MALI_FUNC_NOTEQUAL
= 5,
104 MALI_FUNC_GEQUAL
= 6,
108 /* Same OpenGL, but mixed up. Why? Because forget me, that's why! */
111 MALI_ALT_FUNC_NEVER
= 0,
112 MALI_ALT_FUNC_GREATER
= 1,
113 MALI_ALT_FUNC_EQUAL
= 2,
114 MALI_ALT_FUNC_GEQUAL
= 3,
115 MALI_ALT_FUNC_LESS
= 4,
116 MALI_ALT_FUNC_NOTEQUAL
= 5,
117 MALI_ALT_FUNC_LEQUAL
= 6,
118 MALI_ALT_FUNC_ALWAYS
= 7
121 /* Flags apply to unknown2_3? */
123 #define MALI_HAS_MSAA (1 << 0)
124 #define MALI_CAN_DISCARD (1 << 5)
126 /* Applies on SFBD systems, specifying that programmable blending is in use */
127 #define MALI_HAS_BLEND_SHADER (1 << 6)
129 /* func is mali_func */
130 #define MALI_DEPTH_FUNC(func) (func << 8)
131 #define MALI_GET_DEPTH_FUNC(flags) ((flags >> 8) & 0x7)
132 #define MALI_DEPTH_FUNC_MASK MALI_DEPTH_FUNC(0x7)
134 #define MALI_DEPTH_TEST (1 << 11)
136 /* Next flags to unknown2_4 */
137 #define MALI_STENCIL_TEST (1 << 0)
140 #define MALI_SAMPLE_ALPHA_TO_COVERAGE_NO_BLEND_SHADER (1 << 1)
142 #define MALI_NO_DITHER (1 << 9)
143 #define MALI_DEPTH_RANGE_A (1 << 12)
144 #define MALI_DEPTH_RANGE_B (1 << 13)
145 #define MALI_NO_MSAA (1 << 14)
147 /* Stencil test state is all encoded in a single u32, just with a lot of
150 enum mali_stencil_op
{
151 MALI_STENCIL_KEEP
= 0,
152 MALI_STENCIL_REPLACE
= 1,
153 MALI_STENCIL_ZERO
= 2,
154 MALI_STENCIL_INVERT
= 3,
155 MALI_STENCIL_INCR_WRAP
= 4,
156 MALI_STENCIL_DECR_WRAP
= 5,
157 MALI_STENCIL_INCR
= 6,
158 MALI_STENCIL_DECR
= 7
161 struct mali_stencil_test
{
164 enum mali_func func
: 3;
165 enum mali_stencil_op sfail
: 3;
166 enum mali_stencil_op dpfail
: 3;
167 enum mali_stencil_op dppass
: 3;
169 } __attribute__((packed
));
171 #define MALI_MASK_R (1 << 0)
172 #define MALI_MASK_G (1 << 1)
173 #define MALI_MASK_B (1 << 2)
174 #define MALI_MASK_A (1 << 3)
176 enum mali_nondominant_mode
{
177 MALI_BLEND_NON_MIRROR
= 0,
178 MALI_BLEND_NON_ZERO
= 1
181 enum mali_dominant_blend
{
182 MALI_BLEND_DOM_SOURCE
= 0,
183 MALI_BLEND_DOM_DESTINATION
= 1
186 enum mali_dominant_factor
{
187 MALI_DOMINANT_UNK0
= 0,
188 MALI_DOMINANT_ZERO
= 1,
189 MALI_DOMINANT_SRC_COLOR
= 2,
190 MALI_DOMINANT_DST_COLOR
= 3,
191 MALI_DOMINANT_UNK4
= 4,
192 MALI_DOMINANT_SRC_ALPHA
= 5,
193 MALI_DOMINANT_DST_ALPHA
= 6,
194 MALI_DOMINANT_CONSTANT
= 7,
197 enum mali_blend_modifier
{
198 MALI_BLEND_MOD_UNK0
= 0,
199 MALI_BLEND_MOD_NORMAL
= 1,
200 MALI_BLEND_MOD_SOURCE_ONE
= 2,
201 MALI_BLEND_MOD_DEST_ONE
= 3,
204 struct mali_blend_mode
{
205 enum mali_blend_modifier clip_modifier
: 2;
206 unsigned unused_0
: 1;
207 unsigned negate_source
: 1;
209 enum mali_dominant_blend dominant
: 1;
211 enum mali_nondominant_mode nondominant_mode
: 1;
213 unsigned unused_1
: 1;
215 unsigned negate_dest
: 1;
217 enum mali_dominant_factor dominant_factor
: 3;
218 unsigned complement_dominant
: 1;
219 } __attribute__((packed
));
221 struct mali_blend_equation
{
222 /* Of type mali_blend_mode */
223 unsigned rgb_mode
: 12;
224 unsigned alpha_mode
: 12;
228 /* Corresponds to MALI_MASK_* above and glColorMask arguments */
230 unsigned color_mask
: 4;
231 } __attribute__((packed
));
233 /* Used with channel swizzling */
235 MALI_CHANNEL_RED
= 0,
236 MALI_CHANNEL_GREEN
= 1,
237 MALI_CHANNEL_BLUE
= 2,
238 MALI_CHANNEL_ALPHA
= 3,
239 MALI_CHANNEL_ZERO
= 4,
240 MALI_CHANNEL_ONE
= 5,
241 MALI_CHANNEL_RESERVED_0
= 6,
242 MALI_CHANNEL_RESERVED_1
= 7,
245 struct mali_channel_swizzle
{
246 enum mali_channel r
: 3;
247 enum mali_channel g
: 3;
248 enum mali_channel b
: 3;
249 enum mali_channel a
: 3;
250 } __attribute__((packed
));
252 /* Compressed per-pixel formats. Each of these formats expands to one to four
253 * floating-point or integer numbers, as defined by the OpenGL specification.
254 * There are various places in OpenGL where the user can specify a compressed
255 * format in memory, which all use the same 8-bit enum in the various
256 * descriptors, although different hardware units support different formats.
259 /* The top 3 bits specify how the bits of each component are interpreted. */
261 /* e.g. R11F_G11F_B10F */
262 #define MALI_FORMAT_SPECIAL (2 << 5)
264 /* signed normalized, e.g. RGBA8_SNORM */
265 #define MALI_FORMAT_SNORM (3 << 5)
268 #define MALI_FORMAT_UINT (4 << 5)
270 /* e.g. RGBA8 and RGBA32F */
271 #define MALI_FORMAT_UNORM (5 << 5)
273 /* e.g. RGBA8I and RGBA16F */
274 #define MALI_FORMAT_SINT (6 << 5)
276 /* These formats seem to largely duplicate the others. They're used at least
277 * for Bifrost framebuffer output.
279 #define MALI_FORMAT_SPECIAL2 (7 << 5)
281 /* If the high 3 bits are 3 to 6 these two bits say how many components
284 #define MALI_NR_CHANNELS(n) ((n - 1) << 3)
286 /* If the high 3 bits are 3 to 6, then the low 3 bits say how big each
287 * component is, except the special MALI_CHANNEL_FLOAT which overrides what the
291 #define MALI_CHANNEL_4 2
293 #define MALI_CHANNEL_8 3
295 #define MALI_CHANNEL_16 4
297 #define MALI_CHANNEL_32 5
299 /* For MALI_FORMAT_SINT it means a half-float (e.g. RG16F). For
300 * MALI_FORMAT_UNORM, it means a 32-bit float.
302 #define MALI_CHANNEL_FLOAT 7
305 MALI_RGB565
= MALI_FORMAT_SPECIAL
| 0x0,
306 MALI_RGB5_A1_UNORM
= MALI_FORMAT_SPECIAL
| 0x2,
307 MALI_RGB10_A2_UNORM
= MALI_FORMAT_SPECIAL
| 0x3,
308 MALI_RGB10_A2_SNORM
= MALI_FORMAT_SPECIAL
| 0x5,
309 MALI_RGB10_A2UI
= MALI_FORMAT_SPECIAL
| 0x7,
310 MALI_RGB10_A2I
= MALI_FORMAT_SPECIAL
| 0x9,
313 MALI_NV12
= MALI_FORMAT_SPECIAL
| 0xc,
315 MALI_Z32_UNORM
= MALI_FORMAT_SPECIAL
| 0xD,
316 MALI_R32_FIXED
= MALI_FORMAT_SPECIAL
| 0x11,
317 MALI_RG32_FIXED
= MALI_FORMAT_SPECIAL
| 0x12,
318 MALI_RGB32_FIXED
= MALI_FORMAT_SPECIAL
| 0x13,
319 MALI_RGBA32_FIXED
= MALI_FORMAT_SPECIAL
| 0x14,
320 MALI_R11F_G11F_B10F
= MALI_FORMAT_SPECIAL
| 0x19,
321 MALI_R9F_G9F_B9F_E5F
= MALI_FORMAT_SPECIAL
| 0x1b,
322 /* Only used for varyings, to indicate the transformed gl_Position */
323 MALI_VARYING_POS
= MALI_FORMAT_SPECIAL
| 0x1e,
324 /* Only used for varyings, to indicate that the write should be
327 MALI_VARYING_DISCARD
= MALI_FORMAT_SPECIAL
| 0x1f,
329 MALI_R8_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_8
,
330 MALI_R16_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_16
,
331 MALI_R32_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_32
,
332 MALI_RG8_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_8
,
333 MALI_RG16_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_16
,
334 MALI_RG32_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_32
,
335 MALI_RGB8_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_8
,
336 MALI_RGB16_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_16
,
337 MALI_RGB32_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_32
,
338 MALI_RGBA8_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_8
,
339 MALI_RGBA16_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_16
,
340 MALI_RGBA32_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_32
,
342 MALI_R8UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_8
,
343 MALI_R16UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_16
,
344 MALI_R32UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_32
,
345 MALI_RG8UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_8
,
346 MALI_RG16UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_16
,
347 MALI_RG32UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_32
,
348 MALI_RGB8UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_8
,
349 MALI_RGB16UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_16
,
350 MALI_RGB32UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_32
,
351 MALI_RGBA8UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_8
,
352 MALI_RGBA16UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_16
,
353 MALI_RGBA32UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_32
,
355 MALI_R8_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_8
,
356 MALI_R16_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_16
,
357 MALI_R32_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_32
,
358 MALI_R32F
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_FLOAT
,
359 MALI_RG8_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_8
,
360 MALI_RG16_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_16
,
361 MALI_RG32_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_32
,
362 MALI_RG32F
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_FLOAT
,
363 MALI_RGB8_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_8
,
364 MALI_RGB16_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_16
,
365 MALI_RGB32_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_32
,
366 MALI_RGB32F
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_FLOAT
,
367 MALI_RGBA4_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_4
,
368 MALI_RGBA8_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_8
,
369 MALI_RGBA16_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_16
,
370 MALI_RGBA32_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_32
,
371 MALI_RGBA32F
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_FLOAT
,
373 MALI_R8I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_8
,
374 MALI_R16I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_16
,
375 MALI_R32I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_32
,
376 MALI_R16F
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_FLOAT
,
377 MALI_RG8I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_8
,
378 MALI_RG16I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_16
,
379 MALI_RG32I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_32
,
380 MALI_RG16F
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_FLOAT
,
381 MALI_RGB8I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_8
,
382 MALI_RGB16I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_16
,
383 MALI_RGB32I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_32
,
384 MALI_RGB16F
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_FLOAT
,
385 MALI_RGBA8I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_8
,
386 MALI_RGBA16I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_16
,
387 MALI_RGBA32I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_32
,
388 MALI_RGBA16F
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_FLOAT
,
390 MALI_RGBA4
= MALI_FORMAT_SPECIAL2
| 0x8,
391 MALI_RGBA8_2
= MALI_FORMAT_SPECIAL2
| 0xd,
392 MALI_RGB10_A2_2
= MALI_FORMAT_SPECIAL2
| 0xe,
396 /* Alpha coverage is encoded as 4-bits (from a clampf), with inversion
397 * literally performing a bitwise invert. This function produces slightly wrong
398 * results and I'm not sure why; some rounding issue I suppose... */
400 #define MALI_ALPHA_COVERAGE(clampf) ((uint16_t) (int) (clampf * 15.0f))
401 #define MALI_GET_ALPHA_COVERAGE(nibble) ((float) nibble / 15.0f)
403 /* Applies to midgard1.flags */
405 /* Should the hardware perform early-Z testing? Normally should be set
406 * for performance reasons. Clear if you use: discard,
407 * alpha-to-coverage... * It's also possible this disables
408 * forward-pixel kill; we're not quite sure which bit is which yet.
409 * TODO: How does this interact with blending?*/
411 #define MALI_EARLY_Z (1 << 6)
413 /* Should the hardware calculate derivatives (via helper invocations)? Set in a
414 * fragment shader that uses texturing or derivative functions */
416 #define MALI_HELPER_INVOCATIONS (1 << 7)
418 /* Flags denoting the fragment shader's use of tilebuffer readback. If the
419 * shader might read any part of the tilebuffer, set MALI_READS_TILEBUFFER. If
420 * it might read depth/stencil in particular, also set MALI_READS_ZS */
422 #define MALI_READS_ZS (1 << 8)
423 #define MALI_READS_TILEBUFFER (1 << 12)
425 /* The raw Midgard blend payload can either be an equation or a shader
426 * address, depending on the context */
428 union midgard_blend
{
432 struct mali_blend_equation equation
;
437 /* On MRT Midgard systems (using an MFBD), each render target gets its own
438 * blend descriptor */
440 #define MALI_BLEND_SRGB (0x400)
442 /* Dithering is specified here for MFBD, otherwise NO_DITHER for SFBD */
443 #define MALI_BLEND_NO_DITHER (0x800)
445 struct midgard_blend_rt
{
446 /* Flags base value of 0x200 to enable the render target.
447 * OR with 0x1 for blending (anything other than REPLACE).
448 * OR with 0x2 for programmable blending with 0-2 registers
449 * OR with 0x3 for programmable blending with 2+ registers
450 * OR with MALI_BLEND_SRGB for implicit sRGB
454 union midgard_blend blend
;
455 } __attribute__((packed
));
457 /* On Bifrost systems (all MRT), each render target gets one of these
460 struct bifrost_blend_rt
{
461 /* This is likely an analogue of the flags on
462 * midgard_blend_rt */
464 u16 flags
; // = 0x200
466 /* Single-channel blend constants are encoded in a sort of
467 * fixed-point. Basically, the float is mapped to a byte, becoming
468 * a high byte, and then the lower-byte is added for precision.
469 * For the original float f:
471 * f = (constant_hi / 255) + (constant_lo / 65535)
473 * constant_hi = int(f / 255)
474 * constant_lo = 65535*f - (65535/255) * constant_hi
479 struct mali_blend_equation equation
;
482 * - 0x3 when this slot is unused (everything else is 0 except the index)
483 * - 0x11 when this is the fourth slot (and it's used)
484 + * - 0 when there is a blend shader
487 /* increments from 0 to 3 */
492 /* So far, I've only seen:
493 * - R001 for 1-component formats
494 * - RG01 for 2-component formats
495 * - RGB1 for 3-component formats
496 * - RGBA for 4-component formats
499 enum mali_format format
: 8;
501 /* Type of the shader output variable. Note, this can
502 * be different from the format.
504 * 0: f16 (mediump float)
505 * 1: f32 (highp float)
507 * 3: u32 (highp uint)
508 * 4: i16 (mediump int)
509 * 5: u16 (mediump uint)
515 /* Only the low 32 bits of the blend shader are stored, the
516 * high 32 bits are implicitly the same as the original shader.
517 * According to the kernel driver, the program counter for
518 * shaders is actually only 24 bits, so shaders cannot cross
519 * the 2^24-byte boundary, and neither can the blend shader.
520 * The blob handles this by allocating a 2^24 byte pool for
521 * shaders, and making sure that any blend shaders are stored
522 * in the same pool as the original shader. The kernel will
523 * make sure this allocation is aligned to 2^24 bytes.
527 } __attribute__((packed
));
529 /* Descriptor for the shader. Following this is at least one, up to four blend
530 * descriptors for each active render target */
532 struct mali_shader_meta
{
541 u32 uniform_buffer_count
: 4;
542 u32 unk1
: 28; // = 0x800000 for vertex, 0x958020 for tiler
545 unsigned uniform_buffer_count
: 4;
548 /* Whole number of uniform registers used, times two;
549 * whole number of work registers used (no scale).
551 unsigned work_count
: 5;
552 unsigned uniform_count
: 5;
553 unsigned unknown2
: 6;
557 /* Same as glPolygoOffset() arguments */
566 u8 stencil_mask_front
;
567 u8 stencil_mask_back
;
570 struct mali_stencil_test stencil_front
;
571 struct mali_stencil_test stencil_back
;
576 /* On Bifrost, some system values are preloaded in
577 * registers R55-R62 by the thread dispatcher prior to
578 * the start of shader execution. This is a bitfield
579 * with one entry for each register saying which
580 * registers need to be preloaded. Right now, the known
584 * - R55 : gl_LocalInvocationID.xy
585 * - R56 : gl_LocalInvocationID.z + unknown in high 16 bits
586 * - R57 : gl_WorkGroupID.x
587 * - R58 : gl_WorkGroupID.y
588 * - R59 : gl_WorkGroupID.z
589 * - R60 : gl_GlobalInvocationID.x
590 * - R61 : gl_GlobalInvocationID.y/gl_VertexID (without base)
591 * - R62 : gl_GlobalInvocationID.z/gl_InstanceID (without base)
594 * - R55 : unknown, never seen (but the bit for this is
596 * - R56 : unknown (bit always unset)
597 * - R57 : gl_PrimitiveID
598 * - R58 : gl_FrontFacing in low bit, potentially other stuff
599 * - R59 : u16 fragment coordinates (used to compute
600 * gl_FragCoord.xy, together with sample positions)
601 * - R60 : gl_SampleMask (used in epilog, so pretty
602 * much always used, but the bit is always 0 -- is
603 * this just always pushed?)
604 * - R61 : gl_SampleMaskIn and gl_SampleID, used by
605 * varying interpolation.
606 * - R62 : unknown (bit always unset).
608 u32 preload_regs
: 8;
609 /* In units of 8 bytes or 64 bits, since the
610 * uniform/const port loads 64 bits at a time.
612 u32 uniform_count
: 7;
613 u32 unk4
: 10; // = 2
620 /* zero on bifrost */
623 /* Blending information for the older non-MRT Midgard HW. Check for
624 * MALI_HAS_BLEND_SHADER to decide how to interpret.
627 union midgard_blend blend
;
628 } __attribute__((packed
));
630 /* This only concerns hardware jobs */
632 /* Possible values for job_descriptor_size */
634 #define MALI_JOB_32 0
635 #define MALI_JOB_64 1
637 struct mali_job_descriptor_header
{
638 u32 exception_status
;
639 u32 first_incomplete_task
;
641 u8 job_descriptor_size
: 1;
642 enum mali_job_type job_type
: 7;
644 u8 unknown_flags
: 7;
646 u16 job_dependency_index_1
;
647 u16 job_dependency_index_2
;
653 } __attribute__((packed
));
655 struct mali_payload_set_value
{
658 } __attribute__((packed
));
660 /* Special attributes have a fixed index */
661 #define MALI_SPECIAL_ATTRIBUTE_BASE 16
662 #define MALI_VERTEX_ID (MALI_SPECIAL_ATTRIBUTE_BASE + 0)
663 #define MALI_INSTANCE_ID (MALI_SPECIAL_ATTRIBUTE_BASE + 1)
668 * This structure lets the attribute unit compute the address of an attribute
669 * given the vertex and instance ID. Unfortunately, the way this works is
670 * rather complicated when instancing is enabled.
672 * To explain this, first we need to explain how compute and vertex threads are
673 * dispatched. This is a guess (although a pretty firm guess!) since the
674 * details are mostly hidden from the driver, except for attribute instancing.
675 * When a quad is dispatched, it receives a single, linear index. However, we
676 * need to translate that index into a (vertex id, instance id) pair, or a
677 * (local id x, local id y, local id z) triple for compute shaders (although
678 * vertex shaders and compute shaders are handled almost identically).
679 * Focusing on vertex shaders, one option would be to do:
681 * vertex_id = linear_id % num_vertices
682 * instance_id = linear_id / num_vertices
684 * but this involves a costly division and modulus by an arbitrary number.
685 * Instead, we could pad num_vertices. We dispatch padded_num_vertices *
686 * num_instances threads instead of num_vertices * num_instances, which results
687 * in some "extra" threads with vertex_id >= num_vertices, which we have to
688 * discard. The more we pad num_vertices, the more "wasted" threads we
689 * dispatch, but the division is potentially easier.
691 * One straightforward choice is to pad num_vertices to the next power of two,
692 * which means that the division and modulus are just simple bit shifts and
693 * masking. But the actual algorithm is a bit more complicated. The thread
694 * dispatcher has special support for dividing by 3, 5, 7, and 9, in addition
695 * to dividing by a power of two. This is possibly using the technique
696 * described in patent US20170010862A1. As a result, padded_num_vertices can be
697 * 1, 3, 5, 7, or 9 times a power of two. This results in less wasted threads,
698 * since we need less padding.
700 * padded_num_vertices is picked by the hardware. The driver just specifies the
701 * actual number of vertices. At least for Mali G71, the first few cases are
704 * num_vertices | padded_num_vertices
711 * Note that padded_num_vertices is a multiple of four (presumably because
712 * threads are dispatched in groups of 4). Also, padded_num_vertices is always
713 * at least one more than num_vertices, which seems like a quirk of the
714 * hardware. For larger num_vertices, the hardware uses the following
715 * algorithm: using the binary representation of num_vertices, we look at the
716 * most significant set bit as well as the following 3 bits. Let n be the
717 * number of bits after those 4 bits. Then we set padded_num_vertices according
718 * to the following table:
720 * high bits | padded_num_vertices
727 * For example, if num_vertices = 70 is passed to glDraw(), its binary
728 * representation is 1000110, so n = 3 and the high bits are 1000, and
729 * therefore padded_num_vertices = 9 * 2^3 = 72.
731 * The attribute unit works in terms of the original linear_id. if
732 * num_instances = 1, then they are the same, and everything is simple.
733 * However, with instancing things get more complicated. There are four
734 * possible modes, two of them we can group together:
736 * 1. Use the linear_id directly. Only used when there is no instancing.
738 * 2. Use the linear_id modulo a constant. This is used for per-vertex
739 * attributes with instancing enabled by making the constant equal
740 * padded_num_vertices. Because the modulus is always padded_num_vertices, this
741 * mode only supports a modulus that is a power of 2 times 1, 3, 5, 7, or 9.
742 * The shift field specifies the power of two, while the extra_flags field
743 * specifies the odd number. If shift = n and extra_flags = m, then the modulus
744 * is (2m + 1) * 2^n. As an example, if num_vertices = 70, then as computed
745 * above, padded_num_vertices = 9 * 2^3, so we should set extra_flags = 4 and
746 * shift = 3. Note that we must exactly follow the hardware algorithm used to
747 * get padded_num_vertices in order to correctly implement per-vertex
750 * 3. Divide the linear_id by a constant. In order to correctly implement
751 * instance divisors, we have to divide linear_id by padded_num_vertices times
752 * to user-specified divisor. So first we compute padded_num_vertices, again
753 * following the exact same algorithm that the hardware uses, then multiply it
754 * by the GL-level divisor to get the hardware-level divisor. This case is
755 * further divided into two more cases. If the hardware-level divisor is a
756 * power of two, then we just need to shift. The shift amount is specified by
757 * the shift field, so that the hardware-level divisor is just 2^shift.
759 * If it isn't a power of two, then we have to divide by an arbitrary integer.
760 * For that, we use the well-known technique of multiplying by an approximation
761 * of the inverse. The driver must compute the magic multiplier and shift
762 * amount, and then the hardware does the multiplication and shift. The
763 * hardware and driver also use the "round-down" optimization as described in
764 * http://ridiculousfish.com/files/faster_unsigned_division_by_constants.pdf.
765 * The hardware further assumes the multiplier is between 2^31 and 2^32, so the
766 * high bit is implicitly set to 1 even though it is set to 0 by the driver --
767 * presumably this simplifies the hardware multiplier a little. The hardware
768 * first multiplies linear_id by the multiplier and takes the high 32 bits,
769 * then applies the round-down correction if extra_flags = 1, then finally
770 * shifts right by the shift field.
772 * There are some differences between ridiculousfish's algorithm and the Mali
773 * hardware algorithm, which means that the reference code from ridiculousfish
774 * doesn't always produce the right constants. Mali does not use the pre-shift
775 * optimization, since that would make a hardware implementation slower (it
776 * would have to always do the pre-shift, multiply, and post-shift operations).
777 * It also forces the multplier to be at least 2^31, which means that the
778 * exponent is entirely fixed, so there is no trial-and-error. Altogether,
779 * given the divisor d, the algorithm the driver must follow is:
781 * 1. Set shift = floor(log2(d)).
782 * 2. Compute m = ceil(2^(shift + 32) / d) and e = 2^(shift + 32) % d.
783 * 3. If e <= 2^shift, then we need to use the round-down algorithm. Set
784 * magic_divisor = m - 1 and extra_flags = 1.
785 * 4. Otherwise, set magic_divisor = m and extra_flags = 0.
787 * Unrelated to instancing/actual attributes, images (the OpenCL kind) are
788 * implemented as special attributes, denoted by MALI_ATTR_IMAGE. For images,
789 * let shift=extra_flags=0. Stride is set to the image format's bytes-per-pixel
790 * (*NOT the row stride*). Size is set to the size of the image itself.
793 enum mali_attr_mode
{
794 MALI_ATTR_UNUSED
= 0,
795 MALI_ATTR_LINEAR
= 1,
796 MALI_ATTR_POT_DIVIDE
= 2,
797 MALI_ATTR_MODULO
= 3,
798 MALI_ATTR_NPOT_DIVIDE
= 4,
802 /* This magic "pseudo-address" is used as `elements` to implement
803 * gl_PointCoord. When read from a fragment shader, it generates a point
804 * coordinate per the OpenGL ES 2.0 specification. Flipped coordinate spaces
805 * require an affine transformation in the shader. */
807 #define MALI_VARYING_POINT_COORD (0x60)
810 /* This is used for actual attributes. */
812 /* The bottom 3 bits are the mode */
813 mali_ptr elements
: 64 - 8;
819 /* The entry after an NPOT_DIVIDE entry has this format. It stores
820 * extra information that wouldn't fit in a normal entry.
823 u32 unk
; /* = 0x20 */
826 /* This is the original, GL-level divisor. */
829 } __attribute__((packed
));
831 struct mali_attr_meta
{
832 /* Vertex buffer index */
835 unsigned unknown1
: 2;
836 unsigned swizzle
: 12;
837 enum mali_format format
: 8;
839 /* Always observed to be zero at the moment */
840 unsigned unknown3
: 2;
842 /* When packing multiple attributes in a buffer, offset addresses by
843 * this value. Obscurely, this is signed. */
845 } __attribute__((packed
));
853 #define FBD_MASK (~0x3f)
855 struct mali_uniform_buffer_meta
{
856 /* This is actually the size minus 1 (MALI_POSITIVE), in units of 16
857 * bytes. This gives a maximum of 2^14 bytes, which just so happens to
858 * be the GL minimum-maximum for GL_MAX_UNIFORM_BLOCK_SIZE.
862 /* This is missing the bottom 2 bits and top 8 bits. The top 8 bits
863 * should be 0 for userspace pointers, according to
864 * https://lwn.net/Articles/718895/. By reusing these bits, we can make
865 * each entry in the table only 64 bits.
867 mali_ptr ptr
: 64 - 10;
870 /* On Bifrost, these fields are the same between the vertex and tiler payloads.
871 * They also seem to be the same between Bifrost and Midgard. They're shared in
875 /* Applies to unknown_draw */
877 #define MALI_DRAW_INDEXED_UINT8 (0x10)
878 #define MALI_DRAW_INDEXED_UINT16 (0x20)
879 #define MALI_DRAW_INDEXED_UINT32 (0x30)
880 #define MALI_DRAW_VARYING_SIZE (0x100)
881 #define MALI_DRAW_PRIMITIVE_RESTART_FIXED_INDEX (0x10000)
883 struct mali_vertex_tiler_prefix
{
884 /* This is a dynamic bitfield containing the following things in this order:
886 * - gl_WorkGroupSize.x
887 * - gl_WorkGroupSize.y
888 * - gl_WorkGroupSize.z
889 * - gl_NumWorkGroups.x
890 * - gl_NumWorkGroups.y
891 * - gl_NumWorkGroups.z
893 * The number of bits allocated for each number is based on the *_shift
894 * fields below. For example, workgroups_y_shift gives the bit that
895 * gl_NumWorkGroups.y starts at, and workgroups_z_shift gives the bit
896 * that gl_NumWorkGroups.z starts at (and therefore one after the bit
897 * that gl_NumWorkGroups.y ends at). The actual value for each gl_*
898 * value is one more than the stored value, since if any of the values
899 * are zero, then there would be no invocations (and hence no job). If
900 * there were 0 bits allocated to a given field, then it must be zero,
901 * and hence the real value is one.
903 * Vertex jobs reuse the same job dispatch mechanism as compute jobs,
904 * effectively doing glDispatchCompute(1, vertex_count, instance_count)
905 * where vertex count is the number of vertices.
907 u32 invocation_count
;
909 u32 size_y_shift
: 5;
910 u32 size_z_shift
: 5;
911 u32 workgroups_x_shift
: 6;
912 u32 workgroups_y_shift
: 6;
913 u32 workgroups_z_shift
: 6;
914 /* This is max(workgroups_x_shift, 2) in all the cases I've seen. */
915 u32 workgroups_x_shift_2
: 4;
918 u32 unknown_draw
: 22;
920 /* This is the the same as workgroups_x_shift_2 in compute shaders, but
921 * always 5 for vertex jobs and 6 for tiler jobs. I suspect this has
922 * something to do with how many quads get put in the same execution
923 * engine, which is a balance (you don't want to starve the engine, but
924 * you also want to distribute work evenly).
926 u32 workgroups_x_shift_3
: 6;
929 /* Negative of draw_start for TILER jobs from what I've seen */
930 int32_t negative_start
;
933 /* Like many other strictly nonzero quantities, index_count is
934 * subtracted by one. For an indexed cube, this is equal to 35 = 6
935 * faces * 2 triangles/per face * 3 vertices/per triangle - 1. That is,
936 * for an indexed draw, index_count is the number of actual vertices
937 * rendered whereas invocation_count is the number of unique vertices
938 * rendered (the number of times the vertex shader must be invoked).
939 * For non-indexed draws, this is just equal to invocation_count. */
943 /* No hidden structure; literally just a pointer to an array of uint
944 * indices (width depends on flags). Thanks, guys, for not making my
945 * life insane for once! NULL for non-indexed draws. */
948 } __attribute__((packed
));
950 /* Point size / line width can either be specified as a 32-bit float (for
951 * constant size) or as a [machine word size]-bit GPU pointer (for varying size). If a pointer
952 * is selected, by setting the appropriate MALI_DRAW_VARYING_SIZE bit in the tiler
953 * payload, the contents of varying_pointer will be intepreted as an array of
954 * fp16 sizes, one for each vertex. gl_PointSize is therefore implemented by
955 * creating a special MALI_R16F varying writing to varying_pointer. */
957 union midgard_primitive_size
{
962 struct bifrost_vertex_only
{
968 } __attribute__((packed
));
970 struct bifrost_tiler_heap_meta
{
973 /* note: these are just guesses! */
974 mali_ptr tiler_heap_start
;
975 mali_ptr tiler_heap_free
;
976 mali_ptr tiler_heap_end
;
978 /* hierarchy weights? but they're still 0 after the job has run... */
980 } __attribute__((packed
));
982 struct bifrost_tiler_meta
{
989 mali_ptr tiler_heap_meta
;
990 /* TODO what is this used for? */
992 } __attribute__((packed
));
994 struct bifrost_tiler_only
{
996 union midgard_primitive_size primitive_size
;
1000 u64 zero1
, zero2
, zero3
, zero4
, zero5
, zero6
;
1005 } __attribute__((packed
));
1007 struct bifrost_scratchpad
{
1009 u32 flags
; // = 0x1f
1010 /* This is a pointer to a CPU-inaccessible buffer, 16 pages, allocated
1011 * during startup. It seems to serve the same purpose as the
1012 * gpu_scratchpad in the SFBD for Midgard, although it's slightly
1015 mali_ptr gpu_scratchpad
;
1016 } __attribute__((packed
));
1018 struct mali_vertex_tiler_postfix
{
1019 /* Zero for vertex jobs. Pointer to the position (gl_Position) varying
1020 * output from the vertex shader for tiler jobs.
1023 u64 position_varying
;
1025 /* An array of mali_uniform_buffer_meta's. The size is given by the
1028 u64 uniform_buffers
;
1030 /* This is a pointer to an array of pointers to the texture
1031 * descriptors, number of pointers bounded by number of textures. The
1032 * indirection is needed to accomodate varying numbers and sizes of
1033 * texture descriptors */
1034 u64 texture_trampoline
;
1036 /* For OpenGL, from what I've seen, this is intimately connected to
1037 * texture_meta. cwabbott says this is not the case under Vulkan, hence
1038 * why this field is seperate (Midgard is Vulkan capable). Pointer to
1039 * array of sampler descriptors (which are uniform in size) */
1040 u64 sampler_descriptor
;
1044 u64 _shader_upper
: MALI_SHORT_PTR_BITS
- 4; /* struct shader_meta */
1045 u64 attributes
; /* struct attribute_buffer[] */
1046 u64 attribute_meta
; /* attribute_meta[] */
1047 u64 varyings
; /* struct attr */
1048 u64 varying_meta
; /* pointer */
1050 u64 occlusion_counter
; /* A single bit as far as I can tell */
1052 /* Note: on Bifrost, this isn't actually the FBD. It points to
1053 * bifrost_scratchpad instead. However, it does point to the same thing
1054 * in vertex and tiler jobs.
1056 mali_ptr framebuffer
;
1057 } __attribute__((packed
));
1059 struct midgard_payload_vertex_tiler
{
1060 struct mali_vertex_tiler_prefix prefix
;
1062 u16 gl_enables
; // 0x5
1064 /* Both zero for non-instanced draws. For instanced draws, a
1065 * decomposition of padded_num_vertices. See the comments about the
1066 * corresponding fields in mali_attr for context. */
1068 unsigned instance_shift
: 5;
1069 unsigned instance_odd
: 3;
1073 /* Offset for first vertex in buffer */
1078 struct mali_vertex_tiler_postfix postfix
;
1080 union midgard_primitive_size primitive_size
;
1081 } __attribute__((packed
));
1083 struct bifrost_payload_vertex
{
1084 struct mali_vertex_tiler_prefix prefix
;
1085 struct bifrost_vertex_only vertex
;
1086 struct mali_vertex_tiler_postfix postfix
;
1087 } __attribute__((packed
));
1089 struct bifrost_payload_tiler
{
1090 struct mali_vertex_tiler_prefix prefix
;
1091 struct bifrost_tiler_only tiler
;
1092 struct mali_vertex_tiler_postfix postfix
;
1093 } __attribute__((packed
));
1095 struct bifrost_payload_fused
{
1096 struct mali_vertex_tiler_prefix prefix
;
1097 struct bifrost_tiler_only tiler
;
1098 struct mali_vertex_tiler_postfix tiler_postfix
;
1099 u64 padding
; /* zero */
1100 struct bifrost_vertex_only vertex
;
1101 struct mali_vertex_tiler_postfix vertex_postfix
;
1102 } __attribute__((packed
));
1104 /* Purposeful off-by-one in width, height fields. For example, a (64, 64)
1105 * texture is stored as (63, 63) in these fields. This adjusts for that.
1106 * There's an identical pattern in the framebuffer descriptor. Even vertex
1107 * count fields work this way, hence the generic name -- integral fields that
1108 * are strictly positive generally need this adjustment. */
1110 #define MALI_POSITIVE(dim) (dim - 1)
1112 /* Opposite of MALI_POSITIVE, found in the depth_units field */
1114 #define MALI_NEGATIVE(dim) (dim + 1)
1116 /* Used with wrapping. Incomplete (this is a 4-bit field...) */
1118 enum mali_wrap_mode
{
1119 MALI_WRAP_REPEAT
= 0x8,
1120 MALI_WRAP_CLAMP_TO_EDGE
= 0x9,
1121 MALI_WRAP_CLAMP_TO_BORDER
= 0xB,
1122 MALI_WRAP_MIRRORED_REPEAT
= 0xC
1125 /* Shared across both command stream and Midgard, and even with Bifrost */
1127 enum mali_texture_type
{
1128 MALI_TEX_CUBE
= 0x0,
1135 #define MAX_MIP_LEVELS (13)
1137 /* Cubemap bloats everything up */
1138 #define MAX_CUBE_FACES (6)
1140 /* For each pointer, there is an address and optionally also a stride */
1141 #define MAX_ELEMENTS (2)
1143 /* Corresponds to the type passed to glTexImage2D and so forth */
1145 /* Flags for usage2 */
1146 #define MALI_TEX_MANUAL_STRIDE (0x20)
1148 struct mali_texture_format
{
1149 unsigned swizzle
: 12;
1150 enum mali_format format
: 8;
1153 unsigned unknown1
: 1;
1155 enum mali_texture_type type
: 2;
1157 unsigned usage2
: 8;
1158 } __attribute__((packed
));
1160 struct mali_texture_descriptor
{
1164 uint16_t array_size
;
1166 struct mali_texture_format format
;
1170 /* One for non-mipmapped, zero for mipmapped */
1173 /* Zero for non-mipmapped, (number of levels - 1) for mipmapped */
1174 uint8_t nr_mipmap_levels
;
1176 /* Swizzling is a single 32-bit word, broken up here for convenience.
1177 * Here, swizzling refers to the ES 3.0 texture parameters for channel
1178 * level swizzling, not the internal pixel-level swizzling which is
1179 * below OpenGL's reach */
1181 unsigned swizzle
: 12;
1182 unsigned swizzle_zero
: 20;
1188 mali_ptr payload
[MAX_MIP_LEVELS
* MAX_CUBE_FACES
* MAX_ELEMENTS
];
1189 } __attribute__((packed
));
1193 #define MALI_SAMP_MAG_NEAREST (1 << 0)
1194 #define MALI_SAMP_MIN_NEAREST (1 << 1)
1196 /* TODO: What do these bits mean individually? Only seen set together */
1198 #define MALI_SAMP_MIP_LINEAR_1 (1 << 3)
1199 #define MALI_SAMP_MIP_LINEAR_2 (1 << 4)
1201 /* Used for lod encoding. Thanks @urjaman for pointing out these routines can
1202 * be cleaned up a lot. */
1204 #define DECODE_FIXED_16(x) ((float) (x / 256.0))
1206 static inline uint16_t
1209 /* Clamp inputs, accounting for float error */
1210 float max_lod
= (32.0 - (1.0 / 512.0));
1212 x
= ((x
> max_lod
) ? max_lod
: ((x
< 0.0) ? 0.0 : x
));
1214 return (int) (x
* 256.0);
1217 struct mali_sampler_descriptor
{
1218 uint32_t filter_mode
;
1220 /* Fixed point. Upper 8-bits is before the decimal point, although it
1221 * caps [0-31]. Lower 8-bits is after the decimal point: int(round(x *
1227 /* All one word in reality, but packed a bit */
1229 enum mali_wrap_mode wrap_s
: 4;
1230 enum mali_wrap_mode wrap_t
: 4;
1231 enum mali_wrap_mode wrap_r
: 4;
1232 enum mali_alt_func compare_func
: 3;
1234 /* No effect on 2D textures. For cubemaps, set for ES3 and clear for
1235 * ES2, controlling seamless cubemapping */
1236 unsigned seamless_cube_map
: 1;
1241 float border_color
[4];
1242 } __attribute__((packed
));
1244 /* viewport0/viewport1 form the arguments to glViewport. viewport1 is
1245 * modified by MALI_POSITIVE; viewport0 is as-is.
1248 struct mali_viewport
{
1249 /* XY clipping planes */
1255 /* Depth clipping planes */
1261 } __attribute__((packed
));
1263 /* From presentations, 16x16 tiles externally. Use shift for fast computation
1264 * of tile numbers. */
1266 #define MALI_TILE_SHIFT 4
1267 #define MALI_TILE_LENGTH (1 << MALI_TILE_SHIFT)
1269 /* Tile coordinates are stored as a compact u32, as only 12 bits are needed to
1270 * each component. Notice that this provides a theoretical upper bound of (1 <<
1271 * 12) = 4096 tiles in each direction, addressing a maximum framebuffer of size
1272 * 65536x65536. Multiplying that together, times another four given that Mali
1273 * framebuffers are 32-bit ARGB8888, means that this upper bound would take 16
1274 * gigabytes of RAM just to store the uncompressed framebuffer itself, let
1275 * alone rendering in real-time to such a buffer.
1279 /* From mali_kbase_10969_workaround.c */
1280 #define MALI_X_COORD_MASK 0x00000FFF
1281 #define MALI_Y_COORD_MASK 0x0FFF0000
1283 /* Extract parts of a tile coordinate */
1285 #define MALI_TILE_COORD_X(coord) ((coord) & MALI_X_COORD_MASK)
1286 #define MALI_TILE_COORD_Y(coord) (((coord) & MALI_Y_COORD_MASK) >> 16)
1287 #define MALI_TILE_COORD_FLAGS(coord) ((coord) & ~(MALI_X_COORD_MASK | MALI_Y_COORD_MASK))
1289 /* No known flags yet, but just in case...? */
1291 #define MALI_TILE_NO_FLAG (0)
1293 /* Helpers to generate tile coordinates based on the boundary coordinates in
1294 * screen space. So, with the bounds (0, 0) to (128, 128) for the screen, these
1295 * functions would convert it to the bounding tiles (0, 0) to (7, 7).
1296 * Intentional "off-by-one"; finding the tile number is a form of fencepost
1299 #define MALI_MAKE_TILE_COORDS(X, Y) ((X) | ((Y) << 16))
1300 #define MALI_BOUND_TO_TILE(B, bias) ((B - bias) >> MALI_TILE_SHIFT)
1301 #define MALI_COORDINATE_TO_TILE(W, H, bias) MALI_MAKE_TILE_COORDS(MALI_BOUND_TO_TILE(W, bias), MALI_BOUND_TO_TILE(H, bias))
1302 #define MALI_COORDINATE_TO_TILE_MIN(W, H) MALI_COORDINATE_TO_TILE(W, H, 0)
1303 #define MALI_COORDINATE_TO_TILE_MAX(W, H) MALI_COORDINATE_TO_TILE(W, H, 1)
1305 struct mali_payload_fragment
{
1308 mali_ptr framebuffer
;
1309 } __attribute__((packed
));
1311 /* Single Framebuffer Descriptor */
1313 /* Flags apply to format. With just MSAA_A and MSAA_B, the framebuffer is
1314 * configured for 4x. With MSAA_8, it is configured for 8x. */
1316 #define MALI_FRAMEBUFFER_MSAA_8 (1 << 3)
1317 #define MALI_FRAMEBUFFER_MSAA_A (1 << 4)
1318 #define MALI_FRAMEBUFFER_MSAA_B (1 << 23)
1320 /* Fast/slow based on whether all three buffers are cleared at once */
1322 #define MALI_CLEAR_FAST (1 << 18)
1323 #define MALI_CLEAR_SLOW (1 << 28)
1324 #define MALI_CLEAR_SLOW_STENCIL (1 << 31)
1326 /* Configures hierarchical tiling on Midgard for both SFBD/MFBD (embedded
1327 * within the larget framebuffer descriptor). Analogous to
1328 * bifrost_tiler_heap_meta and bifrost_tiler_meta*/
1330 struct midgard_tiler_descriptor
{
1331 /* Size of the entire polygon list; see pan_tiler.c for the
1332 * computation. It's based on hierarchical tiling */
1334 u32 polygon_list_size
;
1336 /* Name known from the replay workaround in the kernel. What exactly is
1337 * flagged here is less known. We do that (tiler_hierarchy_mask & 0x1ff)
1338 * specifies a mask of hierarchy weights, which explains some of the
1339 * performance mysteries around setting it. We also see the bottom bit
1340 * of tiler_flags set in the kernel, but no comment why. */
1345 /* See mali_tiler.c for an explanation */
1346 mali_ptr polygon_list
;
1347 mali_ptr polygon_list_body
;
1349 /* Names based on we see symmetry with replay jobs which name these
1352 mali_ptr heap_start
; /* tiler heap_free_address */
1355 /* Hierarchy weights. We know these are weights based on the kernel,
1356 * but I've never seen them be anything other than zero */
1360 struct mali_single_framebuffer
{
1363 u64 unknown_address_0
;
1367 /* Exact format is ironically not known, since EGL is finnicky with the
1368 * blob. MSAA, colourspace, etc are configured here. */
1375 /* Purposeful off-by-one in these fields should be accounted for by the
1376 * MALI_DIMENSION macro */
1383 /* By default, the framebuffer is upside down from OpenGL's
1384 * perspective. Set framebuffer to the end and negate the stride to
1385 * flip in the Y direction */
1387 mali_ptr framebuffer
;
1392 /* Depth and stencil buffers are interleaved, it appears, as they are
1393 * set to the same address in captures. Both fields set to zero if the
1394 * buffer is not being cleared. Depending on GL_ENABLE magic, you might
1395 * get a zero enable despite the buffer being present; that still is
1398 mali_ptr depth_buffer
; // not SAME_VA
1399 u64 depth_buffer_enable
;
1401 mali_ptr stencil_buffer
; // not SAME_VA
1402 u64 stencil_buffer_enable
;
1404 u32 clear_color_1
; // RGBA8888 from glClear, actually used by hardware
1405 u32 clear_color_2
; // always equal, but unclear function?
1406 u32 clear_color_3
; // always equal, but unclear function?
1407 u32 clear_color_4
; // always equal, but unclear function?
1409 /* Set to zero if not cleared */
1411 float clear_depth_1
; // float32, ditto
1412 float clear_depth_2
; // float32, ditto
1413 float clear_depth_3
; // float32, ditto
1414 float clear_depth_4
; // float32, ditto
1416 u32 clear_stencil
; // Exactly as it appears in OpenGL
1420 struct midgard_tiler_descriptor tiler
;
1422 /* More below this, maybe */
1423 } __attribute__((packed
));
1425 /* On Midgard, this "framebuffer descriptor" is used for the framebuffer field
1426 * of compute jobs. Superficially resembles a single framebuffer descriptor */
1428 struct mali_compute_fbd
{
1430 } __attribute__((packed
));
1432 /* Format bits for the render target flags */
1434 #define MALI_MFBD_FORMAT_MSAA (1 << 1)
1435 #define MALI_MFBD_FORMAT_SRGB (1 << 2)
1437 enum mali_mfbd_block_format
{
1438 MALI_MFBD_BLOCK_TILED
= 0x0,
1439 MALI_MFBD_BLOCK_UNKNOWN
= 0x1,
1440 MALI_MFBD_BLOCK_LINEAR
= 0x2,
1441 MALI_MFBD_BLOCK_AFBC
= 0x3,
1444 struct mali_rt_format
{
1448 unsigned nr_channels
: 2; /* MALI_POSITIVE */
1451 enum mali_mfbd_block_format block
: 2;
1454 unsigned swizzle
: 12;
1457 } __attribute__((packed
));
1459 struct bifrost_render_target
{
1460 struct mali_rt_format format
;
1466 /* Stuff related to ARM Framebuffer Compression. When AFBC is enabled,
1467 * there is an extra metadata buffer that contains 16 bytes per tile.
1468 * The framebuffer needs to be the same size as before, since we don't
1469 * know ahead of time how much space it will take up. The
1470 * framebuffer_stride is set to 0, since the data isn't stored linearly
1475 u32 stride
; // stride in units of tiles
1476 u32 unk
; // = 0x20000
1480 /* Heck if I know */
1486 mali_ptr framebuffer
;
1489 u32 framebuffer_stride
: 28; // in units of bytes
1492 u32 clear_color_1
; // RGBA8888 from glClear, actually used by hardware
1493 u32 clear_color_2
; // always equal, but unclear function?
1494 u32 clear_color_3
; // always equal, but unclear function?
1495 u32 clear_color_4
; // always equal, but unclear function?
1496 } __attribute__((packed
));
1498 /* An optional part of bifrost_framebuffer. It comes between the main structure
1499 * and the array of render targets. It must be included if any of these are
1502 * - Transaction Elimination
1504 * - TODO: Anything else?
1507 /* Flags field: note, these are guesses */
1509 #define MALI_EXTRA_PRESENT (0x400)
1510 #define MALI_EXTRA_AFBC (0x20)
1511 #define MALI_EXTRA_AFBC_ZS (0x10)
1512 #define MALI_EXTRA_ZS (0x4)
1514 struct bifrost_fb_extra
{
1516 /* Each tile has an 8 byte checksum, so the stride is "width in tiles * 8" */
1517 u32 checksum_stride
;
1522 /* Note: AFBC is only allowed for 24/8 combined depth/stencil. */
1524 mali_ptr depth_stencil_afbc_metadata
;
1525 u32 depth_stencil_afbc_stride
; // in units of tiles
1528 mali_ptr depth_stencil
;
1534 /* Depth becomes depth/stencil in case of combined D/S */
1536 u32 depth_stride_zero
: 4;
1537 u32 depth_stride
: 28;
1541 u32 stencil_stride_zero
: 4;
1542 u32 stencil_stride
: 28;
1549 } __attribute__((packed
));
1551 /* Flags for mfbd_flags */
1553 /* Enables writing depth results back to main memory (rather than keeping them
1554 * on-chip in the tile buffer and then discarding) */
1556 #define MALI_MFBD_DEPTH_WRITE (1 << 10)
1558 /* The MFBD contains the extra bifrost_fb_extra section */
1560 #define MALI_MFBD_EXTRA (1 << 13)
1562 struct bifrost_framebuffer
{
1565 u32 unknown2
; // = 0x1f, same as SFBD
1566 mali_ptr scratchpad
;
1569 mali_ptr sample_locations
;
1572 u16 width1
, height1
;
1574 u16 width2
, height2
;
1575 u32 unk1
: 19; // = 0x01000
1576 u32 rt_count_1
: 2; // off-by-one (use MALI_POSITIVE)
1577 u32 unk2
: 3; // = 0
1578 u32 rt_count_2
: 3; // no off-by-one
1581 u32 clear_stencil
: 8;
1582 u32 mfbd_flags
: 24; // = 0x100
1585 struct midgard_tiler_descriptor tiler
;
1587 /* optional: struct bifrost_fb_extra extra */
1588 /* struct bifrost_render_target rts[] */
1589 } __attribute__((packed
));
1591 #endif /* __PANFROST_JOB_H__ */