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54f84742b71200a1eb628bccd4b844d3c26ea715
[mesa.git] / src / panfrost / lib / decode.c
1 /*
2 * Copyright (C) 2017-2019 Alyssa Rosenzweig
3 * Copyright (C) 2017-2019 Connor Abbott
4 * Copyright (C) 2019 Collabora, Ltd.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 */
25
26 #include <midgard_pack.h>
27 #include <stdio.h>
28 #include <stdlib.h>
29 #include <memory.h>
30 #include <stdbool.h>
31 #include <stdarg.h>
32 #include <ctype.h>
33 #include "decode.h"
34 #include "util/macros.h"
35 #include "util/u_math.h"
36
37 #include "midgard/disassemble.h"
38 #include "bifrost/disassemble.h"
39
40 #include "pan_encoder.h"
41
42 static void pandecode_swizzle(unsigned swizzle, enum mali_format format);
43
44 #define MEMORY_PROP(obj, p) {\
45 if (obj->p) { \
46 char *a = pointer_as_memory_reference(obj->p); \
47 pandecode_prop("%s = %s", #p, a); \
48 free(a); \
49 } \
50 }
51
52 #define MEMORY_PROP_DIR(obj, p) {\
53 if (obj.p) { \
54 char *a = pointer_as_memory_reference(obj.p); \
55 pandecode_prop("%s = %s", #p, a); \
56 free(a); \
57 } \
58 }
59
60 #define DUMP_CL(title, T, cl, indent) {\
61 fprintf(pandecode_dump_stream, "%s\n", title); \
62 struct MALI_ ## T temp; \
63 MALI_ ## T ## _unpack((const uint8_t *) cl, &temp); \
64 MALI_ ## T ## _print(pandecode_dump_stream, &temp, indent * 2); \
65 }
66
67 #define DUMP_ADDR(title, T, addr, indent) {\
68 struct pandecode_mapped_memory *mapped_mem = pandecode_find_mapped_gpu_mem_containing(addr); \
69 const uint8_t *cl = pandecode_fetch_gpu_mem(mapped_mem, addr, MALI_ ## T ## _LENGTH); \
70 DUMP_CL(title, T, cl, indent); \
71 }
72
73 FILE *pandecode_dump_stream;
74
75 /* Semantic logging type.
76 *
77 * Raw: for raw messages to be printed as is.
78 * Message: for helpful information to be commented out in replays.
79 * Property: for properties of a struct
80 *
81 * Use one of pandecode_log, pandecode_msg, or pandecode_prop as syntax sugar.
82 */
83
84 enum pandecode_log_type {
85 PANDECODE_RAW,
86 PANDECODE_MESSAGE,
87 PANDECODE_PROPERTY
88 };
89
90 #define pandecode_log(...) pandecode_log_typed(PANDECODE_RAW, __VA_ARGS__)
91 #define pandecode_msg(...) pandecode_log_typed(PANDECODE_MESSAGE, __VA_ARGS__)
92 #define pandecode_prop(...) pandecode_log_typed(PANDECODE_PROPERTY, __VA_ARGS__)
93
94 unsigned pandecode_indent = 0;
95
96 static void
97 pandecode_make_indent(void)
98 {
99 for (unsigned i = 0; i < pandecode_indent; ++i)
100 fprintf(pandecode_dump_stream, " ");
101 }
102
103 static void
104 pandecode_log_typed(enum pandecode_log_type type, const char *format, ...)
105 {
106 va_list ap;
107
108 pandecode_make_indent();
109
110 if (type == PANDECODE_MESSAGE)
111 fprintf(pandecode_dump_stream, "// ");
112 else if (type == PANDECODE_PROPERTY)
113 fprintf(pandecode_dump_stream, ".");
114
115 va_start(ap, format);
116 vfprintf(pandecode_dump_stream, format, ap);
117 va_end(ap);
118
119 if (type == PANDECODE_PROPERTY)
120 fprintf(pandecode_dump_stream, ",\n");
121 }
122
123 static void
124 pandecode_log_cont(const char *format, ...)
125 {
126 va_list ap;
127
128 va_start(ap, format);
129 vfprintf(pandecode_dump_stream, format, ap);
130 va_end(ap);
131 }
132
133 /* To check for memory safety issues, validates that the given pointer in GPU
134 * memory is valid, containing at least sz bytes. The goal is to eliminate
135 * GPU-side memory bugs (NULL pointer dereferences, buffer overflows, or buffer
136 * overruns) by statically validating pointers.
137 */
138
139 static void
140 pandecode_validate_buffer(mali_ptr addr, size_t sz)
141 {
142 if (!addr) {
143 pandecode_msg("XXX: null pointer deref");
144 return;
145 }
146
147 /* Find a BO */
148
149 struct pandecode_mapped_memory *bo =
150 pandecode_find_mapped_gpu_mem_containing(addr);
151
152 if (!bo) {
153 pandecode_msg("XXX: invalid memory dereference\n");
154 return;
155 }
156
157 /* Bounds check */
158
159 unsigned offset = addr - bo->gpu_va;
160 unsigned total = offset + sz;
161
162 if (total > bo->length) {
163 pandecode_msg("XXX: buffer overrun. "
164 "Chunk of size %zu at offset %d in buffer of size %zu. "
165 "Overrun by %zu bytes. \n",
166 sz, offset, bo->length, total - bo->length);
167 return;
168 }
169 }
170
171 struct pandecode_flag_info {
172 u64 flag;
173 const char *name;
174 };
175
176 static void
177 pandecode_log_decoded_flags(const struct pandecode_flag_info *flag_info,
178 u64 flags)
179 {
180 bool decodable_flags_found = false;
181
182 for (int i = 0; flag_info[i].name; i++) {
183 if ((flags & flag_info[i].flag) != flag_info[i].flag)
184 continue;
185
186 if (!decodable_flags_found) {
187 decodable_flags_found = true;
188 } else {
189 pandecode_log_cont(" | ");
190 }
191
192 pandecode_log_cont("%s", flag_info[i].name);
193
194 flags &= ~flag_info[i].flag;
195 }
196
197 if (decodable_flags_found) {
198 if (flags)
199 pandecode_log_cont(" | 0x%" PRIx64, flags);
200 } else {
201 pandecode_log_cont("0x%" PRIx64, flags);
202 }
203 }
204
205 #define FLAG_INFO(flag) { MALI_##flag, "MALI_" #flag }
206 static const struct pandecode_flag_info gl_enable_flag_info[] = {
207 FLAG_INFO(OCCLUSION_QUERY),
208 FLAG_INFO(OCCLUSION_PRECISE),
209 FLAG_INFO(FRONT_CCW_TOP),
210 FLAG_INFO(CULL_FACE_FRONT),
211 FLAG_INFO(CULL_FACE_BACK),
212 {}
213 };
214 #undef FLAG_INFO
215
216 #define FLAG_INFO(flag) { MALI_CLEAR_##flag, "MALI_CLEAR_" #flag }
217 static const struct pandecode_flag_info clear_flag_info[] = {
218 FLAG_INFO(FAST),
219 FLAG_INFO(SLOW),
220 FLAG_INFO(SLOW_STENCIL),
221 {}
222 };
223 #undef FLAG_INFO
224
225 #define FLAG_INFO(flag) { MALI_MASK_##flag, "MALI_MASK_" #flag }
226 static const struct pandecode_flag_info mask_flag_info[] = {
227 FLAG_INFO(R),
228 FLAG_INFO(G),
229 FLAG_INFO(B),
230 FLAG_INFO(A),
231 {}
232 };
233 #undef FLAG_INFO
234
235 #define FLAG_INFO(flag) { MALI_##flag, "MALI_" #flag }
236 static const struct pandecode_flag_info u3_flag_info[] = {
237 FLAG_INFO(HAS_MSAA),
238 FLAG_INFO(PER_SAMPLE),
239 FLAG_INFO(CAN_DISCARD),
240 FLAG_INFO(HAS_BLEND_SHADER),
241 FLAG_INFO(DEPTH_WRITEMASK),
242 FLAG_INFO(DEPTH_CLIP_NEAR),
243 FLAG_INFO(DEPTH_CLIP_FAR),
244 {}
245 };
246
247 static const struct pandecode_flag_info u4_flag_info[] = {
248 FLAG_INFO(NO_MSAA),
249 FLAG_INFO(NO_DITHER),
250 FLAG_INFO(DEPTH_RANGE_A),
251 FLAG_INFO(DEPTH_RANGE_B),
252 FLAG_INFO(STENCIL_TEST),
253 FLAG_INFO(ALPHA_TO_COVERAGE),
254 {}
255 };
256 #undef FLAG_INFO
257
258 #define FLAG_INFO(flag) { MALI_MFBD_FORMAT_##flag, "MALI_MFBD_FORMAT_" #flag }
259 static const struct pandecode_flag_info mfbd_fmt_flag_info[] = {
260 FLAG_INFO(SRGB),
261 {}
262 };
263 #undef FLAG_INFO
264
265 #define FLAG_INFO(flag) { MALI_AFBC_##flag, "MALI_AFBC_" #flag }
266 static const struct pandecode_flag_info afbc_fmt_flag_info[] = {
267 FLAG_INFO(YTR),
268 {}
269 };
270 #undef FLAG_INFO
271
272 #define FLAG_INFO(flag) { MALI_EXTRA_##flag, "MALI_EXTRA_" #flag }
273 static const struct pandecode_flag_info mfbd_extra_flag_hi_info[] = {
274 FLAG_INFO(PRESENT),
275 {}
276 };
277 #undef FLAG_INFO
278
279 #define FLAG_INFO(flag) { MALI_EXTRA_##flag, "MALI_EXTRA_" #flag }
280 static const struct pandecode_flag_info mfbd_extra_flag_lo_info[] = {
281 FLAG_INFO(ZS),
282 {}
283 };
284 #undef FLAG_INFO
285
286 #define FLAG_INFO(flag) { MALI_##flag, "MALI_" #flag }
287 static const struct pandecode_flag_info shader_midgard1_flag_lo_info [] = {
288 FLAG_INFO(WRITES_Z),
289 FLAG_INFO(EARLY_Z),
290 FLAG_INFO(READS_TILEBUFFER),
291 FLAG_INFO(WRITES_GLOBAL),
292 FLAG_INFO(READS_ZS),
293 {}
294 };
295
296 static const struct pandecode_flag_info shader_midgard1_flag_hi_info [] = {
297 FLAG_INFO(WRITES_S),
298 FLAG_INFO(SUPPRESS_INF_NAN),
299 {}
300 };
301 #undef FLAG_INFO
302
303 #define FLAG_INFO(flag) { MALI_BIFROST_##flag, "MALI_BIFROST_" #flag }
304 static const struct pandecode_flag_info shader_bifrost_info [] = {
305 FLAG_INFO(FULL_THREAD),
306 FLAG_INFO(EARLY_Z),
307 FLAG_INFO(FIRST_ATEST),
308 {}
309 };
310
311 #undef FLAG_INFO
312
313 #define FLAG_INFO(flag) { MALI_MFBD_##flag, "MALI_MFBD_" #flag }
314 static const struct pandecode_flag_info mfbd_flag_info [] = {
315 FLAG_INFO(DEPTH_WRITE),
316 FLAG_INFO(EXTRA),
317 {}
318 };
319 #undef FLAG_INFO
320
321 #define FLAG_INFO(flag) { MALI_SFBD_FORMAT_##flag, "MALI_SFBD_FORMAT_" #flag }
322 static const struct pandecode_flag_info sfbd_unk1_info [] = {
323 FLAG_INFO(MSAA_8),
324 FLAG_INFO(MSAA_A),
325 {}
326 };
327 #undef FLAG_INFO
328
329 #define FLAG_INFO(flag) { MALI_SFBD_FORMAT_##flag, "MALI_SFBD_FORMAT_" #flag }
330 static const struct pandecode_flag_info sfbd_unk2_info [] = {
331 FLAG_INFO(MSAA_B),
332 FLAG_INFO(SRGB),
333 {}
334 };
335 #undef FLAG_INFO
336
337 static char *pandecode_attr_mode_short(enum mali_attr_mode mode)
338 {
339 switch(mode) {
340 /* TODO: Combine to just "instanced" once this can be done
341 * unambiguously in all known cases */
342 case MALI_ATTR_POT_DIVIDE:
343 return "instanced_pot";
344 case MALI_ATTR_MODULO:
345 return "instanced_mod";
346 case MALI_ATTR_NPOT_DIVIDE:
347 return "instanced_npot";
348 case MALI_ATTR_IMAGE:
349 return "image";
350 default:
351 pandecode_msg("XXX: invalid attribute mode %X\n", mode);
352 return "";
353 }
354 }
355
356 static const char *
357 pandecode_special_record(uint64_t v, bool* attribute)
358 {
359 switch(v) {
360 case MALI_ATTR_VERTEXID:
361 *attribute = true;
362 return "gl_VertexID";
363 case MALI_ATTR_INSTANCEID:
364 *attribute = true;
365 return "gl_InstanceID";
366 case MALI_VARYING_FRAG_COORD:
367 return "gl_FragCoord";
368 case MALI_VARYING_FRONT_FACING:
369 return "gl_FrontFacing";
370 case MALI_VARYING_POINT_COORD:
371 return "gl_PointCoord";
372 default:
373 pandecode_msg("XXX: invalid special record %" PRIx64 "\n", v);
374 return "";
375 }
376 }
377
378
379 /* Midgard's tiler descriptor is embedded within the
380 * larger FBD */
381
382 static void
383 pandecode_midgard_tiler_descriptor(
384 const struct midgard_tiler_descriptor *t,
385 unsigned width,
386 unsigned height,
387 bool is_fragment,
388 bool has_hierarchy)
389 {
390 pandecode_log(".tiler = {\n");
391 pandecode_indent++;
392
393 if (t->hierarchy_mask == MALI_TILER_DISABLED)
394 pandecode_prop("hierarchy_mask = MALI_TILER_DISABLED");
395 else
396 pandecode_prop("hierarchy_mask = 0x%" PRIx16, t->hierarchy_mask);
397
398 /* We know this name from the kernel, but we never see it nonzero */
399
400 if (t->flags)
401 pandecode_msg("XXX: unexpected tiler flags 0x%" PRIx16, t->flags);
402
403 MEMORY_PROP(t, polygon_list);
404
405 /* The body is offset from the base of the polygon list */
406 //assert(t->polygon_list_body > t->polygon_list);
407 unsigned body_offset = t->polygon_list_body - t->polygon_list;
408
409 /* It needs to fit inside the reported size */
410 //assert(t->polygon_list_size >= body_offset);
411
412 /* Now that we've sanity checked, we'll try to calculate the sizes
413 * ourselves for comparison */
414
415 unsigned ref_header = panfrost_tiler_header_size(width, height, t->hierarchy_mask, has_hierarchy);
416 unsigned ref_size = panfrost_tiler_full_size(width, height, t->hierarchy_mask, has_hierarchy);
417
418 if (!((ref_header == body_offset) && (ref_size == t->polygon_list_size))) {
419 pandecode_msg("XXX: bad polygon list size (expected %d / 0x%x)\n",
420 ref_header, ref_size);
421 pandecode_prop("polygon_list_size = 0x%x", t->polygon_list_size);
422 pandecode_msg("body offset %d\n", body_offset);
423 }
424
425 /* The tiler heap has a start and end specified -- it should be
426 * identical to what we have in the BO. The exception is if tiling is
427 * disabled. */
428
429 MEMORY_PROP(t, heap_start);
430 assert(t->heap_end >= t->heap_start);
431
432 struct pandecode_mapped_memory *heap =
433 pandecode_find_mapped_gpu_mem_containing(t->heap_start);
434
435 unsigned heap_size = t->heap_end - t->heap_start;
436
437 /* Tiling is enabled with a special flag */
438 unsigned hierarchy_mask = t->hierarchy_mask & MALI_HIERARCHY_MASK;
439 unsigned tiler_flags = t->hierarchy_mask ^ hierarchy_mask;
440
441 bool tiling_enabled = hierarchy_mask;
442
443 if (tiling_enabled) {
444 /* When tiling is enabled, the heap should be a tight fit */
445 unsigned heap_offset = t->heap_start - heap->gpu_va;
446 if ((heap_offset + heap_size) != heap->length) {
447 pandecode_msg("XXX: heap size %u (expected %zu)\n",
448 heap_size, heap->length - heap_offset);
449 }
450
451 /* We should also have no other flags */
452 if (tiler_flags)
453 pandecode_msg("XXX: unexpected tiler %X\n", tiler_flags);
454 } else {
455 /* When tiling is disabled, we should have that flag and no others */
456
457 if (tiler_flags != MALI_TILER_DISABLED) {
458 pandecode_msg("XXX: unexpected tiler flag %X, expected MALI_TILER_DISABLED\n",
459 tiler_flags);
460 }
461
462 /* We should also have an empty heap */
463 if (heap_size) {
464 pandecode_msg("XXX: tiler heap size %d given, expected empty\n",
465 heap_size);
466 }
467
468 /* Disabled tiling is used only for clear-only jobs, which are
469 * purely FRAGMENT, so we should never see this for
470 * non-FRAGMENT descriptors. */
471
472 if (!is_fragment)
473 pandecode_msg("XXX: tiler disabled for non-FRAGMENT job\n");
474 }
475
476 /* We've never seen weights used in practice, but we know from the
477 * kernel these fields is there */
478
479 bool nonzero_weights = false;
480
481 for (unsigned w = 0; w < ARRAY_SIZE(t->weights); ++w) {
482 nonzero_weights |= t->weights[w] != 0x0;
483 }
484
485 if (nonzero_weights) {
486 pandecode_log(".weights = { ");
487
488 for (unsigned w = 0; w < ARRAY_SIZE(t->weights); ++w) {
489 pandecode_log_cont("%d, ", t->weights[w]);
490 }
491
492 pandecode_log("},");
493 }
494
495 pandecode_indent--;
496 pandecode_log("}\n");
497 }
498
499 /* TODO: The Bifrost tiler is not understood at all yet */
500
501 static void
502 pandecode_bifrost_tiler_descriptor(const struct mali_framebuffer *fb)
503 {
504 pandecode_log(".tiler = {\n");
505 pandecode_indent++;
506
507 MEMORY_PROP(fb, tiler_meta);
508
509 for (int i = 0; i < 16; i++) {
510 if (fb->zeros[i] != 0) {
511 pandecode_msg("XXX: tiler descriptor zero %d tripped, value %x\n",
512 i, fb->zeros[i]);
513 }
514 }
515
516 pandecode_log("},\n");
517
518 pandecode_indent--;
519 pandecode_log("}\n");
520
521 }
522
523 /* Information about the framebuffer passed back for
524 * additional analysis */
525
526 struct pandecode_fbd {
527 unsigned width;
528 unsigned height;
529 unsigned rt_count;
530 bool has_extra;
531 };
532
533 static void
534 pandecode_sfbd_format(struct mali_sfbd_format format)
535 {
536 pandecode_log(".format = {\n");
537 pandecode_indent++;
538
539 pandecode_log(".unk1 = ");
540 pandecode_log_decoded_flags(sfbd_unk1_info, format.unk1);
541 pandecode_log_cont(",\n");
542
543 /* TODO: Map formats so we can check swizzles and print nicely */
544 pandecode_log("swizzle");
545 pandecode_swizzle(format.swizzle, MALI_RGBA8_UNORM);
546 pandecode_log_cont(",\n");
547
548 pandecode_prop("nr_channels = MALI_POSITIVE(%d)",
549 (format.nr_channels + 1));
550
551 pandecode_log(".unk2 = ");
552 pandecode_log_decoded_flags(sfbd_unk2_info, format.unk2);
553 pandecode_log_cont(",\n");
554
555 pandecode_prop("block = %s", mali_block_format_as_str(format.block));
556
557 pandecode_prop("unk3 = 0x%" PRIx32, format.unk3);
558
559 pandecode_indent--;
560 pandecode_log("},\n");
561 }
562
563 static void
564 pandecode_shared_memory(const struct mali_shared_memory *desc, bool is_compute)
565 {
566 pandecode_prop("stack_shift = 0x%x", desc->stack_shift);
567
568 if (desc->unk0)
569 pandecode_prop("unk0 = 0x%x", desc->unk0);
570
571 if (desc->shared_workgroup_count != 0x1F) {
572 pandecode_prop("shared_workgroup_count = %d", desc->shared_workgroup_count);
573 if (!is_compute)
574 pandecode_msg("XXX: wrong workgroup count for noncompute\n");
575 }
576
577 if (desc->shared_unk1 || desc->shared_shift) {
578 pandecode_prop("shared_unk1 = %X", desc->shared_unk1);
579 pandecode_prop("shared_shift = %X", desc->shared_shift);
580
581 if (!is_compute)
582 pandecode_msg("XXX: shared memory configured in noncompute shader");
583 }
584
585 if (desc->shared_zero) {
586 pandecode_msg("XXX: shared memory zero tripped\n");
587 pandecode_prop("shared_zero = 0x%" PRIx32, desc->shared_zero);
588 }
589
590 if (desc->shared_memory && !is_compute)
591 pandecode_msg("XXX: shared memory used in noncompute shader\n");
592
593 MEMORY_PROP(desc, scratchpad);
594 MEMORY_PROP(desc, shared_memory);
595 MEMORY_PROP(desc, unknown1);
596
597 if (desc->scratchpad) {
598 struct pandecode_mapped_memory *smem =
599 pandecode_find_mapped_gpu_mem_containing(desc->scratchpad);
600
601 pandecode_msg("scratchpad size %u\n", smem->length);
602 }
603
604 }
605
606 static struct pandecode_fbd
607 pandecode_sfbd(uint64_t gpu_va, int job_no, bool is_fragment, unsigned gpu_id)
608 {
609 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
610 const struct mali_single_framebuffer *PANDECODE_PTR_VAR(s, mem, (mali_ptr) gpu_va);
611
612 struct pandecode_fbd info = {
613 .has_extra = false,
614 .rt_count = 1
615 };
616
617 pandecode_log("struct mali_single_framebuffer framebuffer_%"PRIx64"_%d = {\n", gpu_va, job_no);
618 pandecode_indent++;
619
620 pandecode_log(".shared_memory = {\n");
621 pandecode_indent++;
622 pandecode_shared_memory(&s->shared_memory, false);
623 pandecode_indent--;
624 pandecode_log("},\n");
625
626 pandecode_sfbd_format(s->format);
627
628 info.width = s->width + 1;
629 info.height = s->height + 1;
630
631 pandecode_prop("width = MALI_POSITIVE(%" PRId16 ")", info.width);
632 pandecode_prop("height = MALI_POSITIVE(%" PRId16 ")", info.height);
633
634 MEMORY_PROP(s, checksum);
635
636 if (s->checksum_stride)
637 pandecode_prop("checksum_stride = %d", s->checksum_stride);
638
639 MEMORY_PROP(s, framebuffer);
640 pandecode_prop("stride = %d", s->stride);
641
642 /* Earlier in the actual commandstream -- right before width -- but we
643 * delay to flow nicer */
644
645 pandecode_log(".clear_flags = ");
646 pandecode_log_decoded_flags(clear_flag_info, s->clear_flags);
647 pandecode_log_cont(",\n");
648
649 if (s->depth_buffer) {
650 MEMORY_PROP(s, depth_buffer);
651 pandecode_prop("depth_stride = %d", s->depth_stride);
652 }
653
654 if (s->stencil_buffer) {
655 MEMORY_PROP(s, stencil_buffer);
656 pandecode_prop("stencil_stride = %d", s->stencil_stride);
657 }
658
659 if (s->depth_stride_zero ||
660 s->stencil_stride_zero ||
661 s->zero7 || s->zero8) {
662 pandecode_msg("XXX: Depth/stencil zeros tripped\n");
663 pandecode_prop("depth_stride_zero = 0x%x",
664 s->depth_stride_zero);
665 pandecode_prop("stencil_stride_zero = 0x%x",
666 s->stencil_stride_zero);
667 pandecode_prop("zero7 = 0x%" PRIx32,
668 s->zero7);
669 pandecode_prop("zero8 = 0x%" PRIx32,
670 s->zero8);
671 }
672
673 if (s->clear_color_1 | s->clear_color_2 | s->clear_color_3 | s->clear_color_4) {
674 pandecode_prop("clear_color_1 = 0x%" PRIx32, s->clear_color_1);
675 pandecode_prop("clear_color_2 = 0x%" PRIx32, s->clear_color_2);
676 pandecode_prop("clear_color_3 = 0x%" PRIx32, s->clear_color_3);
677 pandecode_prop("clear_color_4 = 0x%" PRIx32, s->clear_color_4);
678 }
679
680 if (s->clear_depth_1 != 0 || s->clear_depth_2 != 0 || s->clear_depth_3 != 0 || s->clear_depth_4 != 0) {
681 pandecode_prop("clear_depth_1 = %f", s->clear_depth_1);
682 pandecode_prop("clear_depth_2 = %f", s->clear_depth_2);
683 pandecode_prop("clear_depth_3 = %f", s->clear_depth_3);
684 pandecode_prop("clear_depth_4 = %f", s->clear_depth_4);
685 }
686
687 if (s->clear_stencil) {
688 pandecode_prop("clear_stencil = 0x%x", s->clear_stencil);
689 }
690
691 const struct midgard_tiler_descriptor t = s->tiler;
692
693 bool has_hierarchy = !(gpu_id == 0x0720 || gpu_id == 0x0820 || gpu_id == 0x0830);
694 pandecode_midgard_tiler_descriptor(&t, s->width + 1, s->height + 1, is_fragment, has_hierarchy);
695
696 pandecode_indent--;
697 pandecode_log("};\n");
698
699 pandecode_prop("zero2 = 0x%" PRIx32, s->zero2);
700 pandecode_prop("zero4 = 0x%" PRIx32, s->zero4);
701 pandecode_prop("zero5 = 0x%" PRIx32, s->zero5);
702
703 pandecode_log_cont(".zero3 = {");
704
705 for (int i = 0; i < sizeof(s->zero3) / sizeof(s->zero3[0]); ++i)
706 pandecode_log_cont("%X, ", s->zero3[i]);
707
708 pandecode_log_cont("},\n");
709
710 pandecode_log_cont(".zero6 = {");
711
712 for (int i = 0; i < sizeof(s->zero6) / sizeof(s->zero6[0]); ++i)
713 pandecode_log_cont("%X, ", s->zero6[i]);
714
715 pandecode_log_cont("},\n");
716
717 return info;
718 }
719
720 static void
721 pandecode_compute_fbd(uint64_t gpu_va, int job_no)
722 {
723 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
724 const struct mali_shared_memory *PANDECODE_PTR_VAR(s, mem, (mali_ptr) gpu_va);
725
726 pandecode_log("struct mali_shared_memory shared_%"PRIx64"_%d = {\n", gpu_va, job_no);
727 pandecode_indent++;
728 pandecode_shared_memory(s, true);
729 pandecode_indent--;
730 pandecode_log("},\n");
731 }
732
733 /* Extracts the number of components associated with a Mali format */
734
735 static unsigned
736 pandecode_format_component_count(enum mali_format fmt)
737 {
738 /* Mask out the format class */
739 unsigned top = fmt & 0b11100000;
740
741 switch (top) {
742 case MALI_FORMAT_SNORM:
743 case MALI_FORMAT_UINT:
744 case MALI_FORMAT_UNORM:
745 case MALI_FORMAT_SINT:
746 return ((fmt >> 3) & 3) + 1;
747 default:
748 /* TODO: Validate */
749 return 4;
750 }
751 }
752
753 /* Extracts a mask of accessed components from a 12-bit Mali swizzle */
754
755 static unsigned
756 pandecode_access_mask_from_channel_swizzle(unsigned swizzle)
757 {
758 unsigned mask = 0;
759 assert(MALI_CHANNEL_RED == 0);
760
761 for (unsigned c = 0; c < 4; ++c) {
762 enum mali_channel chan = (swizzle >> (3*c)) & 0x7;
763
764 if (chan <= MALI_CHANNEL_ALPHA)
765 mask |= (1 << chan);
766 }
767
768 return mask;
769 }
770
771 /* Validates that a (format, swizzle) pair is valid, in the sense that the
772 * swizzle doesn't access any components that are undefined in the format.
773 * Returns whether the swizzle is trivial (doesn't do any swizzling) and can be
774 * omitted */
775
776 static bool
777 pandecode_validate_format_swizzle(enum mali_format fmt, unsigned swizzle)
778 {
779 unsigned nr_comp = pandecode_format_component_count(fmt);
780 unsigned access_mask = pandecode_access_mask_from_channel_swizzle(swizzle);
781 unsigned valid_mask = (1 << nr_comp) - 1;
782 unsigned invalid_mask = ~valid_mask;
783
784 if (access_mask & invalid_mask) {
785 pandecode_msg("XXX: invalid components accessed\n");
786 return false;
787 }
788
789 /* Check for the default non-swizzling swizzle so we can suppress
790 * useless printing for the defaults */
791
792 unsigned default_swizzles[4] = {
793 MALI_CHANNEL_RED | (MALI_CHANNEL_ZERO << 3) | (MALI_CHANNEL_ZERO << 6) | (MALI_CHANNEL_ONE << 9),
794 MALI_CHANNEL_RED | (MALI_CHANNEL_GREEN << 3) | (MALI_CHANNEL_ZERO << 6) | (MALI_CHANNEL_ONE << 9),
795 MALI_CHANNEL_RED | (MALI_CHANNEL_GREEN << 3) | (MALI_CHANNEL_BLUE << 6) | (MALI_CHANNEL_ONE << 9),
796 MALI_CHANNEL_RED | (MALI_CHANNEL_GREEN << 3) | (MALI_CHANNEL_BLUE << 6) | (MALI_CHANNEL_ALPHA << 9)
797 };
798
799 return (swizzle == default_swizzles[nr_comp - 1]);
800 }
801
802 static void
803 pandecode_swizzle(unsigned swizzle, enum mali_format format)
804 {
805 /* First, do some validation */
806 bool trivial_swizzle = pandecode_validate_format_swizzle(
807 format, swizzle);
808
809 if (trivial_swizzle)
810 return;
811
812 /* Next, print the swizzle */
813 pandecode_log_cont(".");
814
815 static const char components[] = "rgba01";
816
817 for (unsigned c = 0; c < 4; ++c) {
818 enum mali_channel chan = (swizzle >> (3 * c)) & 0x7;
819
820 if (chan >= MALI_CHANNEL_RESERVED_0) {
821 pandecode_log("XXX: invalid swizzle channel %d\n", chan);
822 continue;
823 }
824 pandecode_log_cont("%c", components[chan]);
825 }
826 }
827
828 static void
829 pandecode_rt_format(struct mali_rt_format format)
830 {
831 pandecode_log(".format = {\n");
832 pandecode_indent++;
833
834 pandecode_prop("unk1 = 0x%" PRIx32, format.unk1);
835 pandecode_prop("unk2 = 0x%" PRIx32, format.unk2);
836 pandecode_prop("unk3 = 0x%" PRIx32, format.unk3);
837 pandecode_prop("unk4 = 0x%" PRIx32, format.unk4);
838
839 pandecode_prop("block = %s", mali_block_format_as_str(format.block));
840
841 /* TODO: Map formats so we can check swizzles and print nicely */
842 pandecode_log("swizzle");
843 pandecode_swizzle(format.swizzle, MALI_RGBA8_UNORM);
844 pandecode_log_cont(",\n");
845
846 pandecode_prop("nr_channels = MALI_POSITIVE(%d)",
847 (format.nr_channels + 1));
848
849 pandecode_log(".flags = ");
850 pandecode_log_decoded_flags(mfbd_fmt_flag_info, format.flags);
851 pandecode_log_cont(",\n");
852
853 pandecode_prop("msaa = %s", mali_msaa_as_str(format.msaa));
854
855 /* In theory, the no_preload bit can be cleared to enable MFBD preload,
856 * which is a faster hardware-based alternative to the wallpaper method
857 * to preserve framebuffer contents across frames. In practice, MFBD
858 * preload is buggy on Midgard, and so this is a chicken bit. If this
859 * bit isn't set, most likely something broke unrelated to preload */
860
861 if (!format.no_preload) {
862 pandecode_msg("XXX: buggy MFBD preload enabled - chicken bit should be clear\n");
863 pandecode_prop("no_preload = 0x%" PRIx32, format.no_preload);
864 }
865
866 if (format.zero)
867 pandecode_prop("zero = 0x%" PRIx32, format.zero);
868
869 pandecode_indent--;
870 pandecode_log("},\n");
871 }
872
873 static void
874 pandecode_render_target(uint64_t gpu_va, unsigned job_no, const struct mali_framebuffer *fb)
875 {
876 pandecode_log("struct mali_render_target rts_list_%"PRIx64"_%d[] = {\n", gpu_va, job_no);
877 pandecode_indent++;
878
879 for (int i = 0; i < (fb->rt_count_1 + 1); i++) {
880 mali_ptr rt_va = gpu_va + i * sizeof(struct mali_render_target);
881 struct pandecode_mapped_memory *mem =
882 pandecode_find_mapped_gpu_mem_containing(rt_va);
883 const struct mali_render_target *PANDECODE_PTR_VAR(rt, mem, (mali_ptr) rt_va);
884
885 pandecode_log("{\n");
886 pandecode_indent++;
887
888 pandecode_rt_format(rt->format);
889
890 if (rt->format.block == MALI_BLOCK_FORMAT_AFBC) {
891 pandecode_log(".afbc = {\n");
892 pandecode_indent++;
893
894 char *a = pointer_as_memory_reference(rt->afbc.metadata);
895 pandecode_prop("metadata = %s", a);
896 free(a);
897
898 pandecode_prop("stride = %d", rt->afbc.stride);
899
900 pandecode_log(".flags = ");
901 pandecode_log_decoded_flags(afbc_fmt_flag_info, rt->afbc.flags);
902 pandecode_log_cont(",\n");
903
904 pandecode_indent--;
905 pandecode_log("},\n");
906 } else if (rt->afbc.metadata || rt->afbc.stride || rt->afbc.flags) {
907 pandecode_msg("XXX: AFBC disabled but AFBC field set (0x%lX, 0x%x, 0x%x)\n",
908 rt->afbc.metadata,
909 rt->afbc.stride,
910 rt->afbc.flags);
911 }
912
913 MEMORY_PROP(rt, framebuffer);
914 pandecode_prop("framebuffer_stride = %d", rt->framebuffer_stride);
915
916 if (rt->layer_stride)
917 pandecode_prop("layer_stride = %d", rt->layer_stride);
918
919 if (rt->clear_color_1 | rt->clear_color_2 | rt->clear_color_3 | rt->clear_color_4) {
920 pandecode_prop("clear_color_1 = 0x%" PRIx32, rt->clear_color_1);
921 pandecode_prop("clear_color_2 = 0x%" PRIx32, rt->clear_color_2);
922 pandecode_prop("clear_color_3 = 0x%" PRIx32, rt->clear_color_3);
923 pandecode_prop("clear_color_4 = 0x%" PRIx32, rt->clear_color_4);
924 }
925
926 if (rt->zero1 || rt->zero2) {
927 pandecode_msg("XXX: render target zeros tripped\n");
928 pandecode_prop("zero1 = 0x%" PRIx64, rt->zero1);
929 pandecode_prop("zero2 = 0x%" PRIx32, rt->zero2);
930 }
931
932 pandecode_indent--;
933 pandecode_log("},\n");
934 }
935
936 pandecode_indent--;
937 pandecode_log("};\n");
938 }
939
940 static struct pandecode_fbd
941 pandecode_mfbd_bfr(uint64_t gpu_va, int job_no, bool is_fragment, bool is_compute, bool is_bifrost)
942 {
943 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
944 const struct mali_framebuffer *PANDECODE_PTR_VAR(fb, mem, (mali_ptr) gpu_va);
945
946 struct pandecode_fbd info;
947
948 if (is_bifrost && fb->msaa.sample_locations) {
949 /* The blob stores all possible sample locations in a single buffer
950 * allocated on startup, and just switches the pointer when switching
951 * MSAA state. For now, we just put the data into the cmdstream, but we
952 * should do something like what the blob does with a real driver.
953 *
954 * There seem to be 32 slots for sample locations, followed by another
955 * 16. The second 16 is just the center location followed by 15 zeros
956 * in all the cases I've identified (maybe shader vs. depth/color
957 * samples?).
958 */
959
960 struct pandecode_mapped_memory *smem = pandecode_find_mapped_gpu_mem_containing(fb->msaa.sample_locations);
961
962 const u16 *PANDECODE_PTR_VAR(samples, smem, fb->msaa.sample_locations);
963
964 pandecode_log("uint16_t sample_locations_%d[] = {\n", job_no);
965 pandecode_indent++;
966
967 for (int i = 0; i < 32 + 16; i++) {
968 pandecode_log("%d, %d,\n", samples[2 * i], samples[2 * i + 1]);
969 }
970
971 pandecode_indent--;
972 pandecode_log("};\n");
973 }
974
975 pandecode_log("struct mali_framebuffer framebuffer_%"PRIx64"_%d = {\n", gpu_va, job_no);
976 pandecode_indent++;
977
978 if (is_bifrost) {
979 pandecode_log(".msaa = {\n");
980 pandecode_indent++;
981
982 if (fb->msaa.sample_locations)
983 pandecode_prop("sample_locations = sample_locations_%d", job_no);
984 else
985 pandecode_msg("XXX: sample_locations missing\n");
986
987 if (fb->msaa.zero1 || fb->msaa.zero2 || fb->msaa.zero4) {
988 pandecode_msg("XXX: multisampling zero tripped\n");
989 pandecode_prop("zero1 = %" PRIx64, fb->msaa.zero1);
990 pandecode_prop("zero2 = %" PRIx64, fb->msaa.zero2);
991 pandecode_prop("zero4 = %" PRIx64, fb->msaa.zero4);
992 }
993
994 pandecode_indent--;
995 pandecode_log("},\n");
996 } else {
997 pandecode_log(".shared_memory = {\n");
998 pandecode_indent++;
999 pandecode_shared_memory(&fb->shared_memory, is_compute);
1000 pandecode_indent--;
1001 pandecode_log("},\n");
1002 }
1003
1004 info.width = fb->width1 + 1;
1005 info.height = fb->height1 + 1;
1006 info.rt_count = fb->rt_count_1 + 1;
1007
1008 pandecode_prop("width1 = MALI_POSITIVE(%d)", fb->width1 + 1);
1009 pandecode_prop("height1 = MALI_POSITIVE(%d)", fb->height1 + 1);
1010 pandecode_prop("width2 = MALI_POSITIVE(%d)", fb->width2 + 1);
1011 pandecode_prop("height2 = MALI_POSITIVE(%d)", fb->height2 + 1);
1012
1013 pandecode_prop("unk1 = 0x%x", fb->unk1);
1014 pandecode_prop("unk2 = 0x%x", fb->unk2);
1015 pandecode_prop("rt_count_1 = MALI_POSITIVE(%d)", fb->rt_count_1 + 1);
1016 pandecode_prop("rt_count_2 = %d", fb->rt_count_2);
1017
1018 pandecode_log(".mfbd_flags = ");
1019 pandecode_log_decoded_flags(mfbd_flag_info, fb->mfbd_flags);
1020 pandecode_log_cont(",\n");
1021
1022 if (fb->clear_stencil)
1023 pandecode_prop("clear_stencil = 0x%x", fb->clear_stencil);
1024
1025 if (fb->clear_depth)
1026 pandecode_prop("clear_depth = %f", fb->clear_depth);
1027
1028 if (!is_compute)
1029 if (is_bifrost)
1030 pandecode_bifrost_tiler_descriptor(fb);
1031 else {
1032 const struct midgard_tiler_descriptor t = fb->tiler;
1033 pandecode_midgard_tiler_descriptor(&t, fb->width1 + 1, fb->height1 + 1, is_fragment, true);
1034 }
1035 else
1036 pandecode_msg("XXX: skipping compute MFBD, fixme\n");
1037
1038 if (fb->zero3 || fb->zero4) {
1039 pandecode_msg("XXX: framebuffer zeros tripped\n");
1040 pandecode_prop("zero3 = 0x%" PRIx32, fb->zero3);
1041 pandecode_prop("zero4 = 0x%" PRIx32, fb->zero4);
1042 }
1043
1044 pandecode_indent--;
1045 pandecode_log("};\n");
1046
1047 gpu_va += sizeof(struct mali_framebuffer);
1048
1049 info.has_extra = (fb->mfbd_flags & MALI_MFBD_EXTRA) && is_fragment;
1050
1051 if (info.has_extra) {
1052 mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
1053 const struct mali_framebuffer_extra *PANDECODE_PTR_VAR(fbx, mem, (mali_ptr) gpu_va);
1054
1055 pandecode_log("struct mali_framebuffer_extra fb_extra_%"PRIx64"_%d = {\n", gpu_va, job_no);
1056 pandecode_indent++;
1057
1058 MEMORY_PROP(fbx, checksum);
1059
1060 if (fbx->checksum_stride)
1061 pandecode_prop("checksum_stride = %d", fbx->checksum_stride);
1062
1063 pandecode_log(".flags_hi = ");
1064 pandecode_log_decoded_flags(mfbd_extra_flag_hi_info, fbx->flags_hi);
1065 pandecode_log_cont(",\n");
1066
1067 pandecode_log(".flags_lo = ");
1068 pandecode_log_decoded_flags(mfbd_extra_flag_lo_info, fbx->flags_lo);
1069 pandecode_log_cont(",\n");
1070
1071 pandecode_prop("zs_block = %s", mali_block_format_as_str(fbx->zs_block));
1072 pandecode_prop("zs_samples = MALI_POSITIVE(%u)", fbx->zs_samples + 1);
1073
1074 if (fbx->zs_block == MALI_BLOCK_FORMAT_AFBC) {
1075 pandecode_log(".ds_afbc = {\n");
1076 pandecode_indent++;
1077
1078 MEMORY_PROP_DIR(fbx->ds_afbc, depth_stencil_afbc_metadata);
1079 pandecode_prop("depth_stencil_afbc_stride = %d",
1080 fbx->ds_afbc.depth_stencil_afbc_stride);
1081 MEMORY_PROP_DIR(fbx->ds_afbc, depth_stencil);
1082
1083 pandecode_log(".flags = ");
1084 pandecode_log_decoded_flags(afbc_fmt_flag_info, fbx->ds_afbc.flags);
1085 pandecode_log_cont(",\n");
1086
1087 if (fbx->ds_afbc.padding) {
1088 pandecode_msg("XXX: Depth/stencil AFBC zeros tripped\n");
1089 pandecode_prop("padding = 0x%" PRIx64, fbx->ds_afbc.padding);
1090 }
1091
1092 pandecode_indent--;
1093 pandecode_log("},\n");
1094 } else {
1095 pandecode_log(".ds_linear = {\n");
1096 pandecode_indent++;
1097
1098 if (fbx->ds_linear.depth) {
1099 MEMORY_PROP_DIR(fbx->ds_linear, depth);
1100 pandecode_prop("depth_stride = %d",
1101 fbx->ds_linear.depth_stride);
1102 pandecode_prop("depth_layer_stride = %d",
1103 fbx->ds_linear.depth_layer_stride);
1104 } else if (fbx->ds_linear.depth_stride || fbx->ds_linear.depth_layer_stride) {
1105 pandecode_msg("XXX: depth stride zero tripped %d %d\n", fbx->ds_linear.depth_stride, fbx->ds_linear.depth_layer_stride);
1106 }
1107
1108 if (fbx->ds_linear.stencil) {
1109 MEMORY_PROP_DIR(fbx->ds_linear, stencil);
1110 pandecode_prop("stencil_stride = %d",
1111 fbx->ds_linear.stencil_stride);
1112 pandecode_prop("stencil_layer_stride = %d",
1113 fbx->ds_linear.stencil_layer_stride);
1114 } else if (fbx->ds_linear.stencil_stride || fbx->ds_linear.stencil_layer_stride) {
1115 pandecode_msg("XXX: stencil stride zero tripped %d %d\n", fbx->ds_linear.stencil_stride, fbx->ds_linear.stencil_layer_stride);
1116 }
1117
1118 if (fbx->ds_linear.depth_stride_zero ||
1119 fbx->ds_linear.stencil_stride_zero) {
1120 pandecode_msg("XXX: Depth/stencil zeros tripped\n");
1121 pandecode_prop("depth_stride_zero = 0x%x",
1122 fbx->ds_linear.depth_stride_zero);
1123 pandecode_prop("stencil_stride_zero = 0x%x",
1124 fbx->ds_linear.stencil_stride_zero);
1125 }
1126
1127 pandecode_indent--;
1128 pandecode_log("},\n");
1129 }
1130
1131 if (fbx->clear_color_1 | fbx->clear_color_2) {
1132 pandecode_prop("clear_color_1 = 0x%" PRIx32, fbx->clear_color_1);
1133 pandecode_prop("clear_color_2 = 0x%" PRIx32, fbx->clear_color_2);
1134 }
1135
1136 if (fbx->zero3) {
1137 pandecode_msg("XXX: fb_extra zeros tripped\n");
1138 pandecode_prop("zero3 = 0x%" PRIx64, fbx->zero3);
1139 }
1140
1141 pandecode_indent--;
1142 pandecode_log("};\n");
1143
1144 gpu_va += sizeof(struct mali_framebuffer_extra);
1145 }
1146
1147 if (is_fragment)
1148 pandecode_render_target(gpu_va, job_no, fb);
1149
1150 return info;
1151 }
1152
1153 /* Just add a comment decoding the shift/odd fields forming the padded vertices
1154 * count */
1155
1156 static void
1157 pandecode_padded_vertices(unsigned shift, unsigned k)
1158 {
1159 unsigned odd = 2*k + 1;
1160 unsigned pot = 1 << shift;
1161 pandecode_msg("padded_num_vertices = %d\n", odd * pot);
1162 }
1163
1164 /* Given a magic divisor, recover what we were trying to divide by.
1165 *
1166 * Let m represent the magic divisor. By definition, m is an element on Z, whre
1167 * 0 <= m < 2^N, for N bits in m.
1168 *
1169 * Let q represent the number we would like to divide by.
1170 *
1171 * By definition of a magic divisor for N-bit unsigned integers (a number you
1172 * multiply by to magically get division), m is a number such that:
1173 *
1174 * (m * x) & (2^N - 1) = floor(x/q).
1175 * for all x on Z where 0 <= x < 2^N
1176 *
1177 * Ignore the case where any of the above values equals zero; it is irrelevant
1178 * for our purposes (instanced arrays).
1179 *
1180 * Choose x = q. Then:
1181 *
1182 * (m * x) & (2^N - 1) = floor(x/q).
1183 * (m * q) & (2^N - 1) = floor(q/q).
1184 *
1185 * floor(q/q) = floor(1) = 1, therefore:
1186 *
1187 * (m * q) & (2^N - 1) = 1
1188 *
1189 * Recall the identity that the bitwise AND of one less than a power-of-two
1190 * equals the modulo with that power of two, i.e. for all x:
1191 *
1192 * x & (2^N - 1) = x % N
1193 *
1194 * Therefore:
1195 *
1196 * mq % (2^N) = 1
1197 *
1198 * By definition, a modular multiplicative inverse of a number m is the number
1199 * q such that with respect to a modulos M:
1200 *
1201 * mq % M = 1
1202 *
1203 * Therefore, q is the modular multiplicative inverse of m with modulus 2^N.
1204 *
1205 */
1206
1207 static void
1208 pandecode_magic_divisor(uint32_t magic, unsigned shift, unsigned orig_divisor, unsigned extra)
1209 {
1210 #if 0
1211 /* Compute the modular inverse of `magic` with respect to 2^(32 -
1212 * shift) the most lame way possible... just repeatedly add.
1213 * Asymptoptically slow but nobody cares in practice, unless you have
1214 * massive numbers of vertices or high divisors. */
1215
1216 unsigned inverse = 0;
1217
1218 /* Magic implicitly has the highest bit set */
1219 magic |= (1 << 31);
1220
1221 /* Depending on rounding direction */
1222 if (extra)
1223 magic++;
1224
1225 for (;;) {
1226 uint32_t product = magic * inverse;
1227
1228 if (shift) {
1229 product >>= shift;
1230 }
1231
1232 if (product == 1)
1233 break;
1234
1235 ++inverse;
1236 }
1237
1238 pandecode_msg("dividing by %d (maybe off by two)\n", inverse);
1239
1240 /* Recall we're supposed to divide by (gl_level_divisor *
1241 * padded_num_vertices) */
1242
1243 unsigned padded_num_vertices = inverse / orig_divisor;
1244
1245 pandecode_msg("padded_num_vertices = %d\n", padded_num_vertices);
1246 #endif
1247 }
1248
1249 static void
1250 pandecode_attributes(const struct pandecode_mapped_memory *mem,
1251 mali_ptr addr, int job_no, char *suffix,
1252 int count, bool varying, enum mali_job_type job_type)
1253 {
1254 char *prefix = varying ? "varying" : "attribute";
1255 assert(addr);
1256
1257 if (!count) {
1258 pandecode_msg("warn: No %s records\n", prefix);
1259 return;
1260 }
1261
1262 union mali_attr *attr = pandecode_fetch_gpu_mem(mem, addr, sizeof(union mali_attr) * count);
1263
1264 for (int i = 0; i < count; ++i) {
1265 /* First, check for special records */
1266 if (attr[i].elements < MALI_RECORD_SPECIAL) {
1267 if (attr[i].size)
1268 pandecode_msg("XXX: tripped size=%d\n", attr[i].size);
1269
1270 if (attr[i].stride) {
1271 /* gl_InstanceID passes a magic divisor in the
1272 * stride field to divide by the padded vertex
1273 * count. No other records should do so, so
1274 * stride should otherwise be zero. Note that
1275 * stride in the usual attribute sense doesn't
1276 * apply to special records. */
1277
1278 bool has_divisor = attr[i].elements == MALI_ATTR_INSTANCEID;
1279
1280 pandecode_log_cont("/* %smagic divisor = %X */ ",
1281 has_divisor ? "" : "XXX: ", attr[i].stride);
1282 }
1283
1284 if (attr[i].shift || attr[i].extra_flags) {
1285 /* Attributes use these fields for
1286 * instancing/padding/etc type issues, but
1287 * varyings don't */
1288
1289 pandecode_log_cont("/* %sshift=%d, extra=%d */ ",
1290 varying ? "XXX: " : "",
1291 attr[i].shift, attr[i].extra_flags);
1292 }
1293
1294 /* Print the special record name */
1295 bool attribute = false;
1296 pandecode_log("%s_%d = %s;\n", prefix, i, pandecode_special_record(attr[i].elements, &attribute));
1297
1298 /* Sanity check */
1299 if (attribute == varying)
1300 pandecode_msg("XXX: mismatched special record\n");
1301
1302 continue;
1303 }
1304
1305 enum mali_attr_mode mode = attr[i].elements & 7;
1306
1307 if (mode == MALI_ATTR_UNUSED)
1308 pandecode_msg("XXX: unused attribute record\n");
1309
1310 /* For non-linear records, we need to print the type of record */
1311 if (mode != MALI_ATTR_LINEAR)
1312 pandecode_log_cont("%s ", pandecode_attr_mode_short(mode));
1313
1314 /* Print the name to link with attr_meta */
1315 pandecode_log_cont("%s_%d", prefix, i);
1316
1317 /* Print the stride and size */
1318 pandecode_log_cont("<%u>[%u]", attr[i].stride, attr[i].size);
1319
1320 /* TODO: Sanity check the quotient itself. It must be equal to
1321 * (or be greater than, if the driver added padding) the padded
1322 * vertex count. */
1323
1324 /* Finally, print the pointer */
1325 mali_ptr raw_elements = attr[i].elements & ~7;
1326 char *a = pointer_as_memory_reference(raw_elements);
1327 pandecode_log_cont(" = (%s);\n", a);
1328 free(a);
1329
1330 /* Check the pointer */
1331 pandecode_validate_buffer(raw_elements, attr[i].size);
1332
1333 /* shift/extra_flags exist only for instanced */
1334 if (attr[i].shift | attr[i].extra_flags) {
1335 /* These are set to random values by the blob for
1336 * varyings, most likely a symptom of uninitialized
1337 * memory where the hardware masked the bug. As such we
1338 * put this at a warning, not an error. */
1339
1340 if (mode == MALI_ATTR_LINEAR)
1341 pandecode_msg("warn: instancing fields set for linear\n");
1342
1343 pandecode_prop("shift = %d", attr[i].shift);
1344 pandecode_prop("extra_flags = %d", attr[i].extra_flags);
1345 }
1346
1347 /* Decode further where possible */
1348
1349 if (mode == MALI_ATTR_MODULO) {
1350 pandecode_padded_vertices(
1351 attr[i].shift,
1352 attr[i].extra_flags);
1353 }
1354
1355 if (mode == MALI_ATTR_NPOT_DIVIDE) {
1356 i++;
1357 pandecode_log("{\n");
1358 pandecode_indent++;
1359 pandecode_prop("unk = 0x%x", attr[i].unk);
1360 pandecode_prop("magic_divisor = 0x%08x", attr[i].magic_divisor);
1361 if (attr[i].zero != 0)
1362 pandecode_prop("XXX: zero tripped (0x%x)\n", attr[i].zero);
1363 pandecode_prop("divisor = %d", attr[i].divisor);
1364 pandecode_magic_divisor(attr[i].magic_divisor, attr[i - 1].shift, attr[i].divisor, attr[i - 1].extra_flags);
1365 pandecode_indent--;
1366 pandecode_log("}, \n");
1367 }
1368
1369 }
1370
1371 pandecode_log("\n");
1372 }
1373
1374 static mali_ptr
1375 pandecode_shader_address(const char *name, mali_ptr ptr)
1376 {
1377 /* TODO: Decode flags */
1378 mali_ptr shader_ptr = ptr & ~15;
1379
1380 char *a = pointer_as_memory_reference(shader_ptr);
1381 pandecode_prop("%s = (%s) | %d", name, a, (int) (ptr & 15));
1382 free(a);
1383
1384 return shader_ptr;
1385 }
1386
1387 static void
1388 pandecode_blend_equation(const struct mali_blend_equation *blend)
1389 {
1390 if (blend->zero1)
1391 pandecode_msg("XXX: blend zero tripped: %X\n", blend->zero1);
1392
1393 pandecode_log(".equation = {\n");
1394 pandecode_indent++;
1395
1396 pandecode_prop("rgb_mode = 0x%X", blend->rgb_mode);
1397 pandecode_prop("alpha_mode = 0x%X", blend->alpha_mode);
1398
1399 pandecode_log(".color_mask = ");
1400 pandecode_log_decoded_flags(mask_flag_info, blend->color_mask);
1401 pandecode_log_cont(",\n");
1402
1403 pandecode_indent--;
1404 pandecode_log("},\n");
1405 }
1406
1407 /* Decodes a Bifrost blend constant. See the notes in bifrost_blend_rt */
1408
1409 static unsigned
1410 decode_bifrost_constant(u16 constant)
1411 {
1412 float lo = (float) (constant & 0xFF);
1413 float hi = (float) (constant >> 8);
1414
1415 return (hi / 255.0) + (lo / 65535.0);
1416 }
1417
1418 static mali_ptr
1419 pandecode_bifrost_blend(void *descs, int job_no, int rt_no)
1420 {
1421 struct bifrost_blend_rt *b =
1422 ((struct bifrost_blend_rt *) descs) + rt_no;
1423
1424 pandecode_log("struct bifrost_blend_rt blend_rt_%d_%d = {\n", job_no, rt_no);
1425 pandecode_indent++;
1426
1427 pandecode_prop("flags = 0x%" PRIx16, b->flags);
1428 pandecode_prop("constant = 0x%" PRIx8 " /* %f */",
1429 b->constant, decode_bifrost_constant(b->constant));
1430
1431 /* TODO figure out blend shader enable bit */
1432 pandecode_blend_equation(&b->equation);
1433
1434 pandecode_prop("unk2 = 0x%" PRIx16, b->unk2);
1435 pandecode_prop("index = 0x%" PRIx16, b->index);
1436
1437 pandecode_log(".format = %s", mali_format_as_str(b->format));
1438 pandecode_swizzle(b->swizzle, b->format);
1439 pandecode_log_cont(",\n");
1440
1441 pandecode_prop("swizzle = 0x%" PRIx32, b->swizzle);
1442 pandecode_prop("format = 0x%" PRIx32, b->format);
1443
1444 if (b->zero1) {
1445 pandecode_msg("XXX: pandecode_bifrost_blend zero1 tripped\n");
1446 pandecode_prop("zero1 = 0x%" PRIx32, b->zero1);
1447 }
1448
1449 pandecode_log(".shader_type = ");
1450 switch(b->shader_type) {
1451 case BIFROST_BLEND_F16:
1452 pandecode_log_cont("BIFROST_BLEND_F16");
1453 break;
1454 case BIFROST_BLEND_F32:
1455 pandecode_log_cont("BIFROST_BLEND_F32");
1456 break;
1457 case BIFROST_BLEND_I32:
1458 pandecode_log_cont("BIFROST_BLEND_I32");
1459 break;
1460 case BIFROST_BLEND_U32:
1461 pandecode_log_cont("BIFROST_BLEND_U32");
1462 break;
1463 case BIFROST_BLEND_I16:
1464 pandecode_log_cont("BIFROST_BLEND_I16");
1465 break;
1466 case BIFROST_BLEND_U16:
1467 pandecode_log_cont("BIFROST_BLEND_U16");
1468 break;
1469 }
1470 pandecode_log_cont(",\n");
1471
1472 if (b->zero2) {
1473 pandecode_msg("XXX: pandecode_bifrost_blend zero2 tripped\n");
1474 pandecode_prop("zero2 = 0x%" PRIx32, b->zero2);
1475 }
1476
1477 pandecode_prop("shader = 0x%" PRIx32, b->shader);
1478
1479 pandecode_indent--;
1480 pandecode_log("},\n");
1481
1482 return 0;
1483 }
1484
1485 static mali_ptr
1486 pandecode_midgard_blend(union midgard_blend *blend, bool is_shader)
1487 {
1488 /* constant/equation is in a union */
1489 if (!blend->shader)
1490 return 0;
1491
1492 pandecode_log(".blend = {\n");
1493 pandecode_indent++;
1494
1495 if (is_shader) {
1496 pandecode_shader_address("shader", blend->shader);
1497 } else {
1498 pandecode_blend_equation(&blend->equation);
1499 pandecode_prop("constant = %f", blend->constant);
1500 }
1501
1502 pandecode_indent--;
1503 pandecode_log("},\n");
1504
1505 /* Return blend shader to disassemble if present */
1506 return is_shader ? (blend->shader & ~0xF) : 0;
1507 }
1508
1509 static mali_ptr
1510 pandecode_midgard_blend_mrt(void *descs, int job_no, int rt_no)
1511 {
1512 struct midgard_blend_rt *b =
1513 ((struct midgard_blend_rt *) descs) + rt_no;
1514
1515 /* Flags determine presence of blend shader */
1516 bool is_shader = (b->flags & 0xF) >= 0x2;
1517
1518 pandecode_log("struct midgard_blend_rt blend_rt_%d_%d = {\n", job_no, rt_no);
1519 pandecode_indent++;
1520
1521 pandecode_prop("flags = 0x%" PRIx64, b->flags);
1522
1523 union midgard_blend blend = b->blend;
1524 mali_ptr shader = pandecode_midgard_blend(&blend, is_shader);
1525
1526 pandecode_indent--;
1527 pandecode_log("};\n");
1528
1529 return shader;
1530 }
1531
1532 /* Attributes and varyings have descriptor records, which contain information
1533 * about their format and ordering with the attribute/varying buffers. We'll
1534 * want to validate that the combinations specified are self-consistent.
1535 */
1536
1537 static int
1538 pandecode_attribute_meta(int job_no, int count, const struct mali_vertex_tiler_postfix *v, bool varying, char *suffix)
1539 {
1540 char base[128];
1541 char *prefix = varying ? "varying" : "attribute";
1542 unsigned max_index = 0;
1543 snprintf(base, sizeof(base), "%s_meta", prefix);
1544
1545 struct mali_attr_meta *attr_meta;
1546 mali_ptr p = varying ? v->varying_meta : v->attribute_meta;
1547
1548 struct pandecode_mapped_memory *attr_mem = pandecode_find_mapped_gpu_mem_containing(p);
1549
1550 for (int i = 0; i < count; ++i, p += sizeof(struct mali_attr_meta)) {
1551 attr_meta = pandecode_fetch_gpu_mem(attr_mem, p,
1552 sizeof(*attr_mem));
1553
1554 /* If the record is discard, it should be zero for everything else */
1555
1556 if (attr_meta->format == MALI_VARYING_DISCARD) {
1557 uint64_t zero =
1558 attr_meta->index |
1559 attr_meta->unknown1 |
1560 attr_meta->unknown3 |
1561 attr_meta->src_offset;
1562
1563 if (zero)
1564 pandecode_msg("XXX: expected empty record for varying discard\n");
1565
1566 /* We want to look for a literal 0000 swizzle -- this
1567 * is not encoded with all zeroes, however */
1568
1569 enum mali_channel z = MALI_CHANNEL_ZERO;
1570 unsigned zero_swizzle = z | (z << 3) | (z << 6) | (z << 9);
1571 bool good_swizzle = attr_meta->swizzle == zero_swizzle;
1572
1573 if (!good_swizzle)
1574 pandecode_msg("XXX: expected zero swizzle for discard\n");
1575
1576 if (!varying)
1577 pandecode_msg("XXX: cannot discard attribute\n");
1578
1579 /* If we're all good, omit the record */
1580 if (!zero && varying && good_swizzle) {
1581 pandecode_log("/* discarded varying */\n");
1582 continue;
1583 }
1584 }
1585
1586 if (attr_meta->index > max_index)
1587 max_index = attr_meta->index;
1588
1589 if (attr_meta->unknown1 != 0x2) {
1590 pandecode_msg("XXX: expected unknown1 = 0x2\n");
1591 pandecode_prop("unknown1 = 0x%" PRIx64, (u64) attr_meta->unknown1);
1592 }
1593
1594 if (attr_meta->unknown3) {
1595 pandecode_msg("XXX: unexpected unknown3 set\n");
1596 pandecode_prop("unknown3 = 0x%" PRIx64, (u64) attr_meta->unknown3);
1597 }
1598
1599 pandecode_log_cont("%s %s_%u", mali_format_as_str(attr_meta->format), prefix, attr_meta->index);
1600
1601 if (attr_meta->src_offset)
1602 pandecode_log_cont("[%u]", attr_meta->src_offset);
1603
1604 pandecode_swizzle(attr_meta->swizzle, attr_meta->format);
1605
1606 pandecode_log_cont(";\n");
1607 }
1608
1609 pandecode_log("\n");
1610
1611 return count ? (max_index + 1) : 0;
1612 }
1613
1614 /* return bits [lo, hi) of word */
1615 static u32
1616 bits(u32 word, u32 lo, u32 hi)
1617 {
1618 if (hi - lo >= 32)
1619 return word; // avoid undefined behavior with the shift
1620
1621 return (word >> lo) & ((1 << (hi - lo)) - 1);
1622 }
1623
1624 static void
1625 pandecode_vertex_tiler_prefix(struct mali_vertex_tiler_prefix *p, int job_no, bool graphics)
1626 {
1627 pandecode_log(".prefix = {\n");
1628 pandecode_indent++;
1629
1630 /* Decode invocation_count. See the comment before the definition of
1631 * invocation_count for an explanation.
1632 */
1633
1634 unsigned size_y_shift = bits(p->invocation_shifts, 0, 5);
1635 unsigned size_z_shift = bits(p->invocation_shifts, 5, 10);
1636 unsigned workgroups_x_shift = bits(p->invocation_shifts, 10, 16);
1637 unsigned workgroups_y_shift = bits(p->invocation_shifts, 16, 22);
1638 unsigned workgroups_z_shift = bits(p->invocation_shifts, 22, 28);
1639 unsigned workgroups_x_shift_2 = bits(p->invocation_shifts, 28, 32);
1640
1641 unsigned size_x = bits(p->invocation_count, 0, size_y_shift) + 1;
1642 unsigned size_y = bits(p->invocation_count, size_y_shift, size_z_shift) + 1;
1643 unsigned size_z = bits(p->invocation_count, size_z_shift, workgroups_x_shift) + 1;
1644
1645 unsigned groups_x = bits(p->invocation_count, workgroups_x_shift, workgroups_y_shift) + 1;
1646 unsigned groups_y = bits(p->invocation_count, workgroups_y_shift, workgroups_z_shift) + 1;
1647 unsigned groups_z = bits(p->invocation_count, workgroups_z_shift, 32) + 1;
1648
1649 /* Even though we have this decoded, we want to ensure that the
1650 * representation is "unique" so we don't lose anything by printing only
1651 * the final result. More specifically, we need to check that we were
1652 * passed something in canonical form, since the definition per the
1653 * hardware is inherently not unique. How? Well, take the resulting
1654 * decode and pack it ourselves! If it is bit exact with what we
1655 * decoded, we're good to go. */
1656
1657 struct mali_vertex_tiler_prefix ref;
1658 panfrost_pack_work_groups_compute(&ref, groups_x, groups_y, groups_z, size_x, size_y, size_z, graphics);
1659
1660 bool canonical =
1661 (p->invocation_count == ref.invocation_count) &&
1662 (p->invocation_shifts == ref.invocation_shifts);
1663
1664 if (!canonical) {
1665 pandecode_msg("XXX: non-canonical workgroups packing\n");
1666 pandecode_msg("expected: %X, %X",
1667 ref.invocation_count,
1668 ref.invocation_shifts);
1669
1670 pandecode_prop("invocation_count = 0x%" PRIx32, p->invocation_count);
1671 pandecode_prop("size_y_shift = %d", size_y_shift);
1672 pandecode_prop("size_z_shift = %d", size_z_shift);
1673 pandecode_prop("workgroups_x_shift = %d", workgroups_x_shift);
1674 pandecode_prop("workgroups_y_shift = %d", workgroups_y_shift);
1675 pandecode_prop("workgroups_z_shift = %d", workgroups_z_shift);
1676 pandecode_prop("workgroups_x_shift_2 = %d", workgroups_x_shift_2);
1677 }
1678
1679 /* Regardless, print the decode */
1680 pandecode_msg("size (%d, %d, %d), count (%d, %d, %d)\n",
1681 size_x, size_y, size_z,
1682 groups_x, groups_y, groups_z);
1683
1684 /* TODO: Decode */
1685 if (p->unknown_draw)
1686 pandecode_prop("unknown_draw = 0x%" PRIx32, p->unknown_draw);
1687
1688 pandecode_prop("workgroups_x_shift_3 = 0x%" PRIx32, p->workgroups_x_shift_3);
1689
1690 if (p->draw_mode != MALI_DRAW_MODE_NONE)
1691 pandecode_prop("draw_mode = %s", mali_draw_mode_as_str(p->draw_mode));
1692
1693 /* Index count only exists for tiler jobs anyway */
1694
1695 if (p->index_count)
1696 pandecode_prop("index_count = MALI_POSITIVE(%" PRId32 ")", p->index_count + 1);
1697
1698
1699 unsigned index_raw_size = (p->unknown_draw & MALI_DRAW_INDEXED_SIZE);
1700 index_raw_size >>= MALI_DRAW_INDEXED_SHIFT;
1701
1702 /* Validate an index buffer is present if we need one. TODO: verify
1703 * relationship between invocation_count and index_count */
1704
1705 if (p->indices) {
1706 unsigned count = p->index_count;
1707
1708 /* Grab the size */
1709 unsigned size = (index_raw_size == 0x3) ? 4 : index_raw_size;
1710
1711 /* Ensure we got a size, and if so, validate the index buffer
1712 * is large enough to hold a full set of indices of the given
1713 * size */
1714
1715 if (!index_raw_size)
1716 pandecode_msg("XXX: index size missing\n");
1717 else
1718 pandecode_validate_buffer(p->indices, count * size);
1719 } else if (index_raw_size)
1720 pandecode_msg("XXX: unexpected index size %u\n", index_raw_size);
1721
1722 if (p->offset_bias_correction)
1723 pandecode_prop("offset_bias_correction = %d", p->offset_bias_correction);
1724
1725 /* TODO: Figure out what this is. It's not zero */
1726 pandecode_prop("zero1 = 0x%" PRIx32, p->zero1);
1727
1728 pandecode_indent--;
1729 pandecode_log("},\n");
1730 }
1731
1732 static void
1733 pandecode_uniform_buffers(mali_ptr pubufs, int ubufs_count, int job_no)
1734 {
1735 struct pandecode_mapped_memory *umem = pandecode_find_mapped_gpu_mem_containing(pubufs);
1736 uint64_t *PANDECODE_PTR_VAR(ubufs, umem, pubufs);
1737
1738 for (int i = 0; i < ubufs_count; i++) {
1739 unsigned size = (ubufs[i] & ((1 << 10) - 1)) * 16;
1740 mali_ptr addr = (ubufs[i] >> 10) << 2;
1741
1742 pandecode_validate_buffer(addr, size);
1743
1744 char *ptr = pointer_as_memory_reference(addr);
1745 pandecode_log("ubuf_%d[%u] = %s;\n", i, size, ptr);
1746 free(ptr);
1747 }
1748
1749 pandecode_log("\n");
1750 }
1751
1752 static void
1753 pandecode_uniforms(mali_ptr uniforms, unsigned uniform_count)
1754 {
1755 pandecode_validate_buffer(uniforms, uniform_count * 16);
1756
1757 char *ptr = pointer_as_memory_reference(uniforms);
1758 pandecode_log("vec4 uniforms[%u] = %s;\n", uniform_count, ptr);
1759 free(ptr);
1760 }
1761
1762 static const char *
1763 shader_type_for_job(unsigned type)
1764 {
1765 switch (type) {
1766 case MALI_JOB_TYPE_VERTEX: return "VERTEX";
1767 case MALI_JOB_TYPE_TILER: return "FRAGMENT";
1768 case MALI_JOB_TYPE_COMPUTE: return "COMPUTE";
1769 default:
1770 return "UNKNOWN";
1771 }
1772 }
1773
1774 static unsigned shader_id = 0;
1775
1776 static struct midgard_disasm_stats
1777 pandecode_shader_disassemble(mali_ptr shader_ptr, int shader_no, int type,
1778 bool is_bifrost, unsigned gpu_id)
1779 {
1780 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(shader_ptr);
1781 uint8_t *PANDECODE_PTR_VAR(code, mem, shader_ptr);
1782
1783 /* Compute maximum possible size */
1784 size_t sz = mem->length - (shader_ptr - mem->gpu_va);
1785
1786 /* Print some boilerplate to clearly denote the assembly (which doesn't
1787 * obey indentation rules), and actually do the disassembly! */
1788
1789 pandecode_log_cont("\n\n");
1790
1791 struct midgard_disasm_stats stats;
1792
1793 if (is_bifrost) {
1794 disassemble_bifrost(pandecode_dump_stream, code, sz, true);
1795
1796 /* TODO: Extend stats to Bifrost */
1797 stats.texture_count = -128;
1798 stats.sampler_count = -128;
1799 stats.attribute_count = -128;
1800 stats.varying_count = -128;
1801 stats.uniform_count = -128;
1802 stats.uniform_buffer_count = -128;
1803 stats.work_count = -128;
1804
1805 stats.instruction_count = 0;
1806 stats.bundle_count = 0;
1807 stats.quadword_count = 0;
1808 stats.helper_invocations = false;
1809 } else {
1810 stats = disassemble_midgard(pandecode_dump_stream,
1811 code, sz, gpu_id,
1812 type == MALI_JOB_TYPE_TILER ?
1813 MESA_SHADER_FRAGMENT : MESA_SHADER_VERTEX);
1814 }
1815
1816 /* Print shader-db stats. Skip COMPUTE jobs since they are used for
1817 * driver-internal purposes with the blob and interfere */
1818
1819 bool should_shaderdb = type != MALI_JOB_TYPE_COMPUTE;
1820
1821 if (should_shaderdb) {
1822 unsigned nr_threads =
1823 (stats.work_count <= 4) ? 4 :
1824 (stats.work_count <= 8) ? 2 :
1825 1;
1826
1827 pandecode_log_cont("shader%d - MESA_SHADER_%s shader: "
1828 "%u inst, %u bundles, %u quadwords, "
1829 "%u registers, %u threads, 0 loops, 0:0 spills:fills\n\n\n",
1830 shader_id++,
1831 shader_type_for_job(type),
1832 stats.instruction_count, stats.bundle_count, stats.quadword_count,
1833 stats.work_count, nr_threads);
1834 }
1835
1836
1837 return stats;
1838 }
1839
1840 static void
1841 pandecode_texture_payload(mali_ptr payload,
1842 enum mali_texture_dimension dim,
1843 enum mali_texture_layout layout,
1844 bool manual_stride,
1845 uint8_t levels,
1846 uint16_t depth,
1847 uint16_t array_size,
1848 struct pandecode_mapped_memory *tmem)
1849 {
1850 pandecode_log(".payload = {\n");
1851 pandecode_indent++;
1852
1853 /* A bunch of bitmap pointers follow.
1854 * We work out the correct number,
1855 * based on the mipmap/cubemap
1856 * properties, but dump extra
1857 * possibilities to futureproof */
1858
1859 int bitmap_count = levels + 1;
1860
1861 /* Miptree for each face */
1862 if (dim == MALI_TEXTURE_DIMENSION_CUBE)
1863 bitmap_count *= 6;
1864
1865 /* Array of layers */
1866 bitmap_count *= depth;
1867
1868 /* Array of textures */
1869 bitmap_count *= array_size;
1870
1871 /* Stride for each element */
1872 if (manual_stride)
1873 bitmap_count *= 2;
1874
1875 mali_ptr *pointers_and_strides = pandecode_fetch_gpu_mem(tmem,
1876 payload, sizeof(mali_ptr) * bitmap_count);
1877 for (int i = 0; i < bitmap_count; ++i) {
1878 /* How we dump depends if this is a stride or a pointer */
1879
1880 if (manual_stride && (i & 1)) {
1881 /* signed 32-bit snuck in as a 64-bit pointer */
1882 uint64_t stride_set = pointers_and_strides[i];
1883 uint32_t clamped_stride = stride_set;
1884 int32_t stride = clamped_stride;
1885 assert(stride_set == clamped_stride);
1886 pandecode_log("(mali_ptr) %d /* stride */, \n", stride);
1887 } else {
1888 char *a = pointer_as_memory_reference(pointers_and_strides[i]);
1889 pandecode_log("%s, \n", a);
1890 free(a);
1891 }
1892 }
1893
1894 pandecode_indent--;
1895 pandecode_log("},\n");
1896 }
1897
1898 static void
1899 pandecode_texture(mali_ptr u,
1900 struct pandecode_mapped_memory *tmem,
1901 unsigned job_no, unsigned tex)
1902 {
1903 struct pandecode_mapped_memory *mapped_mem = pandecode_find_mapped_gpu_mem_containing(u);
1904 const uint8_t *cl = pandecode_fetch_gpu_mem(mapped_mem, u, MALI_MIDGARD_TEXTURE_LENGTH);
1905
1906 struct MALI_MIDGARD_TEXTURE temp;
1907 MALI_MIDGARD_TEXTURE_unpack(cl, &temp);
1908 MALI_MIDGARD_TEXTURE_print(pandecode_dump_stream, &temp, 2);
1909
1910 pandecode_texture_payload(u + MALI_MIDGARD_TEXTURE_LENGTH,
1911 temp.dimension, temp.texel_ordering, temp.manual_stride,
1912 temp.levels, temp.depth, temp.array_size, mapped_mem);
1913 }
1914
1915 static void
1916 pandecode_bifrost_texture(
1917 const void *cl,
1918 unsigned job_no,
1919 unsigned tex)
1920 {
1921 struct MALI_BIFROST_TEXTURE temp;
1922 MALI_BIFROST_TEXTURE_unpack(cl, &temp);
1923 MALI_BIFROST_TEXTURE_print(pandecode_dump_stream, &temp, 2);
1924
1925 struct pandecode_mapped_memory *tmem = pandecode_find_mapped_gpu_mem_containing(temp.surfaces);
1926 pandecode_texture_payload(temp.surfaces, temp.dimension, temp.texel_ordering,
1927 true, temp.levels, 1, 1, tmem);
1928 }
1929
1930 /* For shader properties like texture_count, we have a claimed property in the shader_meta, and the actual Truth from static analysis (this may just be an upper limit). We validate accordingly */
1931
1932 static void
1933 pandecode_shader_prop(const char *name, unsigned claim, signed truth, bool fuzzy)
1934 {
1935 /* Nothing to do */
1936 if (claim == truth)
1937 return;
1938
1939 if (fuzzy && (truth < 0))
1940 pandecode_msg("XXX: fuzzy %s, claimed %d, expected %d\n", name, claim, truth);
1941
1942 if ((truth >= 0) && !fuzzy) {
1943 pandecode_msg("%s: expected %s = %d, claimed %u\n",
1944 (truth < claim) ? "warn" : "XXX",
1945 name, truth, claim);
1946 } else if ((claim > -truth) && !fuzzy) {
1947 pandecode_msg("XXX: expected %s <= %u, claimed %u\n",
1948 name, -truth, claim);
1949 } else if (fuzzy && (claim < truth))
1950 pandecode_msg("XXX: expected %s >= %u, claimed %u\n",
1951 name, truth, claim);
1952
1953 pandecode_log(".%s = %" PRId16, name, claim);
1954
1955 if (fuzzy)
1956 pandecode_log_cont(" /* %u used */", truth);
1957
1958 pandecode_log_cont(",\n");
1959 }
1960
1961 static void
1962 pandecode_blend_shader_disassemble(mali_ptr shader, int job_no, int job_type,
1963 bool is_bifrost, unsigned gpu_id)
1964 {
1965 struct midgard_disasm_stats stats =
1966 pandecode_shader_disassemble(shader, job_no, job_type, is_bifrost, gpu_id);
1967
1968 bool has_texture = (stats.texture_count > 0);
1969 bool has_sampler = (stats.sampler_count > 0);
1970 bool has_attribute = (stats.attribute_count > 0);
1971 bool has_varying = (stats.varying_count > 0);
1972 bool has_uniform = (stats.uniform_count > 0);
1973 bool has_ubo = (stats.uniform_buffer_count > 0);
1974
1975 if (has_texture || has_sampler)
1976 pandecode_msg("XXX: blend shader accessing textures\n");
1977
1978 if (has_attribute || has_varying)
1979 pandecode_msg("XXX: blend shader accessing interstage\n");
1980
1981 if (has_uniform || has_ubo)
1982 pandecode_msg("XXX: blend shader accessing uniforms\n");
1983 }
1984
1985 static void
1986 pandecode_textures(mali_ptr textures, unsigned texture_count, int job_no, bool is_bifrost)
1987 {
1988 struct pandecode_mapped_memory *mmem = pandecode_find_mapped_gpu_mem_containing(textures);
1989
1990 if (!mmem)
1991 return;
1992
1993 pandecode_log("Textures (%"PRIx64"):\n", textures);
1994
1995 if (is_bifrost) {
1996 const void *cl = pandecode_fetch_gpu_mem(mmem,
1997 textures, MALI_BIFROST_TEXTURE_LENGTH *
1998 texture_count);
1999
2000 for (unsigned tex = 0; tex < texture_count; ++tex) {
2001 pandecode_bifrost_texture(cl +
2002 MALI_BIFROST_TEXTURE_LENGTH * tex,
2003 job_no, tex);
2004 }
2005 } else {
2006 mali_ptr *PANDECODE_PTR_VAR(u, mmem, textures);
2007
2008 for (int tex = 0; tex < texture_count; ++tex) {
2009 mali_ptr *PANDECODE_PTR_VAR(u, mmem, textures + tex * sizeof(mali_ptr));
2010 char *a = pointer_as_memory_reference(*u);
2011 pandecode_log("%s,\n", a);
2012 free(a);
2013 }
2014
2015 /* Now, finally, descend down into the texture descriptor */
2016 for (unsigned tex = 0; tex < texture_count; ++tex) {
2017 mali_ptr *PANDECODE_PTR_VAR(u, mmem, textures + tex * sizeof(mali_ptr));
2018 struct pandecode_mapped_memory *tmem = pandecode_find_mapped_gpu_mem_containing(*u);
2019 if (tmem)
2020 pandecode_texture(*u, tmem, job_no, tex);
2021 }
2022 }
2023 }
2024
2025 static void
2026 pandecode_samplers(mali_ptr samplers, unsigned sampler_count, int job_no, bool is_bifrost)
2027 {
2028 for (int i = 0; i < sampler_count; ++i) {
2029 if (is_bifrost) {
2030 DUMP_ADDR("Sampler", BIFROST_SAMPLER, samplers + (MALI_BIFROST_SAMPLER_LENGTH * i), 1);
2031 } else {
2032 DUMP_ADDR("Sampler", MIDGARD_SAMPLER, samplers + (MALI_MIDGARD_SAMPLER_LENGTH * i), 1);
2033 }
2034 }
2035 }
2036
2037 static void
2038 pandecode_vertex_tiler_postfix_pre(
2039 const struct mali_vertex_tiler_postfix *p,
2040 int job_no, enum mali_job_type job_type,
2041 char *suffix, bool is_bifrost, unsigned gpu_id)
2042 {
2043 struct pandecode_mapped_memory *attr_mem;
2044
2045 /* On Bifrost, since the tiler heap (for tiler jobs) and the scratchpad
2046 * are the only things actually needed from the FBD, vertex/tiler jobs
2047 * no longer reference the FBD -- instead, this field points to some
2048 * info about the scratchpad.
2049 */
2050
2051 struct pandecode_fbd fbd_info = {
2052 /* Default for Bifrost */
2053 .rt_count = 1
2054 };
2055
2056 if (is_bifrost) {
2057 pandecode_log_cont("\t/* %X %/\n", p->shared_memory & 1);
2058 pandecode_compute_fbd(p->shared_memory & ~1, job_no);
2059 } else if (p->shared_memory & MALI_MFBD)
2060 fbd_info = pandecode_mfbd_bfr((u64) ((uintptr_t) p->shared_memory) & FBD_MASK, job_no, false, job_type == MALI_JOB_TYPE_COMPUTE, false);
2061 else if (job_type == MALI_JOB_TYPE_COMPUTE)
2062 pandecode_compute_fbd((u64) (uintptr_t) p->shared_memory, job_no);
2063 else
2064 fbd_info = pandecode_sfbd((u64) (uintptr_t) p->shared_memory, job_no, false, gpu_id);
2065
2066 int varying_count = 0, attribute_count = 0, uniform_count = 0, uniform_buffer_count = 0;
2067 int texture_count = 0, sampler_count = 0;
2068
2069 if (p->shader) {
2070 struct pandecode_mapped_memory *smem = pandecode_find_mapped_gpu_mem_containing(p->shader);
2071 struct mali_shader_meta *PANDECODE_PTR_VAR(s, smem, p->shader);
2072
2073 /* Disassemble ahead-of-time to get stats. Initialize with
2074 * stats for the missing-shader case so we get validation
2075 * there, too */
2076
2077 struct midgard_disasm_stats info = {
2078 .texture_count = 0,
2079 .sampler_count = 0,
2080 .attribute_count = 0,
2081 .varying_count = 0,
2082 .work_count = 1,
2083
2084 .uniform_count = -128,
2085 .uniform_buffer_count = 0
2086 };
2087
2088 if (s->shader & ~0xF)
2089 info = pandecode_shader_disassemble(s->shader & ~0xF, job_no, job_type, is_bifrost, gpu_id);
2090
2091 pandecode_log("struct mali_shader_meta shader_meta_%"PRIx64"_%d%s = {\n", p->shader, job_no, suffix);
2092 pandecode_indent++;
2093
2094 /* Save for dumps */
2095 attribute_count = s->attribute_count;
2096 varying_count = s->varying_count;
2097 texture_count = s->texture_count;
2098 sampler_count = s->sampler_count;
2099
2100 if (is_bifrost) {
2101 uniform_count = s->bifrost2.uniform_count;
2102 uniform_buffer_count = s->bifrost1.uniform_buffer_count;
2103 } else {
2104 uniform_count = s->midgard1.uniform_count;
2105 uniform_buffer_count = s->midgard1.uniform_buffer_count;
2106 }
2107
2108 pandecode_shader_address("shader", s->shader);
2109
2110 pandecode_shader_prop("texture_count", s->texture_count, info.texture_count, false);
2111 pandecode_shader_prop("sampler_count", s->sampler_count, info.sampler_count, false);
2112 pandecode_shader_prop("attribute_count", s->attribute_count, info.attribute_count, false);
2113 pandecode_shader_prop("varying_count", s->varying_count, info.varying_count, false);
2114 pandecode_shader_prop("uniform_buffer_count",
2115 uniform_buffer_count,
2116 info.uniform_buffer_count, true);
2117
2118 if (!is_bifrost) {
2119 pandecode_shader_prop("uniform_count",
2120 uniform_count,
2121 info.uniform_count, false);
2122
2123 pandecode_shader_prop("work_count",
2124 s->midgard1.work_count, info.work_count, false);
2125 }
2126
2127 if (is_bifrost) {
2128 pandecode_log("bifrost1.unk1 = ");
2129 pandecode_log_decoded_flags(shader_bifrost_info, s->bifrost1.unk1);
2130 pandecode_log_cont(",\n");
2131 } else {
2132 bool helpers = s->midgard1.flags_lo & MALI_HELPER_INVOCATIONS;
2133
2134 if (helpers != info.helper_invocations) {
2135 pandecode_msg("XXX: expected helpers %u but got %u\n",
2136 info.helper_invocations, helpers);
2137 }
2138
2139 pandecode_log(".midgard1.flags_lo = ");
2140 pandecode_log_decoded_flags(shader_midgard1_flag_lo_info,
2141 s->midgard1.flags_lo & ~MALI_HELPER_INVOCATIONS);
2142 pandecode_log_cont(",\n");
2143
2144 pandecode_log(".midgard1.flags_hi = ");
2145 pandecode_log_decoded_flags(shader_midgard1_flag_hi_info, s->midgard1.flags_hi);
2146 pandecode_log_cont(",\n");
2147 }
2148
2149 if (s->depth_units || s->depth_factor) {
2150 pandecode_prop("depth_factor = %f", s->depth_factor);
2151 pandecode_prop("depth_units = %f", s->depth_units);
2152 }
2153
2154 if (s->coverage_mask)
2155 pandecode_prop("coverage_mask = 0x%X", s->coverage_mask);
2156
2157 if (s->unknown2_2)
2158 pandecode_prop(".unknown2_2 = %X", s->unknown2_2);
2159
2160 if (s->unknown2_3 || s->unknown2_4) {
2161 pandecode_log(".unknown2_3 = ");
2162
2163 int unknown2_3 = s->unknown2_3;
2164 int unknown2_4 = s->unknown2_4;
2165
2166 /* We're not quite sure what these flags mean without the depth test, if anything */
2167
2168 if (unknown2_3 & (MALI_DEPTH_WRITEMASK | MALI_DEPTH_FUNC_MASK)) {
2169 const char *func = mali_func_as_str(MALI_GET_DEPTH_FUNC(unknown2_3));
2170 unknown2_3 &= ~MALI_DEPTH_FUNC_MASK;
2171
2172 pandecode_log_cont("MALI_DEPTH_FUNC(%s) | ", func);
2173 }
2174
2175 pandecode_log_decoded_flags(u3_flag_info, unknown2_3);
2176 pandecode_log_cont(",\n");
2177
2178 pandecode_log(".unknown2_4 = ");
2179 pandecode_log_decoded_flags(u4_flag_info, unknown2_4);
2180 pandecode_log_cont(",\n");
2181 }
2182
2183 if (s->stencil_mask_front || s->stencil_mask_back) {
2184 pandecode_prop("stencil_mask_front = 0x%02X", s->stencil_mask_front);
2185 pandecode_prop("stencil_mask_back = 0x%02X", s->stencil_mask_back);
2186 }
2187
2188 DUMP_CL("Stencil front", STENCIL, &s->stencil_front, 1);
2189 DUMP_CL("Stencil back", STENCIL, &s->stencil_back, 1);
2190
2191 if (is_bifrost) {
2192 pandecode_log(".bifrost2 = {\n");
2193 pandecode_indent++;
2194
2195 pandecode_prop("unk3 = 0x%" PRIx32, s->bifrost2.unk3);
2196 pandecode_prop("preload_regs = 0x%" PRIx32, s->bifrost2.preload_regs);
2197 pandecode_prop("uniform_count = %" PRId32, s->bifrost2.uniform_count);
2198 pandecode_prop("unk4 = 0x%" PRIx32, s->bifrost2.unk4);
2199
2200 pandecode_indent--;
2201 pandecode_log("},\n");
2202 } else if (s->midgard2.unknown2_7) {
2203 pandecode_log(".midgard2 = {\n");
2204 pandecode_indent++;
2205
2206 pandecode_prop("unknown2_7 = 0x%" PRIx32, s->midgard2.unknown2_7);
2207 pandecode_indent--;
2208 pandecode_log("},\n");
2209 }
2210
2211 if (s->padding) {
2212 pandecode_msg("XXX: shader padding tripped\n");
2213 pandecode_prop("padding = 0x%" PRIx32, s->padding);
2214 }
2215
2216 if (!is_bifrost) {
2217 /* TODO: Blend shaders routing/disasm */
2218 union midgard_blend blend = s->blend;
2219 mali_ptr shader = pandecode_midgard_blend(&blend, s->unknown2_3 & MALI_HAS_BLEND_SHADER);
2220 if (shader & ~0xF)
2221 pandecode_blend_shader_disassemble(shader, job_no, job_type, false, gpu_id);
2222 } else {
2223 pandecode_msg("mdg_blend = %" PRIx64 "\n", s->blend.shader);
2224 }
2225
2226 pandecode_indent--;
2227 pandecode_log("};\n");
2228
2229 /* MRT blend fields are used whenever MFBD is used, with
2230 * per-RT descriptors */
2231
2232 if (job_type == MALI_JOB_TYPE_TILER && (is_bifrost || p->shared_memory & MALI_MFBD)) {
2233 void* blend_base = (void *) (s + 1);
2234
2235 for (unsigned i = 0; i < fbd_info.rt_count; i++) {
2236 mali_ptr shader = 0;
2237
2238 if (is_bifrost)
2239 shader = pandecode_bifrost_blend(blend_base, job_no, i);
2240 else
2241 shader = pandecode_midgard_blend_mrt(blend_base, job_no, i);
2242
2243 if (shader & ~0xF)
2244 pandecode_blend_shader_disassemble(shader, job_no, job_type, false, gpu_id);
2245
2246 }
2247 }
2248 } else
2249 pandecode_msg("XXX: missing shader descriptor\n");
2250
2251 if (p->viewport)
2252 DUMP_ADDR("Viewport", VIEWPORT, p->viewport, 1);
2253
2254 unsigned max_attr_index = 0;
2255
2256 if (p->attribute_meta)
2257 max_attr_index = pandecode_attribute_meta(job_no, attribute_count, p, false, suffix);
2258
2259 if (p->attributes) {
2260 attr_mem = pandecode_find_mapped_gpu_mem_containing(p->attributes);
2261 pandecode_attributes(attr_mem, p->attributes, job_no, suffix, max_attr_index, false, job_type);
2262 }
2263
2264 /* Varyings are encoded like attributes but not actually sent; we just
2265 * pass a zero buffer with the right stride/size set, (or whatever)
2266 * since the GPU will write to it itself */
2267
2268 if (p->varying_meta) {
2269 varying_count = pandecode_attribute_meta(job_no, varying_count, p, true, suffix);
2270 }
2271
2272 if (p->varyings) {
2273 attr_mem = pandecode_find_mapped_gpu_mem_containing(p->varyings);
2274
2275 /* Number of descriptors depends on whether there are
2276 * non-internal varyings */
2277
2278 pandecode_attributes(attr_mem, p->varyings, job_no, suffix, varying_count, true, job_type);
2279 }
2280
2281 if (p->uniform_buffers) {
2282 if (uniform_buffer_count)
2283 pandecode_uniform_buffers(p->uniform_buffers, uniform_buffer_count, job_no);
2284 else
2285 pandecode_msg("warn: UBOs specified but not referenced\n");
2286 } else if (uniform_buffer_count)
2287 pandecode_msg("XXX: UBOs referenced but not specified\n");
2288
2289 /* We don't want to actually dump uniforms, but we do need to validate
2290 * that the counts we were given are sane */
2291
2292 if (p->uniforms) {
2293 if (uniform_count)
2294 pandecode_uniforms(p->uniforms, uniform_count);
2295 else
2296 pandecode_msg("warn: Uniforms specified but not referenced\n");
2297 } else if (uniform_count)
2298 pandecode_msg("XXX: Uniforms referenced but not specified\n");
2299
2300 if (p->textures)
2301 pandecode_textures(p->textures, texture_count, job_no, is_bifrost);
2302
2303 if (p->sampler_descriptor)
2304 pandecode_samplers(p->sampler_descriptor, sampler_count, job_no, is_bifrost);
2305 }
2306
2307 static void
2308 pandecode_gl_enables(uint32_t gl_enables, int job_type)
2309 {
2310 pandecode_log(".gl_enables = ");
2311
2312 pandecode_log_decoded_flags(gl_enable_flag_info, gl_enables);
2313
2314 pandecode_log_cont(",\n");
2315 }
2316
2317 static void
2318 pandecode_vertex_tiler_postfix(const struct mali_vertex_tiler_postfix *p, int job_no, bool is_bifrost)
2319 {
2320 if (p->shader & 0xF)
2321 pandecode_msg("warn: shader tagged %X\n", (unsigned) (p->shader & 0xF));
2322
2323 pandecode_log(".postfix = {\n");
2324 pandecode_indent++;
2325
2326 pandecode_gl_enables(p->gl_enables, MALI_JOB_TYPE_TILER);
2327 pandecode_prop("instance_shift = 0x%x", p->instance_shift);
2328 pandecode_prop("instance_odd = 0x%x", p->instance_odd);
2329
2330 if (p->zero4) {
2331 pandecode_msg("XXX: vertex only zero tripped");
2332 pandecode_prop("zero4 = 0x%" PRIx32, p->zero4);
2333 }
2334
2335 pandecode_prop("offset_start = 0x%x", p->offset_start);
2336
2337 if (p->zero5) {
2338 pandecode_msg("XXX: vertex only zero tripped");
2339 pandecode_prop("zero5 = 0x%" PRIx64, p->zero5);
2340 }
2341
2342 MEMORY_PROP(p, position_varying);
2343 MEMORY_PROP(p, occlusion_counter);
2344
2345 pandecode_indent--;
2346 pandecode_log("},\n");
2347 }
2348
2349 static void
2350 pandecode_tiler_heap_meta(mali_ptr gpu_va, int job_no)
2351 {
2352 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
2353 const struct bifrost_tiler_heap_meta *PANDECODE_PTR_VAR(h, mem, gpu_va);
2354
2355 pandecode_log("struct bifrost_tiler_heap_meta tiler_heap_meta_%"PRIx64"_%d = {\n", gpu_va, job_no);
2356 pandecode_indent++;
2357
2358 if (h->zero) {
2359 pandecode_msg("XXX: tiler heap zero tripped\n");
2360 pandecode_prop("zero = 0x%x", h->zero);
2361 }
2362
2363 pandecode_prop("heap_size = 0x%x", h->heap_size);
2364 MEMORY_PROP(h, tiler_heap_start);
2365 MEMORY_PROP(h, tiler_heap_free);
2366
2367 /* this might point to the beginning of another buffer, when it's
2368 * really the end of the tiler heap buffer, so we have to be careful
2369 * here. but for zero length, we need the same pointer.
2370 */
2371
2372 if (h->tiler_heap_end == h->tiler_heap_start) {
2373 MEMORY_PROP(h, tiler_heap_start);
2374 } else {
2375 char *a = pointer_as_memory_reference(h->tiler_heap_end - 1);
2376 pandecode_prop("tiler_heap_end = %s + 1", a);
2377 free(a);
2378 }
2379
2380 for (int i = 0; i < 10; i++) {
2381 if (h->zeros[i] != 0) {
2382 pandecode_msg("XXX: tiler heap zero %d tripped, value %x\n",
2383 i, h->zeros[i]);
2384 }
2385 }
2386
2387 if (h->unk1 != 0x1) {
2388 pandecode_msg("XXX: tiler heap unk1 tripped\n");
2389 pandecode_prop("unk1 = 0x%x", h->unk1);
2390 }
2391
2392 if (h->unk7e007e != 0x7e007e) {
2393 pandecode_msg("XXX: tiler heap unk7e007e tripped\n");
2394 pandecode_prop("unk7e007e = 0x%x", h->unk7e007e);
2395 }
2396
2397 pandecode_indent--;
2398 pandecode_log("};\n");
2399 }
2400
2401 static void
2402 pandecode_tiler_meta(mali_ptr gpu_va, int job_no)
2403 {
2404 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
2405 const struct bifrost_tiler_meta *PANDECODE_PTR_VAR(t, mem, gpu_va);
2406
2407 pandecode_tiler_heap_meta(t->tiler_heap_meta, job_no);
2408
2409 pandecode_log("struct bifrost_tiler_meta tiler_meta_%"PRIx64"_%d = {\n", gpu_va, job_no);
2410 pandecode_indent++;
2411
2412 pandecode_prop("tiler_heap_next_start = 0x%" PRIx32, t->tiler_heap_next_start);
2413 pandecode_prop("used_hierarchy_mask = 0x%" PRIx32, t->used_hierarchy_mask);
2414
2415 if (t->hierarchy_mask != 0xa &&
2416 t->hierarchy_mask != 0x14 &&
2417 t->hierarchy_mask != 0x28 &&
2418 t->hierarchy_mask != 0x50 &&
2419 t->hierarchy_mask != 0xa0)
2420 pandecode_prop("XXX: Unexpected hierarchy_mask (not 0xa, 0x14, 0x28, 0x50 or 0xa0)!");
2421
2422 pandecode_prop("hierarchy_mask = 0x%" PRIx16, t->hierarchy_mask);
2423
2424 pandecode_prop("flags = 0x%" PRIx16, t->flags);
2425
2426 pandecode_prop("width = MALI_POSITIVE(%d)", t->width + 1);
2427 pandecode_prop("height = MALI_POSITIVE(%d)", t->height + 1);
2428
2429 if (t->zero0) {
2430 pandecode_msg("XXX: tiler meta zero tripped\n");
2431 pandecode_prop("zero0 = 0x%" PRIx64, t->zero0);
2432 }
2433
2434 for (int i = 0; i < 12; i++) {
2435 if (t->zeros[i] != 0) {
2436 pandecode_msg("XXX: tiler heap zero %d tripped, value %" PRIx64 "\n",
2437 i, t->zeros[i]);
2438 }
2439 }
2440
2441 pandecode_indent--;
2442 pandecode_log("};\n");
2443 }
2444
2445 static void
2446 pandecode_primitive_size(union midgard_primitive_size u, bool constant)
2447 {
2448 if (u.pointer == 0x0)
2449 return;
2450
2451 pandecode_log(".primitive_size = {\n");
2452 pandecode_indent++;
2453
2454 if (constant) {
2455 pandecode_prop("constant = %f", u.constant);
2456 } else {
2457 MEMORY_PROP((&u), pointer);
2458 }
2459
2460 pandecode_indent--;
2461 pandecode_log("},\n");
2462 }
2463
2464 static void
2465 pandecode_tiler_only_bfr(const struct bifrost_tiler_only *t, int job_no)
2466 {
2467 pandecode_log_cont("{\n");
2468 pandecode_indent++;
2469
2470 /* TODO: gl_PointSize on Bifrost */
2471 pandecode_primitive_size(t->primitive_size, true);
2472
2473 if (t->zero1 || t->zero2 || t->zero3 || t->zero4 || t->zero5
2474 || t->zero6) {
2475 pandecode_msg("XXX: tiler only zero tripped\n");
2476 pandecode_prop("zero1 = 0x%" PRIx64, t->zero1);
2477 pandecode_prop("zero2 = 0x%" PRIx64, t->zero2);
2478 pandecode_prop("zero3 = 0x%" PRIx64, t->zero3);
2479 pandecode_prop("zero4 = 0x%" PRIx64, t->zero4);
2480 pandecode_prop("zero5 = 0x%" PRIx64, t->zero5);
2481 pandecode_prop("zero6 = 0x%" PRIx64, t->zero6);
2482 }
2483
2484 pandecode_indent--;
2485 pandecode_log("},\n");
2486 }
2487
2488 static int
2489 pandecode_vertex_job_bfr(const struct mali_job_descriptor_header *h,
2490 const struct pandecode_mapped_memory *mem,
2491 mali_ptr payload, int job_no, unsigned gpu_id)
2492 {
2493 struct bifrost_payload_vertex *PANDECODE_PTR_VAR(v, mem, payload);
2494
2495 pandecode_vertex_tiler_postfix_pre(&v->postfix, job_no, h->job_type, "", true, gpu_id);
2496
2497 pandecode_log("struct bifrost_payload_vertex payload_%"PRIx64"_%d = {\n", payload, job_no);
2498 pandecode_indent++;
2499
2500 pandecode_vertex_tiler_prefix(&v->prefix, job_no, false);
2501 pandecode_vertex_tiler_postfix(&v->postfix, job_no, true);
2502
2503 pandecode_indent--;
2504 pandecode_log("};\n");
2505
2506 return sizeof(*v);
2507 }
2508
2509 static int
2510 pandecode_tiler_job_bfr(const struct mali_job_descriptor_header *h,
2511 const struct pandecode_mapped_memory *mem,
2512 mali_ptr payload, int job_no, unsigned gpu_id)
2513 {
2514 struct bifrost_payload_tiler *PANDECODE_PTR_VAR(t, mem, payload);
2515
2516 pandecode_vertex_tiler_postfix_pre(&t->postfix, job_no, h->job_type, "", true, gpu_id);
2517 pandecode_tiler_meta(t->tiler.tiler_meta, job_no);
2518
2519 pandecode_log("struct bifrost_payload_tiler payload_%"PRIx64"_%d = {\n", payload, job_no);
2520 pandecode_indent++;
2521
2522 pandecode_vertex_tiler_prefix(&t->prefix, job_no, false);
2523
2524 pandecode_log(".tiler = ");
2525 pandecode_tiler_only_bfr(&t->tiler, job_no);
2526
2527 pandecode_vertex_tiler_postfix(&t->postfix, job_no, true);
2528
2529 pandecode_indent--;
2530 pandecode_log("};\n");
2531
2532 return sizeof(*t);
2533 }
2534
2535 static int
2536 pandecode_vertex_or_tiler_job_mdg(const struct mali_job_descriptor_header *h,
2537 const struct pandecode_mapped_memory *mem,
2538 mali_ptr payload, int job_no, unsigned gpu_id)
2539 {
2540 struct midgard_payload_vertex_tiler *PANDECODE_PTR_VAR(v, mem, payload);
2541 bool is_graphics = (h->job_type == MALI_JOB_TYPE_VERTEX) || (h->job_type == MALI_JOB_TYPE_TILER);
2542
2543 pandecode_vertex_tiler_postfix_pre(&v->postfix, job_no, h->job_type, "", false, gpu_id);
2544
2545 pandecode_log("struct midgard_payload_vertex_tiler payload_%d = {\n", job_no);
2546 pandecode_indent++;
2547
2548 pandecode_vertex_tiler_prefix(&v->prefix, job_no, is_graphics);
2549 pandecode_vertex_tiler_postfix(&v->postfix, job_no, false);
2550
2551 bool has_primitive_pointer = v->prefix.unknown_draw & MALI_DRAW_VARYING_SIZE;
2552 pandecode_primitive_size(v->primitive_size, !has_primitive_pointer);
2553
2554 pandecode_indent--;
2555 pandecode_log("};\n");
2556
2557 return sizeof(*v);
2558 }
2559
2560 static int
2561 pandecode_fragment_job(const struct pandecode_mapped_memory *mem,
2562 mali_ptr payload, int job_no,
2563 bool is_bifrost, unsigned gpu_id)
2564 {
2565 const struct mali_payload_fragment *PANDECODE_PTR_VAR(s, mem, payload);
2566
2567 bool is_mfbd = s->framebuffer & MALI_MFBD;
2568
2569 if (!is_mfbd && is_bifrost)
2570 pandecode_msg("XXX: Bifrost fragment must use MFBD\n");
2571
2572 struct pandecode_fbd info;
2573
2574 if (is_mfbd)
2575 info = pandecode_mfbd_bfr(s->framebuffer & FBD_MASK, job_no, true, false, is_bifrost);
2576 else
2577 info = pandecode_sfbd(s->framebuffer & FBD_MASK, job_no, true, gpu_id);
2578
2579 /* Compute the tag for the tagged pointer. This contains the type of
2580 * FBD (MFBD/SFBD), and in the case of an MFBD, information about which
2581 * additional structures follow the MFBD header (an extra payload or
2582 * not, as well as a count of render targets) */
2583
2584 unsigned expected_tag = is_mfbd ? MALI_MFBD : 0;
2585
2586 if (is_mfbd) {
2587 if (info.has_extra)
2588 expected_tag |= MALI_MFBD_TAG_EXTRA;
2589
2590 expected_tag |= (MALI_POSITIVE(info.rt_count) << 2);
2591 }
2592
2593 if ((s->min_tile_coord | s->max_tile_coord) & ~(MALI_X_COORD_MASK | MALI_Y_COORD_MASK)) {
2594 pandecode_msg("XXX: unexpected tile coordinate bits\n");
2595 pandecode_prop("min_tile_coord = 0x%X\n", s->min_tile_coord);
2596 pandecode_prop("max_tile_coord = 0x%X\n", s->max_tile_coord);
2597 }
2598
2599 /* Extract tile coordinates */
2600
2601 unsigned min_x = MALI_TILE_COORD_X(s->min_tile_coord) << MALI_TILE_SHIFT;
2602 unsigned min_y = MALI_TILE_COORD_Y(s->min_tile_coord) << MALI_TILE_SHIFT;
2603
2604 unsigned max_x = (MALI_TILE_COORD_X(s->max_tile_coord) + 1) << MALI_TILE_SHIFT;
2605 unsigned max_y = (MALI_TILE_COORD_Y(s->max_tile_coord) + 1) << MALI_TILE_SHIFT;
2606
2607 /* For the max, we also want the floored (rather than ceiled) version for checking */
2608
2609 unsigned max_x_f = (MALI_TILE_COORD_X(s->max_tile_coord)) << MALI_TILE_SHIFT;
2610 unsigned max_y_f = (MALI_TILE_COORD_Y(s->max_tile_coord)) << MALI_TILE_SHIFT;
2611
2612 /* Validate the coordinates are well-ordered */
2613
2614 if (min_x == max_x)
2615 pandecode_msg("XXX: empty X coordinates (%u = %u)\n", min_x, max_x);
2616 else if (min_x > max_x)
2617 pandecode_msg("XXX: misordered X coordinates (%u > %u)\n", min_x, max_x);
2618
2619 if (min_y == max_y)
2620 pandecode_msg("XXX: empty X coordinates (%u = %u)\n", min_x, max_x);
2621 else if (min_y > max_y)
2622 pandecode_msg("XXX: misordered X coordinates (%u > %u)\n", min_x, max_x);
2623
2624 /* Validate the coordinates fit inside the framebuffer. We use floor,
2625 * rather than ceil, for the max coordinates, since the tile
2626 * coordinates for something like an 800x600 framebuffer will actually
2627 * resolve to 800x608, which would otherwise trigger a Y-overflow */
2628
2629 if ((min_x > info.width) || (max_x_f > info.width))
2630 pandecode_msg("XXX: tile coordinates overflow in X direction\n");
2631
2632 if ((min_y > info.height) || (max_y_f > info.height))
2633 pandecode_msg("XXX: tile coordinates overflow in Y direction\n");
2634
2635 /* After validation, we print */
2636
2637 pandecode_log("fragment (%u, %u) ... (%u, %u)\n\n", min_x, min_y, max_x, max_y);
2638
2639 /* The FBD is a tagged pointer */
2640
2641 unsigned tag = (s->framebuffer & ~FBD_MASK);
2642
2643 if (tag != expected_tag)
2644 pandecode_msg("XXX: expected FBD tag %X but got %X\n", expected_tag, tag);
2645
2646 return sizeof(*s);
2647 }
2648
2649 /* Entrypoint to start tracing. jc_gpu_va is the GPU address for the first job
2650 * in the chain; later jobs are found by walking the chain. Bifrost is, well,
2651 * if it's bifrost or not. GPU ID is the more finegrained ID (at some point, we
2652 * might wish to combine this with the bifrost parameter) because some details
2653 * are model-specific even within a particular architecture. Minimal traces
2654 * *only* examine the job descriptors, skipping printing entirely if there is
2655 * no faults, and only descends into the payload if there are faults. This is
2656 * useful for looking for faults without the overhead of invasive traces. */
2657
2658 void
2659 pandecode_jc(mali_ptr jc_gpu_va, bool bifrost, unsigned gpu_id, bool minimal)
2660 {
2661 pandecode_dump_file_open();
2662
2663 struct mali_job_descriptor_header *h;
2664 unsigned job_descriptor_number = 0;
2665
2666 do {
2667 struct pandecode_mapped_memory *mem =
2668 pandecode_find_mapped_gpu_mem_containing(jc_gpu_va);
2669
2670 void *payload;
2671
2672 h = PANDECODE_PTR(mem, jc_gpu_va, struct mali_job_descriptor_header);
2673
2674 /* On Midgard, for 32-bit jobs except for fragment jobs, the
2675 * high 32-bits of the 64-bit pointer are reused to store
2676 * something else.
2677 */
2678 int offset = h->job_descriptor_size == MALI_JOB_32 &&
2679 h->job_type != MALI_JOB_TYPE_FRAGMENT ? 4 : 0;
2680 mali_ptr payload_ptr = jc_gpu_va + sizeof(*h) - offset;
2681
2682 payload = pandecode_fetch_gpu_mem(mem, payload_ptr, 256);
2683
2684 int job_no = job_descriptor_number++;
2685
2686 /* If the job is good to go, skip it in minimal mode */
2687 if (minimal && (h->exception_status == 0x0 || h->exception_status == 0x1))
2688 continue;
2689
2690 pandecode_log("struct mali_job_descriptor_header job_%"PRIx64"_%d = {\n", jc_gpu_va, job_no);
2691 pandecode_indent++;
2692
2693 pandecode_prop("job_type = %s", mali_job_type_as_str(h->job_type));
2694
2695 if (h->job_descriptor_size)
2696 pandecode_prop("job_descriptor_size = %d", h->job_descriptor_size);
2697
2698 if (h->exception_status && h->exception_status != 0x1)
2699 pandecode_prop("exception_status = %x (source ID: 0x%x access: %s exception: 0x%x)",
2700 h->exception_status,
2701 (h->exception_status >> 16) & 0xFFFF,
2702 mali_exception_access_as_str((h->exception_status >> 8) & 0x3),
2703 h->exception_status & 0xFF);
2704
2705 if (h->first_incomplete_task)
2706 pandecode_prop("first_incomplete_task = %d", h->first_incomplete_task);
2707
2708 if (h->fault_pointer)
2709 pandecode_prop("fault_pointer = 0x%" PRIx64, h->fault_pointer);
2710
2711 if (h->job_barrier)
2712 pandecode_prop("job_barrier = %d", h->job_barrier);
2713
2714 pandecode_prop("job_index = %d", h->job_index);
2715
2716 if (h->unknown_flags)
2717 pandecode_prop("unknown_flags = %d", h->unknown_flags);
2718
2719 if (h->job_dependency_index_1)
2720 pandecode_prop("job_dependency_index_1 = %d", h->job_dependency_index_1);
2721
2722 if (h->job_dependency_index_2)
2723 pandecode_prop("job_dependency_index_2 = %d", h->job_dependency_index_2);
2724
2725 pandecode_indent--;
2726 pandecode_log("};\n");
2727
2728 switch (h->job_type) {
2729 case MALI_JOB_TYPE_WRITE_VALUE: {
2730 struct mali_payload_write_value *s = payload;
2731 pandecode_log("struct mali_payload_write_value payload_%"PRIx64"_%d = {\n", payload_ptr, job_no);
2732 pandecode_indent++;
2733 MEMORY_PROP(s, address);
2734
2735 if (s->value_descriptor != MALI_WRITE_VALUE_ZERO) {
2736 pandecode_msg("XXX: unknown value descriptor\n");
2737 pandecode_prop("value_descriptor = 0x%" PRIX32, s->value_descriptor);
2738 }
2739
2740 if (s->reserved) {
2741 pandecode_msg("XXX: set value tripped\n");
2742 pandecode_prop("reserved = 0x%" PRIX32, s->reserved);
2743 }
2744
2745 pandecode_prop("immediate = 0x%" PRIX64, s->immediate);
2746 pandecode_indent--;
2747 pandecode_log("};\n");
2748
2749 break;
2750 }
2751
2752 case MALI_JOB_TYPE_TILER:
2753 case MALI_JOB_TYPE_VERTEX:
2754 case MALI_JOB_TYPE_COMPUTE:
2755 if (bifrost) {
2756 if (h->job_type == MALI_JOB_TYPE_TILER)
2757 pandecode_tiler_job_bfr(h, mem, payload_ptr, job_no, gpu_id);
2758 else
2759 pandecode_vertex_job_bfr(h, mem, payload_ptr, job_no, gpu_id);
2760 } else
2761 pandecode_vertex_or_tiler_job_mdg(h, mem, payload_ptr, job_no, gpu_id);
2762
2763 break;
2764
2765 case MALI_JOB_TYPE_FRAGMENT:
2766 pandecode_fragment_job(mem, payload_ptr, job_no, bifrost, gpu_id);
2767 break;
2768
2769 default:
2770 break;
2771 }
2772 } while ((jc_gpu_va = h->next_job));
2773
2774 pandecode_map_read_write();
2775 }