panfrost: XMLify MSAA writeout mode
[mesa.git] / src / panfrost / lib / decode.c
1 /*
2 * Copyright (C) 2017-2019 Alyssa Rosenzweig
3 * Copyright (C) 2017-2019 Connor Abbott
4 * Copyright (C) 2019 Collabora, Ltd.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 */
25
26 #include <midgard_pack.h>
27 #include <stdio.h>
28 #include <stdlib.h>
29 #include <memory.h>
30 #include <stdbool.h>
31 #include <stdarg.h>
32 #include <ctype.h>
33 #include "decode.h"
34 #include "util/macros.h"
35 #include "util/u_math.h"
36
37 #include "midgard/disassemble.h"
38 #include "bifrost/disassemble.h"
39
40 #include "pan_encoder.h"
41
42 static void pandecode_swizzle(unsigned swizzle, enum mali_format format);
43
44 #define MEMORY_PROP(obj, p) {\
45 if (obj->p) { \
46 char *a = pointer_as_memory_reference(obj->p); \
47 pandecode_prop("%s = %s", #p, a); \
48 free(a); \
49 } \
50 }
51
52 #define MEMORY_PROP_DIR(obj, p) {\
53 if (obj.p) { \
54 char *a = pointer_as_memory_reference(obj.p); \
55 pandecode_prop("%s = %s", #p, a); \
56 free(a); \
57 } \
58 }
59
60 #define DUMP_CL(title, T, cl, indent) {\
61 fprintf(pandecode_dump_stream, "%s\n", title); \
62 struct MALI_ ## T temp; \
63 MALI_ ## T ## _unpack((const uint8_t *) cl, &temp); \
64 MALI_ ## T ## _print(pandecode_dump_stream, &temp, indent * 2); \
65 }
66
67 #define DUMP_ADDR(title, T, addr, indent) {\
68 struct pandecode_mapped_memory *mapped_mem = pandecode_find_mapped_gpu_mem_containing(addr); \
69 const uint8_t *cl = pandecode_fetch_gpu_mem(mapped_mem, addr, MALI_ ## T ## _LENGTH); \
70 DUMP_CL(title, T, cl, indent); \
71 }
72
73 FILE *pandecode_dump_stream;
74
75 /* Semantic logging type.
76 *
77 * Raw: for raw messages to be printed as is.
78 * Message: for helpful information to be commented out in replays.
79 * Property: for properties of a struct
80 *
81 * Use one of pandecode_log, pandecode_msg, or pandecode_prop as syntax sugar.
82 */
83
84 enum pandecode_log_type {
85 PANDECODE_RAW,
86 PANDECODE_MESSAGE,
87 PANDECODE_PROPERTY
88 };
89
90 #define pandecode_log(...) pandecode_log_typed(PANDECODE_RAW, __VA_ARGS__)
91 #define pandecode_msg(...) pandecode_log_typed(PANDECODE_MESSAGE, __VA_ARGS__)
92 #define pandecode_prop(...) pandecode_log_typed(PANDECODE_PROPERTY, __VA_ARGS__)
93
94 unsigned pandecode_indent = 0;
95
96 static void
97 pandecode_make_indent(void)
98 {
99 for (unsigned i = 0; i < pandecode_indent; ++i)
100 fprintf(pandecode_dump_stream, " ");
101 }
102
103 static void
104 pandecode_log_typed(enum pandecode_log_type type, const char *format, ...)
105 {
106 va_list ap;
107
108 pandecode_make_indent();
109
110 if (type == PANDECODE_MESSAGE)
111 fprintf(pandecode_dump_stream, "// ");
112 else if (type == PANDECODE_PROPERTY)
113 fprintf(pandecode_dump_stream, ".");
114
115 va_start(ap, format);
116 vfprintf(pandecode_dump_stream, format, ap);
117 va_end(ap);
118
119 if (type == PANDECODE_PROPERTY)
120 fprintf(pandecode_dump_stream, ",\n");
121 }
122
123 static void
124 pandecode_log_cont(const char *format, ...)
125 {
126 va_list ap;
127
128 va_start(ap, format);
129 vfprintf(pandecode_dump_stream, format, ap);
130 va_end(ap);
131 }
132
133 /* To check for memory safety issues, validates that the given pointer in GPU
134 * memory is valid, containing at least sz bytes. The goal is to eliminate
135 * GPU-side memory bugs (NULL pointer dereferences, buffer overflows, or buffer
136 * overruns) by statically validating pointers.
137 */
138
139 static void
140 pandecode_validate_buffer(mali_ptr addr, size_t sz)
141 {
142 if (!addr) {
143 pandecode_msg("XXX: null pointer deref");
144 return;
145 }
146
147 /* Find a BO */
148
149 struct pandecode_mapped_memory *bo =
150 pandecode_find_mapped_gpu_mem_containing(addr);
151
152 if (!bo) {
153 pandecode_msg("XXX: invalid memory dereference\n");
154 return;
155 }
156
157 /* Bounds check */
158
159 unsigned offset = addr - bo->gpu_va;
160 unsigned total = offset + sz;
161
162 if (total > bo->length) {
163 pandecode_msg("XXX: buffer overrun. "
164 "Chunk of size %zu at offset %d in buffer of size %zu. "
165 "Overrun by %zu bytes. \n",
166 sz, offset, bo->length, total - bo->length);
167 return;
168 }
169 }
170
171 struct pandecode_flag_info {
172 u64 flag;
173 const char *name;
174 };
175
176 static void
177 pandecode_log_decoded_flags(const struct pandecode_flag_info *flag_info,
178 u64 flags)
179 {
180 bool decodable_flags_found = false;
181
182 for (int i = 0; flag_info[i].name; i++) {
183 if ((flags & flag_info[i].flag) != flag_info[i].flag)
184 continue;
185
186 if (!decodable_flags_found) {
187 decodable_flags_found = true;
188 } else {
189 pandecode_log_cont(" | ");
190 }
191
192 pandecode_log_cont("%s", flag_info[i].name);
193
194 flags &= ~flag_info[i].flag;
195 }
196
197 if (decodable_flags_found) {
198 if (flags)
199 pandecode_log_cont(" | 0x%" PRIx64, flags);
200 } else {
201 pandecode_log_cont("0x%" PRIx64, flags);
202 }
203 }
204
205 #define FLAG_INFO(flag) { MALI_##flag, "MALI_" #flag }
206 static const struct pandecode_flag_info gl_enable_flag_info[] = {
207 FLAG_INFO(OCCLUSION_QUERY),
208 FLAG_INFO(OCCLUSION_PRECISE),
209 FLAG_INFO(FRONT_CCW_TOP),
210 FLAG_INFO(CULL_FACE_FRONT),
211 FLAG_INFO(CULL_FACE_BACK),
212 {}
213 };
214 #undef FLAG_INFO
215
216 #define FLAG_INFO(flag) { MALI_CLEAR_##flag, "MALI_CLEAR_" #flag }
217 static const struct pandecode_flag_info clear_flag_info[] = {
218 FLAG_INFO(FAST),
219 FLAG_INFO(SLOW),
220 FLAG_INFO(SLOW_STENCIL),
221 {}
222 };
223 #undef FLAG_INFO
224
225 #define FLAG_INFO(flag) { MALI_MASK_##flag, "MALI_MASK_" #flag }
226 static const struct pandecode_flag_info mask_flag_info[] = {
227 FLAG_INFO(R),
228 FLAG_INFO(G),
229 FLAG_INFO(B),
230 FLAG_INFO(A),
231 {}
232 };
233 #undef FLAG_INFO
234
235 #define FLAG_INFO(flag) { MALI_##flag, "MALI_" #flag }
236 static const struct pandecode_flag_info u3_flag_info[] = {
237 FLAG_INFO(HAS_MSAA),
238 FLAG_INFO(PER_SAMPLE),
239 FLAG_INFO(CAN_DISCARD),
240 FLAG_INFO(HAS_BLEND_SHADER),
241 FLAG_INFO(DEPTH_WRITEMASK),
242 FLAG_INFO(DEPTH_CLIP_NEAR),
243 FLAG_INFO(DEPTH_CLIP_FAR),
244 {}
245 };
246
247 static const struct pandecode_flag_info u4_flag_info[] = {
248 FLAG_INFO(NO_MSAA),
249 FLAG_INFO(NO_DITHER),
250 FLAG_INFO(DEPTH_RANGE_A),
251 FLAG_INFO(DEPTH_RANGE_B),
252 FLAG_INFO(STENCIL_TEST),
253 FLAG_INFO(ALPHA_TO_COVERAGE),
254 {}
255 };
256 #undef FLAG_INFO
257
258 #define FLAG_INFO(flag) { MALI_MFBD_FORMAT_##flag, "MALI_MFBD_FORMAT_" #flag }
259 static const struct pandecode_flag_info mfbd_fmt_flag_info[] = {
260 FLAG_INFO(SRGB),
261 {}
262 };
263 #undef FLAG_INFO
264
265 #define FLAG_INFO(flag) { MALI_AFBC_##flag, "MALI_AFBC_" #flag }
266 static const struct pandecode_flag_info afbc_fmt_flag_info[] = {
267 FLAG_INFO(YTR),
268 {}
269 };
270 #undef FLAG_INFO
271
272 #define FLAG_INFO(flag) { MALI_EXTRA_##flag, "MALI_EXTRA_" #flag }
273 static const struct pandecode_flag_info mfbd_extra_flag_hi_info[] = {
274 FLAG_INFO(PRESENT),
275 {}
276 };
277 #undef FLAG_INFO
278
279 #define FLAG_INFO(flag) { MALI_EXTRA_##flag, "MALI_EXTRA_" #flag }
280 static const struct pandecode_flag_info mfbd_extra_flag_lo_info[] = {
281 FLAG_INFO(ZS),
282 {}
283 };
284 #undef FLAG_INFO
285
286 #define FLAG_INFO(flag) { MALI_##flag, "MALI_" #flag }
287 static const struct pandecode_flag_info shader_midgard1_flag_lo_info [] = {
288 FLAG_INFO(WRITES_Z),
289 FLAG_INFO(EARLY_Z),
290 FLAG_INFO(READS_TILEBUFFER),
291 FLAG_INFO(WRITES_GLOBAL),
292 FLAG_INFO(READS_ZS),
293 {}
294 };
295
296 static const struct pandecode_flag_info shader_midgard1_flag_hi_info [] = {
297 FLAG_INFO(WRITES_S),
298 FLAG_INFO(SUPPRESS_INF_NAN),
299 {}
300 };
301 #undef FLAG_INFO
302
303 #define FLAG_INFO(flag) { MALI_BIFROST_##flag, "MALI_BIFROST_" #flag }
304 static const struct pandecode_flag_info shader_bifrost_info [] = {
305 FLAG_INFO(FULL_THREAD),
306 FLAG_INFO(EARLY_Z),
307 FLAG_INFO(FIRST_ATEST),
308 {}
309 };
310
311 #undef FLAG_INFO
312
313 #define FLAG_INFO(flag) { MALI_MFBD_##flag, "MALI_MFBD_" #flag }
314 static const struct pandecode_flag_info mfbd_flag_info [] = {
315 FLAG_INFO(DEPTH_WRITE),
316 FLAG_INFO(EXTRA),
317 {}
318 };
319 #undef FLAG_INFO
320
321 #define FLAG_INFO(flag) { MALI_SFBD_FORMAT_##flag, "MALI_SFBD_FORMAT_" #flag }
322 static const struct pandecode_flag_info sfbd_unk1_info [] = {
323 FLAG_INFO(MSAA_8),
324 FLAG_INFO(MSAA_A),
325 {}
326 };
327 #undef FLAG_INFO
328
329 #define FLAG_INFO(flag) { MALI_SFBD_FORMAT_##flag, "MALI_SFBD_FORMAT_" #flag }
330 static const struct pandecode_flag_info sfbd_unk2_info [] = {
331 FLAG_INFO(MSAA_B),
332 FLAG_INFO(SRGB),
333 {}
334 };
335 #undef FLAG_INFO
336
337 #define DEFINE_CASE(name) case MALI_## name: return "MALI_" #name
338 static char *pandecode_format(enum mali_format format)
339 {
340 static char unk_format_str[10];
341
342 switch (format) {
343 DEFINE_CASE(ETC2_RGB8);
344 DEFINE_CASE(ETC2_R11_UNORM);
345 DEFINE_CASE(ETC2_RGBA8);
346 DEFINE_CASE(ETC2_RG11_UNORM);
347 DEFINE_CASE(ETC2_R11_SNORM);
348 DEFINE_CASE(ETC2_RG11_SNORM);
349 DEFINE_CASE(ETC2_RGB8A1);
350 DEFINE_CASE(NXR);
351 DEFINE_CASE(BC1_UNORM);
352 DEFINE_CASE(BC2_UNORM);
353 DEFINE_CASE(BC3_UNORM);
354 DEFINE_CASE(BC4_UNORM);
355 DEFINE_CASE(BC4_SNORM);
356 DEFINE_CASE(BC5_UNORM);
357 DEFINE_CASE(BC5_SNORM);
358 DEFINE_CASE(BC6H_UF16);
359 DEFINE_CASE(BC6H_SF16);
360 DEFINE_CASE(BC7_UNORM);
361 DEFINE_CASE(ASTC_3D_LDR);
362 DEFINE_CASE(ASTC_3D_HDR);
363 DEFINE_CASE(ASTC_2D_LDR);
364 DEFINE_CASE(ASTC_2D_HDR);
365 DEFINE_CASE(RGB565);
366 DEFINE_CASE(RGB5_X1_UNORM);
367 DEFINE_CASE(RGB5_A1_UNORM);
368 DEFINE_CASE(RGB10_A2_UNORM);
369 DEFINE_CASE(RGB10_A2_SNORM);
370 DEFINE_CASE(RGB10_A2UI);
371 DEFINE_CASE(RGB10_A2I);
372 DEFINE_CASE(RGB332_UNORM);
373 DEFINE_CASE(RGB233_UNORM);
374 DEFINE_CASE(Z24X8_UNORM);
375 DEFINE_CASE(R32_FIXED);
376 DEFINE_CASE(RG32_FIXED);
377 DEFINE_CASE(RGB32_FIXED);
378 DEFINE_CASE(RGBA32_FIXED);
379 DEFINE_CASE(R11F_G11F_B10F);
380 DEFINE_CASE(R9F_G9F_B9F_E5F);
381 DEFINE_CASE(VARYING_POS);
382 DEFINE_CASE(VARYING_DISCARD);
383
384 DEFINE_CASE(R8_SNORM);
385 DEFINE_CASE(R16_SNORM);
386 DEFINE_CASE(R32_SNORM);
387 DEFINE_CASE(RG8_SNORM);
388 DEFINE_CASE(RG16_SNORM);
389 DEFINE_CASE(RG32_SNORM);
390 DEFINE_CASE(RGB8_SNORM);
391 DEFINE_CASE(RGB16_SNORM);
392 DEFINE_CASE(RGB32_SNORM);
393 DEFINE_CASE(RGBA8_SNORM);
394 DEFINE_CASE(RGBA16_SNORM);
395 DEFINE_CASE(RGBA32_SNORM);
396
397 DEFINE_CASE(R8UI);
398 DEFINE_CASE(R16UI);
399 DEFINE_CASE(R32UI);
400 DEFINE_CASE(RG8UI);
401 DEFINE_CASE(RG16UI);
402 DEFINE_CASE(RG32UI);
403 DEFINE_CASE(RGB8UI);
404 DEFINE_CASE(RGB16UI);
405 DEFINE_CASE(RGB32UI);
406 DEFINE_CASE(RGBA8UI);
407 DEFINE_CASE(RGBA16UI);
408 DEFINE_CASE(RGBA32UI);
409
410 DEFINE_CASE(R8_UNORM);
411 DEFINE_CASE(R16_UNORM);
412 DEFINE_CASE(R32_UNORM);
413 DEFINE_CASE(R32F);
414 DEFINE_CASE(RG8_UNORM);
415 DEFINE_CASE(RG16_UNORM);
416 DEFINE_CASE(RG32_UNORM);
417 DEFINE_CASE(RG32F);
418 DEFINE_CASE(RGB8_UNORM);
419 DEFINE_CASE(RGB16_UNORM);
420 DEFINE_CASE(RGB32_UNORM);
421 DEFINE_CASE(RGB32F);
422 DEFINE_CASE(RGBA4_UNORM);
423 DEFINE_CASE(RGBA8_UNORM);
424 DEFINE_CASE(RGBA16_UNORM);
425 DEFINE_CASE(RGBA32_UNORM);
426 DEFINE_CASE(RGBA32F);
427
428 DEFINE_CASE(R8I);
429 DEFINE_CASE(R16I);
430 DEFINE_CASE(R32I);
431 DEFINE_CASE(RG8I);
432 DEFINE_CASE(R16F);
433 DEFINE_CASE(RG16I);
434 DEFINE_CASE(RG32I);
435 DEFINE_CASE(RG16F);
436 DEFINE_CASE(RGB8I);
437 DEFINE_CASE(RGB16I);
438 DEFINE_CASE(RGB32I);
439 DEFINE_CASE(RGB16F);
440 DEFINE_CASE(RGBA8I);
441 DEFINE_CASE(RGBA16I);
442 DEFINE_CASE(RGBA32I);
443 DEFINE_CASE(RGBA16F);
444
445 DEFINE_CASE(RGBA4);
446 DEFINE_CASE(RGBA8_2);
447 DEFINE_CASE(RGB10_A2_2);
448 default:
449 snprintf(unk_format_str, sizeof(unk_format_str), "MALI_0x%02x", format);
450 return unk_format_str;
451 }
452 }
453
454 #undef DEFINE_CASE
455
456 static char *pandecode_attr_mode_short(enum mali_attr_mode mode)
457 {
458 switch(mode) {
459 /* TODO: Combine to just "instanced" once this can be done
460 * unambiguously in all known cases */
461 case MALI_ATTR_POT_DIVIDE:
462 return "instanced_pot";
463 case MALI_ATTR_MODULO:
464 return "instanced_mod";
465 case MALI_ATTR_NPOT_DIVIDE:
466 return "instanced_npot";
467 case MALI_ATTR_IMAGE:
468 return "image";
469 default:
470 pandecode_msg("XXX: invalid attribute mode %X\n", mode);
471 return "";
472 }
473 }
474
475 static const char *
476 pandecode_special_record(uint64_t v, bool* attribute)
477 {
478 switch(v) {
479 case MALI_ATTR_VERTEXID:
480 *attribute = true;
481 return "gl_VertexID";
482 case MALI_ATTR_INSTANCEID:
483 *attribute = true;
484 return "gl_InstanceID";
485 case MALI_VARYING_FRAG_COORD:
486 return "gl_FragCoord";
487 case MALI_VARYING_FRONT_FACING:
488 return "gl_FrontFacing";
489 case MALI_VARYING_POINT_COORD:
490 return "gl_PointCoord";
491 default:
492 pandecode_msg("XXX: invalid special record %" PRIx64 "\n", v);
493 return "";
494 }
495 }
496
497 #define DEFINE_CASE(name) case MALI_EXCEPTION_ACCESS_## name: return ""#name
498 static char *
499 pandecode_exception_access(unsigned access)
500 {
501 switch (access) {
502 DEFINE_CASE(NONE);
503 DEFINE_CASE(EXECUTE);
504 DEFINE_CASE(READ);
505 DEFINE_CASE(WRITE);
506
507 default:
508 unreachable("Invalid case");
509 }
510 }
511 #undef DEFINE_CASE
512
513 /* Midgard's tiler descriptor is embedded within the
514 * larger FBD */
515
516 static void
517 pandecode_midgard_tiler_descriptor(
518 const struct midgard_tiler_descriptor *t,
519 unsigned width,
520 unsigned height,
521 bool is_fragment,
522 bool has_hierarchy)
523 {
524 pandecode_log(".tiler = {\n");
525 pandecode_indent++;
526
527 if (t->hierarchy_mask == MALI_TILER_DISABLED)
528 pandecode_prop("hierarchy_mask = MALI_TILER_DISABLED");
529 else
530 pandecode_prop("hierarchy_mask = 0x%" PRIx16, t->hierarchy_mask);
531
532 /* We know this name from the kernel, but we never see it nonzero */
533
534 if (t->flags)
535 pandecode_msg("XXX: unexpected tiler flags 0x%" PRIx16, t->flags);
536
537 MEMORY_PROP(t, polygon_list);
538
539 /* The body is offset from the base of the polygon list */
540 //assert(t->polygon_list_body > t->polygon_list);
541 unsigned body_offset = t->polygon_list_body - t->polygon_list;
542
543 /* It needs to fit inside the reported size */
544 //assert(t->polygon_list_size >= body_offset);
545
546 /* Now that we've sanity checked, we'll try to calculate the sizes
547 * ourselves for comparison */
548
549 unsigned ref_header = panfrost_tiler_header_size(width, height, t->hierarchy_mask, has_hierarchy);
550 unsigned ref_size = panfrost_tiler_full_size(width, height, t->hierarchy_mask, has_hierarchy);
551
552 if (!((ref_header == body_offset) && (ref_size == t->polygon_list_size))) {
553 pandecode_msg("XXX: bad polygon list size (expected %d / 0x%x)\n",
554 ref_header, ref_size);
555 pandecode_prop("polygon_list_size = 0x%x", t->polygon_list_size);
556 pandecode_msg("body offset %d\n", body_offset);
557 }
558
559 /* The tiler heap has a start and end specified -- it should be
560 * identical to what we have in the BO. The exception is if tiling is
561 * disabled. */
562
563 MEMORY_PROP(t, heap_start);
564 assert(t->heap_end >= t->heap_start);
565
566 struct pandecode_mapped_memory *heap =
567 pandecode_find_mapped_gpu_mem_containing(t->heap_start);
568
569 unsigned heap_size = t->heap_end - t->heap_start;
570
571 /* Tiling is enabled with a special flag */
572 unsigned hierarchy_mask = t->hierarchy_mask & MALI_HIERARCHY_MASK;
573 unsigned tiler_flags = t->hierarchy_mask ^ hierarchy_mask;
574
575 bool tiling_enabled = hierarchy_mask;
576
577 if (tiling_enabled) {
578 /* When tiling is enabled, the heap should be a tight fit */
579 unsigned heap_offset = t->heap_start - heap->gpu_va;
580 if ((heap_offset + heap_size) != heap->length) {
581 pandecode_msg("XXX: heap size %u (expected %zu)\n",
582 heap_size, heap->length - heap_offset);
583 }
584
585 /* We should also have no other flags */
586 if (tiler_flags)
587 pandecode_msg("XXX: unexpected tiler %X\n", tiler_flags);
588 } else {
589 /* When tiling is disabled, we should have that flag and no others */
590
591 if (tiler_flags != MALI_TILER_DISABLED) {
592 pandecode_msg("XXX: unexpected tiler flag %X, expected MALI_TILER_DISABLED\n",
593 tiler_flags);
594 }
595
596 /* We should also have an empty heap */
597 if (heap_size) {
598 pandecode_msg("XXX: tiler heap size %d given, expected empty\n",
599 heap_size);
600 }
601
602 /* Disabled tiling is used only for clear-only jobs, which are
603 * purely FRAGMENT, so we should never see this for
604 * non-FRAGMENT descriptors. */
605
606 if (!is_fragment)
607 pandecode_msg("XXX: tiler disabled for non-FRAGMENT job\n");
608 }
609
610 /* We've never seen weights used in practice, but we know from the
611 * kernel these fields is there */
612
613 bool nonzero_weights = false;
614
615 for (unsigned w = 0; w < ARRAY_SIZE(t->weights); ++w) {
616 nonzero_weights |= t->weights[w] != 0x0;
617 }
618
619 if (nonzero_weights) {
620 pandecode_log(".weights = { ");
621
622 for (unsigned w = 0; w < ARRAY_SIZE(t->weights); ++w) {
623 pandecode_log_cont("%d, ", t->weights[w]);
624 }
625
626 pandecode_log("},");
627 }
628
629 pandecode_indent--;
630 pandecode_log("}\n");
631 }
632
633 /* TODO: The Bifrost tiler is not understood at all yet */
634
635 static void
636 pandecode_bifrost_tiler_descriptor(const struct mali_framebuffer *fb)
637 {
638 pandecode_log(".tiler = {\n");
639 pandecode_indent++;
640
641 MEMORY_PROP(fb, tiler_meta);
642
643 for (int i = 0; i < 16; i++) {
644 if (fb->zeros[i] != 0) {
645 pandecode_msg("XXX: tiler descriptor zero %d tripped, value %x\n",
646 i, fb->zeros[i]);
647 }
648 }
649
650 pandecode_log("},\n");
651
652 pandecode_indent--;
653 pandecode_log("}\n");
654
655 }
656
657 /* Information about the framebuffer passed back for
658 * additional analysis */
659
660 struct pandecode_fbd {
661 unsigned width;
662 unsigned height;
663 unsigned rt_count;
664 bool has_extra;
665 };
666
667 static void
668 pandecode_sfbd_format(struct mali_sfbd_format format)
669 {
670 pandecode_log(".format = {\n");
671 pandecode_indent++;
672
673 pandecode_log(".unk1 = ");
674 pandecode_log_decoded_flags(sfbd_unk1_info, format.unk1);
675 pandecode_log_cont(",\n");
676
677 /* TODO: Map formats so we can check swizzles and print nicely */
678 pandecode_log("swizzle");
679 pandecode_swizzle(format.swizzle, MALI_RGBA8_UNORM);
680 pandecode_log_cont(",\n");
681
682 pandecode_prop("nr_channels = MALI_POSITIVE(%d)",
683 (format.nr_channels + 1));
684
685 pandecode_log(".unk2 = ");
686 pandecode_log_decoded_flags(sfbd_unk2_info, format.unk2);
687 pandecode_log_cont(",\n");
688
689 pandecode_prop("block = %s", mali_block_format_as_str(format.block));
690
691 pandecode_prop("unk3 = 0x%" PRIx32, format.unk3);
692
693 pandecode_indent--;
694 pandecode_log("},\n");
695 }
696
697 static void
698 pandecode_shared_memory(const struct mali_shared_memory *desc, bool is_compute)
699 {
700 pandecode_prop("stack_shift = 0x%x", desc->stack_shift);
701
702 if (desc->unk0)
703 pandecode_prop("unk0 = 0x%x", desc->unk0);
704
705 if (desc->shared_workgroup_count != 0x1F) {
706 pandecode_prop("shared_workgroup_count = %d", desc->shared_workgroup_count);
707 if (!is_compute)
708 pandecode_msg("XXX: wrong workgroup count for noncompute\n");
709 }
710
711 if (desc->shared_unk1 || desc->shared_shift) {
712 pandecode_prop("shared_unk1 = %X", desc->shared_unk1);
713 pandecode_prop("shared_shift = %X", desc->shared_shift);
714
715 if (!is_compute)
716 pandecode_msg("XXX: shared memory configured in noncompute shader");
717 }
718
719 if (desc->shared_zero) {
720 pandecode_msg("XXX: shared memory zero tripped\n");
721 pandecode_prop("shared_zero = 0x%" PRIx32, desc->shared_zero);
722 }
723
724 if (desc->shared_memory && !is_compute)
725 pandecode_msg("XXX: shared memory used in noncompute shader\n");
726
727 MEMORY_PROP(desc, scratchpad);
728 MEMORY_PROP(desc, shared_memory);
729 MEMORY_PROP(desc, unknown1);
730
731 if (desc->scratchpad) {
732 struct pandecode_mapped_memory *smem =
733 pandecode_find_mapped_gpu_mem_containing(desc->scratchpad);
734
735 pandecode_msg("scratchpad size %u\n", smem->length);
736 }
737
738 }
739
740 static struct pandecode_fbd
741 pandecode_sfbd(uint64_t gpu_va, int job_no, bool is_fragment, unsigned gpu_id)
742 {
743 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
744 const struct mali_single_framebuffer *PANDECODE_PTR_VAR(s, mem, (mali_ptr) gpu_va);
745
746 struct pandecode_fbd info = {
747 .has_extra = false,
748 .rt_count = 1
749 };
750
751 pandecode_log("struct mali_single_framebuffer framebuffer_%"PRIx64"_%d = {\n", gpu_va, job_no);
752 pandecode_indent++;
753
754 pandecode_log(".shared_memory = {\n");
755 pandecode_indent++;
756 pandecode_shared_memory(&s->shared_memory, false);
757 pandecode_indent--;
758 pandecode_log("},\n");
759
760 pandecode_sfbd_format(s->format);
761
762 info.width = s->width + 1;
763 info.height = s->height + 1;
764
765 pandecode_prop("width = MALI_POSITIVE(%" PRId16 ")", info.width);
766 pandecode_prop("height = MALI_POSITIVE(%" PRId16 ")", info.height);
767
768 MEMORY_PROP(s, checksum);
769
770 if (s->checksum_stride)
771 pandecode_prop("checksum_stride = %d", s->checksum_stride);
772
773 MEMORY_PROP(s, framebuffer);
774 pandecode_prop("stride = %d", s->stride);
775
776 /* Earlier in the actual commandstream -- right before width -- but we
777 * delay to flow nicer */
778
779 pandecode_log(".clear_flags = ");
780 pandecode_log_decoded_flags(clear_flag_info, s->clear_flags);
781 pandecode_log_cont(",\n");
782
783 if (s->depth_buffer) {
784 MEMORY_PROP(s, depth_buffer);
785 pandecode_prop("depth_stride = %d", s->depth_stride);
786 }
787
788 if (s->stencil_buffer) {
789 MEMORY_PROP(s, stencil_buffer);
790 pandecode_prop("stencil_stride = %d", s->stencil_stride);
791 }
792
793 if (s->depth_stride_zero ||
794 s->stencil_stride_zero ||
795 s->zero7 || s->zero8) {
796 pandecode_msg("XXX: Depth/stencil zeros tripped\n");
797 pandecode_prop("depth_stride_zero = 0x%x",
798 s->depth_stride_zero);
799 pandecode_prop("stencil_stride_zero = 0x%x",
800 s->stencil_stride_zero);
801 pandecode_prop("zero7 = 0x%" PRIx32,
802 s->zero7);
803 pandecode_prop("zero8 = 0x%" PRIx32,
804 s->zero8);
805 }
806
807 if (s->clear_color_1 | s->clear_color_2 | s->clear_color_3 | s->clear_color_4) {
808 pandecode_prop("clear_color_1 = 0x%" PRIx32, s->clear_color_1);
809 pandecode_prop("clear_color_2 = 0x%" PRIx32, s->clear_color_2);
810 pandecode_prop("clear_color_3 = 0x%" PRIx32, s->clear_color_3);
811 pandecode_prop("clear_color_4 = 0x%" PRIx32, s->clear_color_4);
812 }
813
814 if (s->clear_depth_1 != 0 || s->clear_depth_2 != 0 || s->clear_depth_3 != 0 || s->clear_depth_4 != 0) {
815 pandecode_prop("clear_depth_1 = %f", s->clear_depth_1);
816 pandecode_prop("clear_depth_2 = %f", s->clear_depth_2);
817 pandecode_prop("clear_depth_3 = %f", s->clear_depth_3);
818 pandecode_prop("clear_depth_4 = %f", s->clear_depth_4);
819 }
820
821 if (s->clear_stencil) {
822 pandecode_prop("clear_stencil = 0x%x", s->clear_stencil);
823 }
824
825 const struct midgard_tiler_descriptor t = s->tiler;
826
827 bool has_hierarchy = !(gpu_id == 0x0720 || gpu_id == 0x0820 || gpu_id == 0x0830);
828 pandecode_midgard_tiler_descriptor(&t, s->width + 1, s->height + 1, is_fragment, has_hierarchy);
829
830 pandecode_indent--;
831 pandecode_log("};\n");
832
833 pandecode_prop("zero2 = 0x%" PRIx32, s->zero2);
834 pandecode_prop("zero4 = 0x%" PRIx32, s->zero4);
835 pandecode_prop("zero5 = 0x%" PRIx32, s->zero5);
836
837 pandecode_log_cont(".zero3 = {");
838
839 for (int i = 0; i < sizeof(s->zero3) / sizeof(s->zero3[0]); ++i)
840 pandecode_log_cont("%X, ", s->zero3[i]);
841
842 pandecode_log_cont("},\n");
843
844 pandecode_log_cont(".zero6 = {");
845
846 for (int i = 0; i < sizeof(s->zero6) / sizeof(s->zero6[0]); ++i)
847 pandecode_log_cont("%X, ", s->zero6[i]);
848
849 pandecode_log_cont("},\n");
850
851 return info;
852 }
853
854 static void
855 pandecode_compute_fbd(uint64_t gpu_va, int job_no)
856 {
857 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
858 const struct mali_shared_memory *PANDECODE_PTR_VAR(s, mem, (mali_ptr) gpu_va);
859
860 pandecode_log("struct mali_shared_memory shared_%"PRIx64"_%d = {\n", gpu_va, job_no);
861 pandecode_indent++;
862 pandecode_shared_memory(s, true);
863 pandecode_indent--;
864 pandecode_log("},\n");
865 }
866
867 /* Extracts the number of components associated with a Mali format */
868
869 static unsigned
870 pandecode_format_component_count(enum mali_format fmt)
871 {
872 /* Mask out the format class */
873 unsigned top = fmt & 0b11100000;
874
875 switch (top) {
876 case MALI_FORMAT_SNORM:
877 case MALI_FORMAT_UINT:
878 case MALI_FORMAT_UNORM:
879 case MALI_FORMAT_SINT:
880 return ((fmt >> 3) & 3) + 1;
881 default:
882 /* TODO: Validate */
883 return 4;
884 }
885 }
886
887 /* Extracts a mask of accessed components from a 12-bit Mali swizzle */
888
889 static unsigned
890 pandecode_access_mask_from_channel_swizzle(unsigned swizzle)
891 {
892 unsigned mask = 0;
893 assert(MALI_CHANNEL_RED == 0);
894
895 for (unsigned c = 0; c < 4; ++c) {
896 enum mali_channel chan = (swizzle >> (3*c)) & 0x7;
897
898 if (chan <= MALI_CHANNEL_ALPHA)
899 mask |= (1 << chan);
900 }
901
902 return mask;
903 }
904
905 /* Validates that a (format, swizzle) pair is valid, in the sense that the
906 * swizzle doesn't access any components that are undefined in the format.
907 * Returns whether the swizzle is trivial (doesn't do any swizzling) and can be
908 * omitted */
909
910 static bool
911 pandecode_validate_format_swizzle(enum mali_format fmt, unsigned swizzle)
912 {
913 unsigned nr_comp = pandecode_format_component_count(fmt);
914 unsigned access_mask = pandecode_access_mask_from_channel_swizzle(swizzle);
915 unsigned valid_mask = (1 << nr_comp) - 1;
916 unsigned invalid_mask = ~valid_mask;
917
918 if (access_mask & invalid_mask) {
919 pandecode_msg("XXX: invalid components accessed\n");
920 return false;
921 }
922
923 /* Check for the default non-swizzling swizzle so we can suppress
924 * useless printing for the defaults */
925
926 unsigned default_swizzles[4] = {
927 MALI_CHANNEL_RED | (MALI_CHANNEL_ZERO << 3) | (MALI_CHANNEL_ZERO << 6) | (MALI_CHANNEL_ONE << 9),
928 MALI_CHANNEL_RED | (MALI_CHANNEL_GREEN << 3) | (MALI_CHANNEL_ZERO << 6) | (MALI_CHANNEL_ONE << 9),
929 MALI_CHANNEL_RED | (MALI_CHANNEL_GREEN << 3) | (MALI_CHANNEL_BLUE << 6) | (MALI_CHANNEL_ONE << 9),
930 MALI_CHANNEL_RED | (MALI_CHANNEL_GREEN << 3) | (MALI_CHANNEL_BLUE << 6) | (MALI_CHANNEL_ALPHA << 9)
931 };
932
933 return (swizzle == default_swizzles[nr_comp - 1]);
934 }
935
936 /* Maps MALI_RGBA32F to rgba32f, etc */
937
938 static void
939 pandecode_format_short(enum mali_format fmt, bool srgb)
940 {
941 /* We want a type-like format, so cut off the initial MALI_ */
942 char *format = pandecode_format(fmt);
943 format += strlen("MALI_");
944
945 unsigned len = strlen(format);
946 char *lower_format = calloc(1, len + 1);
947
948 for (unsigned i = 0; i < len; ++i)
949 lower_format[i] = tolower(format[i]);
950
951 /* Sanity check sRGB flag is applied to RGB, per the name */
952 if (srgb && lower_format[0] != 'r')
953 pandecode_msg("XXX: sRGB applied to non-colour format\n");
954
955 /* Just prefix with an s, so you get formats like srgba8_unorm */
956 if (srgb)
957 pandecode_log_cont("s");
958
959 pandecode_log_cont("%s", lower_format);
960 free(lower_format);
961 }
962
963 static void
964 pandecode_swizzle(unsigned swizzle, enum mali_format format)
965 {
966 /* First, do some validation */
967 bool trivial_swizzle = pandecode_validate_format_swizzle(
968 format, swizzle);
969
970 if (trivial_swizzle)
971 return;
972
973 /* Next, print the swizzle */
974 pandecode_log_cont(".");
975
976 static const char components[] = "rgba01";
977
978 for (unsigned c = 0; c < 4; ++c) {
979 enum mali_channel chan = (swizzle >> (3 * c)) & 0x7;
980
981 if (chan >= MALI_CHANNEL_RESERVED_0) {
982 pandecode_log("XXX: invalid swizzle channel %d\n", chan);
983 continue;
984 }
985 pandecode_log_cont("%c", components[chan]);
986 }
987 }
988
989 static void
990 pandecode_rt_format(struct mali_rt_format format)
991 {
992 pandecode_log(".format = {\n");
993 pandecode_indent++;
994
995 pandecode_prop("unk1 = 0x%" PRIx32, format.unk1);
996 pandecode_prop("unk2 = 0x%" PRIx32, format.unk2);
997 pandecode_prop("unk3 = 0x%" PRIx32, format.unk3);
998 pandecode_prop("unk4 = 0x%" PRIx32, format.unk4);
999
1000 pandecode_prop("block = %s", mali_block_format_as_str(format.block));
1001
1002 /* TODO: Map formats so we can check swizzles and print nicely */
1003 pandecode_log("swizzle");
1004 pandecode_swizzle(format.swizzle, MALI_RGBA8_UNORM);
1005 pandecode_log_cont(",\n");
1006
1007 pandecode_prop("nr_channels = MALI_POSITIVE(%d)",
1008 (format.nr_channels + 1));
1009
1010 pandecode_log(".flags = ");
1011 pandecode_log_decoded_flags(mfbd_fmt_flag_info, format.flags);
1012 pandecode_log_cont(",\n");
1013
1014 pandecode_prop("msaa = %s", mali_msaa_as_str(format.msaa));
1015
1016 /* In theory, the no_preload bit can be cleared to enable MFBD preload,
1017 * which is a faster hardware-based alternative to the wallpaper method
1018 * to preserve framebuffer contents across frames. In practice, MFBD
1019 * preload is buggy on Midgard, and so this is a chicken bit. If this
1020 * bit isn't set, most likely something broke unrelated to preload */
1021
1022 if (!format.no_preload) {
1023 pandecode_msg("XXX: buggy MFBD preload enabled - chicken bit should be clear\n");
1024 pandecode_prop("no_preload = 0x%" PRIx32, format.no_preload);
1025 }
1026
1027 if (format.zero)
1028 pandecode_prop("zero = 0x%" PRIx32, format.zero);
1029
1030 pandecode_indent--;
1031 pandecode_log("},\n");
1032 }
1033
1034 static void
1035 pandecode_render_target(uint64_t gpu_va, unsigned job_no, const struct mali_framebuffer *fb)
1036 {
1037 pandecode_log("struct mali_render_target rts_list_%"PRIx64"_%d[] = {\n", gpu_va, job_no);
1038 pandecode_indent++;
1039
1040 for (int i = 0; i < (fb->rt_count_1 + 1); i++) {
1041 mali_ptr rt_va = gpu_va + i * sizeof(struct mali_render_target);
1042 struct pandecode_mapped_memory *mem =
1043 pandecode_find_mapped_gpu_mem_containing(rt_va);
1044 const struct mali_render_target *PANDECODE_PTR_VAR(rt, mem, (mali_ptr) rt_va);
1045
1046 pandecode_log("{\n");
1047 pandecode_indent++;
1048
1049 pandecode_rt_format(rt->format);
1050
1051 if (rt->format.block == MALI_BLOCK_FORMAT_AFBC) {
1052 pandecode_log(".afbc = {\n");
1053 pandecode_indent++;
1054
1055 char *a = pointer_as_memory_reference(rt->afbc.metadata);
1056 pandecode_prop("metadata = %s", a);
1057 free(a);
1058
1059 pandecode_prop("stride = %d", rt->afbc.stride);
1060
1061 pandecode_log(".flags = ");
1062 pandecode_log_decoded_flags(afbc_fmt_flag_info, rt->afbc.flags);
1063 pandecode_log_cont(",\n");
1064
1065 pandecode_indent--;
1066 pandecode_log("},\n");
1067 } else if (rt->afbc.metadata || rt->afbc.stride || rt->afbc.flags) {
1068 pandecode_msg("XXX: AFBC disabled but AFBC field set (0x%lX, 0x%x, 0x%x)\n",
1069 rt->afbc.metadata,
1070 rt->afbc.stride,
1071 rt->afbc.flags);
1072 }
1073
1074 MEMORY_PROP(rt, framebuffer);
1075 pandecode_prop("framebuffer_stride = %d", rt->framebuffer_stride);
1076
1077 if (rt->layer_stride)
1078 pandecode_prop("layer_stride = %d", rt->layer_stride);
1079
1080 if (rt->clear_color_1 | rt->clear_color_2 | rt->clear_color_3 | rt->clear_color_4) {
1081 pandecode_prop("clear_color_1 = 0x%" PRIx32, rt->clear_color_1);
1082 pandecode_prop("clear_color_2 = 0x%" PRIx32, rt->clear_color_2);
1083 pandecode_prop("clear_color_3 = 0x%" PRIx32, rt->clear_color_3);
1084 pandecode_prop("clear_color_4 = 0x%" PRIx32, rt->clear_color_4);
1085 }
1086
1087 if (rt->zero1 || rt->zero2) {
1088 pandecode_msg("XXX: render target zeros tripped\n");
1089 pandecode_prop("zero1 = 0x%" PRIx64, rt->zero1);
1090 pandecode_prop("zero2 = 0x%" PRIx32, rt->zero2);
1091 }
1092
1093 pandecode_indent--;
1094 pandecode_log("},\n");
1095 }
1096
1097 pandecode_indent--;
1098 pandecode_log("};\n");
1099 }
1100
1101 static struct pandecode_fbd
1102 pandecode_mfbd_bfr(uint64_t gpu_va, int job_no, bool is_fragment, bool is_compute, bool is_bifrost)
1103 {
1104 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
1105 const struct mali_framebuffer *PANDECODE_PTR_VAR(fb, mem, (mali_ptr) gpu_va);
1106
1107 struct pandecode_fbd info;
1108
1109 if (is_bifrost && fb->msaa.sample_locations) {
1110 /* The blob stores all possible sample locations in a single buffer
1111 * allocated on startup, and just switches the pointer when switching
1112 * MSAA state. For now, we just put the data into the cmdstream, but we
1113 * should do something like what the blob does with a real driver.
1114 *
1115 * There seem to be 32 slots for sample locations, followed by another
1116 * 16. The second 16 is just the center location followed by 15 zeros
1117 * in all the cases I've identified (maybe shader vs. depth/color
1118 * samples?).
1119 */
1120
1121 struct pandecode_mapped_memory *smem = pandecode_find_mapped_gpu_mem_containing(fb->msaa.sample_locations);
1122
1123 const u16 *PANDECODE_PTR_VAR(samples, smem, fb->msaa.sample_locations);
1124
1125 pandecode_log("uint16_t sample_locations_%d[] = {\n", job_no);
1126 pandecode_indent++;
1127
1128 for (int i = 0; i < 32 + 16; i++) {
1129 pandecode_log("%d, %d,\n", samples[2 * i], samples[2 * i + 1]);
1130 }
1131
1132 pandecode_indent--;
1133 pandecode_log("};\n");
1134 }
1135
1136 pandecode_log("struct mali_framebuffer framebuffer_%"PRIx64"_%d = {\n", gpu_va, job_no);
1137 pandecode_indent++;
1138
1139 if (is_bifrost) {
1140 pandecode_log(".msaa = {\n");
1141 pandecode_indent++;
1142
1143 if (fb->msaa.sample_locations)
1144 pandecode_prop("sample_locations = sample_locations_%d", job_no);
1145 else
1146 pandecode_msg("XXX: sample_locations missing\n");
1147
1148 if (fb->msaa.zero1 || fb->msaa.zero2 || fb->msaa.zero4) {
1149 pandecode_msg("XXX: multisampling zero tripped\n");
1150 pandecode_prop("zero1 = %" PRIx64, fb->msaa.zero1);
1151 pandecode_prop("zero2 = %" PRIx64, fb->msaa.zero2);
1152 pandecode_prop("zero4 = %" PRIx64, fb->msaa.zero4);
1153 }
1154
1155 pandecode_indent--;
1156 pandecode_log("},\n");
1157 } else {
1158 pandecode_log(".shared_memory = {\n");
1159 pandecode_indent++;
1160 pandecode_shared_memory(&fb->shared_memory, is_compute);
1161 pandecode_indent--;
1162 pandecode_log("},\n");
1163 }
1164
1165 info.width = fb->width1 + 1;
1166 info.height = fb->height1 + 1;
1167 info.rt_count = fb->rt_count_1 + 1;
1168
1169 pandecode_prop("width1 = MALI_POSITIVE(%d)", fb->width1 + 1);
1170 pandecode_prop("height1 = MALI_POSITIVE(%d)", fb->height1 + 1);
1171 pandecode_prop("width2 = MALI_POSITIVE(%d)", fb->width2 + 1);
1172 pandecode_prop("height2 = MALI_POSITIVE(%d)", fb->height2 + 1);
1173
1174 pandecode_prop("unk1 = 0x%x", fb->unk1);
1175 pandecode_prop("unk2 = 0x%x", fb->unk2);
1176 pandecode_prop("rt_count_1 = MALI_POSITIVE(%d)", fb->rt_count_1 + 1);
1177 pandecode_prop("rt_count_2 = %d", fb->rt_count_2);
1178
1179 pandecode_log(".mfbd_flags = ");
1180 pandecode_log_decoded_flags(mfbd_flag_info, fb->mfbd_flags);
1181 pandecode_log_cont(",\n");
1182
1183 if (fb->clear_stencil)
1184 pandecode_prop("clear_stencil = 0x%x", fb->clear_stencil);
1185
1186 if (fb->clear_depth)
1187 pandecode_prop("clear_depth = %f", fb->clear_depth);
1188
1189 if (!is_compute)
1190 if (is_bifrost)
1191 pandecode_bifrost_tiler_descriptor(fb);
1192 else {
1193 const struct midgard_tiler_descriptor t = fb->tiler;
1194 pandecode_midgard_tiler_descriptor(&t, fb->width1 + 1, fb->height1 + 1, is_fragment, true);
1195 }
1196 else
1197 pandecode_msg("XXX: skipping compute MFBD, fixme\n");
1198
1199 if (fb->zero3 || fb->zero4) {
1200 pandecode_msg("XXX: framebuffer zeros tripped\n");
1201 pandecode_prop("zero3 = 0x%" PRIx32, fb->zero3);
1202 pandecode_prop("zero4 = 0x%" PRIx32, fb->zero4);
1203 }
1204
1205 pandecode_indent--;
1206 pandecode_log("};\n");
1207
1208 gpu_va += sizeof(struct mali_framebuffer);
1209
1210 info.has_extra = (fb->mfbd_flags & MALI_MFBD_EXTRA) && is_fragment;
1211
1212 if (info.has_extra) {
1213 mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
1214 const struct mali_framebuffer_extra *PANDECODE_PTR_VAR(fbx, mem, (mali_ptr) gpu_va);
1215
1216 pandecode_log("struct mali_framebuffer_extra fb_extra_%"PRIx64"_%d = {\n", gpu_va, job_no);
1217 pandecode_indent++;
1218
1219 MEMORY_PROP(fbx, checksum);
1220
1221 if (fbx->checksum_stride)
1222 pandecode_prop("checksum_stride = %d", fbx->checksum_stride);
1223
1224 pandecode_log(".flags_hi = ");
1225 pandecode_log_decoded_flags(mfbd_extra_flag_hi_info, fbx->flags_hi);
1226 pandecode_log_cont(",\n");
1227
1228 pandecode_log(".flags_lo = ");
1229 pandecode_log_decoded_flags(mfbd_extra_flag_lo_info, fbx->flags_lo);
1230 pandecode_log_cont(",\n");
1231
1232 pandecode_prop("zs_block = %s", mali_block_format_as_str(fbx->zs_block));
1233 pandecode_prop("zs_samples = MALI_POSITIVE(%u)", fbx->zs_samples + 1);
1234
1235 if (fbx->zs_block == MALI_BLOCK_FORMAT_AFBC) {
1236 pandecode_log(".ds_afbc = {\n");
1237 pandecode_indent++;
1238
1239 MEMORY_PROP_DIR(fbx->ds_afbc, depth_stencil_afbc_metadata);
1240 pandecode_prop("depth_stencil_afbc_stride = %d",
1241 fbx->ds_afbc.depth_stencil_afbc_stride);
1242 MEMORY_PROP_DIR(fbx->ds_afbc, depth_stencil);
1243
1244 pandecode_log(".flags = ");
1245 pandecode_log_decoded_flags(afbc_fmt_flag_info, fbx->ds_afbc.flags);
1246 pandecode_log_cont(",\n");
1247
1248 if (fbx->ds_afbc.padding) {
1249 pandecode_msg("XXX: Depth/stencil AFBC zeros tripped\n");
1250 pandecode_prop("padding = 0x%" PRIx64, fbx->ds_afbc.padding);
1251 }
1252
1253 pandecode_indent--;
1254 pandecode_log("},\n");
1255 } else {
1256 pandecode_log(".ds_linear = {\n");
1257 pandecode_indent++;
1258
1259 if (fbx->ds_linear.depth) {
1260 MEMORY_PROP_DIR(fbx->ds_linear, depth);
1261 pandecode_prop("depth_stride = %d",
1262 fbx->ds_linear.depth_stride);
1263 pandecode_prop("depth_layer_stride = %d",
1264 fbx->ds_linear.depth_layer_stride);
1265 } else if (fbx->ds_linear.depth_stride || fbx->ds_linear.depth_layer_stride) {
1266 pandecode_msg("XXX: depth stride zero tripped %d %d\n", fbx->ds_linear.depth_stride, fbx->ds_linear.depth_layer_stride);
1267 }
1268
1269 if (fbx->ds_linear.stencil) {
1270 MEMORY_PROP_DIR(fbx->ds_linear, stencil);
1271 pandecode_prop("stencil_stride = %d",
1272 fbx->ds_linear.stencil_stride);
1273 pandecode_prop("stencil_layer_stride = %d",
1274 fbx->ds_linear.stencil_layer_stride);
1275 } else if (fbx->ds_linear.stencil_stride || fbx->ds_linear.stencil_layer_stride) {
1276 pandecode_msg("XXX: stencil stride zero tripped %d %d\n", fbx->ds_linear.stencil_stride, fbx->ds_linear.stencil_layer_stride);
1277 }
1278
1279 if (fbx->ds_linear.depth_stride_zero ||
1280 fbx->ds_linear.stencil_stride_zero) {
1281 pandecode_msg("XXX: Depth/stencil zeros tripped\n");
1282 pandecode_prop("depth_stride_zero = 0x%x",
1283 fbx->ds_linear.depth_stride_zero);
1284 pandecode_prop("stencil_stride_zero = 0x%x",
1285 fbx->ds_linear.stencil_stride_zero);
1286 }
1287
1288 pandecode_indent--;
1289 pandecode_log("},\n");
1290 }
1291
1292 if (fbx->clear_color_1 | fbx->clear_color_2) {
1293 pandecode_prop("clear_color_1 = 0x%" PRIx32, fbx->clear_color_1);
1294 pandecode_prop("clear_color_2 = 0x%" PRIx32, fbx->clear_color_2);
1295 }
1296
1297 if (fbx->zero3) {
1298 pandecode_msg("XXX: fb_extra zeros tripped\n");
1299 pandecode_prop("zero3 = 0x%" PRIx64, fbx->zero3);
1300 }
1301
1302 pandecode_indent--;
1303 pandecode_log("};\n");
1304
1305 gpu_va += sizeof(struct mali_framebuffer_extra);
1306 }
1307
1308 if (is_fragment)
1309 pandecode_render_target(gpu_va, job_no, fb);
1310
1311 return info;
1312 }
1313
1314 /* Just add a comment decoding the shift/odd fields forming the padded vertices
1315 * count */
1316
1317 static void
1318 pandecode_padded_vertices(unsigned shift, unsigned k)
1319 {
1320 unsigned odd = 2*k + 1;
1321 unsigned pot = 1 << shift;
1322 pandecode_msg("padded_num_vertices = %d\n", odd * pot);
1323 }
1324
1325 /* Given a magic divisor, recover what we were trying to divide by.
1326 *
1327 * Let m represent the magic divisor. By definition, m is an element on Z, whre
1328 * 0 <= m < 2^N, for N bits in m.
1329 *
1330 * Let q represent the number we would like to divide by.
1331 *
1332 * By definition of a magic divisor for N-bit unsigned integers (a number you
1333 * multiply by to magically get division), m is a number such that:
1334 *
1335 * (m * x) & (2^N - 1) = floor(x/q).
1336 * for all x on Z where 0 <= x < 2^N
1337 *
1338 * Ignore the case where any of the above values equals zero; it is irrelevant
1339 * for our purposes (instanced arrays).
1340 *
1341 * Choose x = q. Then:
1342 *
1343 * (m * x) & (2^N - 1) = floor(x/q).
1344 * (m * q) & (2^N - 1) = floor(q/q).
1345 *
1346 * floor(q/q) = floor(1) = 1, therefore:
1347 *
1348 * (m * q) & (2^N - 1) = 1
1349 *
1350 * Recall the identity that the bitwise AND of one less than a power-of-two
1351 * equals the modulo with that power of two, i.e. for all x:
1352 *
1353 * x & (2^N - 1) = x % N
1354 *
1355 * Therefore:
1356 *
1357 * mq % (2^N) = 1
1358 *
1359 * By definition, a modular multiplicative inverse of a number m is the number
1360 * q such that with respect to a modulos M:
1361 *
1362 * mq % M = 1
1363 *
1364 * Therefore, q is the modular multiplicative inverse of m with modulus 2^N.
1365 *
1366 */
1367
1368 static void
1369 pandecode_magic_divisor(uint32_t magic, unsigned shift, unsigned orig_divisor, unsigned extra)
1370 {
1371 #if 0
1372 /* Compute the modular inverse of `magic` with respect to 2^(32 -
1373 * shift) the most lame way possible... just repeatedly add.
1374 * Asymptoptically slow but nobody cares in practice, unless you have
1375 * massive numbers of vertices or high divisors. */
1376
1377 unsigned inverse = 0;
1378
1379 /* Magic implicitly has the highest bit set */
1380 magic |= (1 << 31);
1381
1382 /* Depending on rounding direction */
1383 if (extra)
1384 magic++;
1385
1386 for (;;) {
1387 uint32_t product = magic * inverse;
1388
1389 if (shift) {
1390 product >>= shift;
1391 }
1392
1393 if (product == 1)
1394 break;
1395
1396 ++inverse;
1397 }
1398
1399 pandecode_msg("dividing by %d (maybe off by two)\n", inverse);
1400
1401 /* Recall we're supposed to divide by (gl_level_divisor *
1402 * padded_num_vertices) */
1403
1404 unsigned padded_num_vertices = inverse / orig_divisor;
1405
1406 pandecode_msg("padded_num_vertices = %d\n", padded_num_vertices);
1407 #endif
1408 }
1409
1410 static void
1411 pandecode_attributes(const struct pandecode_mapped_memory *mem,
1412 mali_ptr addr, int job_no, char *suffix,
1413 int count, bool varying, enum mali_job_type job_type)
1414 {
1415 char *prefix = varying ? "varying" : "attribute";
1416 assert(addr);
1417
1418 if (!count) {
1419 pandecode_msg("warn: No %s records\n", prefix);
1420 return;
1421 }
1422
1423 union mali_attr *attr = pandecode_fetch_gpu_mem(mem, addr, sizeof(union mali_attr) * count);
1424
1425 for (int i = 0; i < count; ++i) {
1426 /* First, check for special records */
1427 if (attr[i].elements < MALI_RECORD_SPECIAL) {
1428 if (attr[i].size)
1429 pandecode_msg("XXX: tripped size=%d\n", attr[i].size);
1430
1431 if (attr[i].stride) {
1432 /* gl_InstanceID passes a magic divisor in the
1433 * stride field to divide by the padded vertex
1434 * count. No other records should do so, so
1435 * stride should otherwise be zero. Note that
1436 * stride in the usual attribute sense doesn't
1437 * apply to special records. */
1438
1439 bool has_divisor = attr[i].elements == MALI_ATTR_INSTANCEID;
1440
1441 pandecode_log_cont("/* %smagic divisor = %X */ ",
1442 has_divisor ? "" : "XXX: ", attr[i].stride);
1443 }
1444
1445 if (attr[i].shift || attr[i].extra_flags) {
1446 /* Attributes use these fields for
1447 * instancing/padding/etc type issues, but
1448 * varyings don't */
1449
1450 pandecode_log_cont("/* %sshift=%d, extra=%d */ ",
1451 varying ? "XXX: " : "",
1452 attr[i].shift, attr[i].extra_flags);
1453 }
1454
1455 /* Print the special record name */
1456 bool attribute = false;
1457 pandecode_log("%s_%d = %s;\n", prefix, i, pandecode_special_record(attr[i].elements, &attribute));
1458
1459 /* Sanity check */
1460 if (attribute == varying)
1461 pandecode_msg("XXX: mismatched special record\n");
1462
1463 continue;
1464 }
1465
1466 enum mali_attr_mode mode = attr[i].elements & 7;
1467
1468 if (mode == MALI_ATTR_UNUSED)
1469 pandecode_msg("XXX: unused attribute record\n");
1470
1471 /* For non-linear records, we need to print the type of record */
1472 if (mode != MALI_ATTR_LINEAR)
1473 pandecode_log_cont("%s ", pandecode_attr_mode_short(mode));
1474
1475 /* Print the name to link with attr_meta */
1476 pandecode_log_cont("%s_%d", prefix, i);
1477
1478 /* Print the stride and size */
1479 pandecode_log_cont("<%u>[%u]", attr[i].stride, attr[i].size);
1480
1481 /* TODO: Sanity check the quotient itself. It must be equal to
1482 * (or be greater than, if the driver added padding) the padded
1483 * vertex count. */
1484
1485 /* Finally, print the pointer */
1486 mali_ptr raw_elements = attr[i].elements & ~7;
1487 char *a = pointer_as_memory_reference(raw_elements);
1488 pandecode_log_cont(" = (%s);\n", a);
1489 free(a);
1490
1491 /* Check the pointer */
1492 pandecode_validate_buffer(raw_elements, attr[i].size);
1493
1494 /* shift/extra_flags exist only for instanced */
1495 if (attr[i].shift | attr[i].extra_flags) {
1496 /* These are set to random values by the blob for
1497 * varyings, most likely a symptom of uninitialized
1498 * memory where the hardware masked the bug. As such we
1499 * put this at a warning, not an error. */
1500
1501 if (mode == MALI_ATTR_LINEAR)
1502 pandecode_msg("warn: instancing fields set for linear\n");
1503
1504 pandecode_prop("shift = %d", attr[i].shift);
1505 pandecode_prop("extra_flags = %d", attr[i].extra_flags);
1506 }
1507
1508 /* Decode further where possible */
1509
1510 if (mode == MALI_ATTR_MODULO) {
1511 pandecode_padded_vertices(
1512 attr[i].shift,
1513 attr[i].extra_flags);
1514 }
1515
1516 if (mode == MALI_ATTR_NPOT_DIVIDE) {
1517 i++;
1518 pandecode_log("{\n");
1519 pandecode_indent++;
1520 pandecode_prop("unk = 0x%x", attr[i].unk);
1521 pandecode_prop("magic_divisor = 0x%08x", attr[i].magic_divisor);
1522 if (attr[i].zero != 0)
1523 pandecode_prop("XXX: zero tripped (0x%x)\n", attr[i].zero);
1524 pandecode_prop("divisor = %d", attr[i].divisor);
1525 pandecode_magic_divisor(attr[i].magic_divisor, attr[i - 1].shift, attr[i].divisor, attr[i - 1].extra_flags);
1526 pandecode_indent--;
1527 pandecode_log("}, \n");
1528 }
1529
1530 }
1531
1532 pandecode_log("\n");
1533 }
1534
1535 static mali_ptr
1536 pandecode_shader_address(const char *name, mali_ptr ptr)
1537 {
1538 /* TODO: Decode flags */
1539 mali_ptr shader_ptr = ptr & ~15;
1540
1541 char *a = pointer_as_memory_reference(shader_ptr);
1542 pandecode_prop("%s = (%s) | %d", name, a, (int) (ptr & 15));
1543 free(a);
1544
1545 return shader_ptr;
1546 }
1547
1548 static void
1549 pandecode_blend_equation(const struct mali_blend_equation *blend)
1550 {
1551 if (blend->zero1)
1552 pandecode_msg("XXX: blend zero tripped: %X\n", blend->zero1);
1553
1554 pandecode_log(".equation = {\n");
1555 pandecode_indent++;
1556
1557 pandecode_prop("rgb_mode = 0x%X", blend->rgb_mode);
1558 pandecode_prop("alpha_mode = 0x%X", blend->alpha_mode);
1559
1560 pandecode_log(".color_mask = ");
1561 pandecode_log_decoded_flags(mask_flag_info, blend->color_mask);
1562 pandecode_log_cont(",\n");
1563
1564 pandecode_indent--;
1565 pandecode_log("},\n");
1566 }
1567
1568 /* Decodes a Bifrost blend constant. See the notes in bifrost_blend_rt */
1569
1570 static unsigned
1571 decode_bifrost_constant(u16 constant)
1572 {
1573 float lo = (float) (constant & 0xFF);
1574 float hi = (float) (constant >> 8);
1575
1576 return (hi / 255.0) + (lo / 65535.0);
1577 }
1578
1579 static mali_ptr
1580 pandecode_bifrost_blend(void *descs, int job_no, int rt_no)
1581 {
1582 struct bifrost_blend_rt *b =
1583 ((struct bifrost_blend_rt *) descs) + rt_no;
1584
1585 pandecode_log("struct bifrost_blend_rt blend_rt_%d_%d = {\n", job_no, rt_no);
1586 pandecode_indent++;
1587
1588 pandecode_prop("flags = 0x%" PRIx16, b->flags);
1589 pandecode_prop("constant = 0x%" PRIx8 " /* %f */",
1590 b->constant, decode_bifrost_constant(b->constant));
1591
1592 /* TODO figure out blend shader enable bit */
1593 pandecode_blend_equation(&b->equation);
1594
1595 pandecode_prop("unk2 = 0x%" PRIx16, b->unk2);
1596 pandecode_prop("index = 0x%" PRIx16, b->index);
1597
1598 pandecode_log(".format = ");
1599 pandecode_format_short(b->format, false);
1600 pandecode_swizzle(b->swizzle, b->format);
1601 pandecode_log_cont(",\n");
1602
1603 pandecode_prop("swizzle = 0x%" PRIx32, b->swizzle);
1604 pandecode_prop("format = 0x%" PRIx32, b->format);
1605
1606 if (b->zero1) {
1607 pandecode_msg("XXX: pandecode_bifrost_blend zero1 tripped\n");
1608 pandecode_prop("zero1 = 0x%" PRIx32, b->zero1);
1609 }
1610
1611 pandecode_log(".shader_type = ");
1612 switch(b->shader_type) {
1613 case BIFROST_BLEND_F16:
1614 pandecode_log_cont("BIFROST_BLEND_F16");
1615 break;
1616 case BIFROST_BLEND_F32:
1617 pandecode_log_cont("BIFROST_BLEND_F32");
1618 break;
1619 case BIFROST_BLEND_I32:
1620 pandecode_log_cont("BIFROST_BLEND_I32");
1621 break;
1622 case BIFROST_BLEND_U32:
1623 pandecode_log_cont("BIFROST_BLEND_U32");
1624 break;
1625 case BIFROST_BLEND_I16:
1626 pandecode_log_cont("BIFROST_BLEND_I16");
1627 break;
1628 case BIFROST_BLEND_U16:
1629 pandecode_log_cont("BIFROST_BLEND_U16");
1630 break;
1631 }
1632 pandecode_log_cont(",\n");
1633
1634 if (b->zero2) {
1635 pandecode_msg("XXX: pandecode_bifrost_blend zero2 tripped\n");
1636 pandecode_prop("zero2 = 0x%" PRIx32, b->zero2);
1637 }
1638
1639 pandecode_prop("shader = 0x%" PRIx32, b->shader);
1640
1641 pandecode_indent--;
1642 pandecode_log("},\n");
1643
1644 return 0;
1645 }
1646
1647 static mali_ptr
1648 pandecode_midgard_blend(union midgard_blend *blend, bool is_shader)
1649 {
1650 /* constant/equation is in a union */
1651 if (!blend->shader)
1652 return 0;
1653
1654 pandecode_log(".blend = {\n");
1655 pandecode_indent++;
1656
1657 if (is_shader) {
1658 pandecode_shader_address("shader", blend->shader);
1659 } else {
1660 pandecode_blend_equation(&blend->equation);
1661 pandecode_prop("constant = %f", blend->constant);
1662 }
1663
1664 pandecode_indent--;
1665 pandecode_log("},\n");
1666
1667 /* Return blend shader to disassemble if present */
1668 return is_shader ? (blend->shader & ~0xF) : 0;
1669 }
1670
1671 static mali_ptr
1672 pandecode_midgard_blend_mrt(void *descs, int job_no, int rt_no)
1673 {
1674 struct midgard_blend_rt *b =
1675 ((struct midgard_blend_rt *) descs) + rt_no;
1676
1677 /* Flags determine presence of blend shader */
1678 bool is_shader = (b->flags & 0xF) >= 0x2;
1679
1680 pandecode_log("struct midgard_blend_rt blend_rt_%d_%d = {\n", job_no, rt_no);
1681 pandecode_indent++;
1682
1683 pandecode_prop("flags = 0x%" PRIx64, b->flags);
1684
1685 union midgard_blend blend = b->blend;
1686 mali_ptr shader = pandecode_midgard_blend(&blend, is_shader);
1687
1688 pandecode_indent--;
1689 pandecode_log("};\n");
1690
1691 return shader;
1692 }
1693
1694 /* Attributes and varyings have descriptor records, which contain information
1695 * about their format and ordering with the attribute/varying buffers. We'll
1696 * want to validate that the combinations specified are self-consistent.
1697 */
1698
1699 static int
1700 pandecode_attribute_meta(int job_no, int count, const struct mali_vertex_tiler_postfix *v, bool varying, char *suffix)
1701 {
1702 char base[128];
1703 char *prefix = varying ? "varying" : "attribute";
1704 unsigned max_index = 0;
1705 snprintf(base, sizeof(base), "%s_meta", prefix);
1706
1707 struct mali_attr_meta *attr_meta;
1708 mali_ptr p = varying ? v->varying_meta : v->attribute_meta;
1709
1710 struct pandecode_mapped_memory *attr_mem = pandecode_find_mapped_gpu_mem_containing(p);
1711
1712 for (int i = 0; i < count; ++i, p += sizeof(struct mali_attr_meta)) {
1713 attr_meta = pandecode_fetch_gpu_mem(attr_mem, p,
1714 sizeof(*attr_mem));
1715
1716 /* If the record is discard, it should be zero for everything else */
1717
1718 if (attr_meta->format == MALI_VARYING_DISCARD) {
1719 uint64_t zero =
1720 attr_meta->index |
1721 attr_meta->unknown1 |
1722 attr_meta->unknown3 |
1723 attr_meta->src_offset;
1724
1725 if (zero)
1726 pandecode_msg("XXX: expected empty record for varying discard\n");
1727
1728 /* We want to look for a literal 0000 swizzle -- this
1729 * is not encoded with all zeroes, however */
1730
1731 enum mali_channel z = MALI_CHANNEL_ZERO;
1732 unsigned zero_swizzle = z | (z << 3) | (z << 6) | (z << 9);
1733 bool good_swizzle = attr_meta->swizzle == zero_swizzle;
1734
1735 if (!good_swizzle)
1736 pandecode_msg("XXX: expected zero swizzle for discard\n");
1737
1738 if (!varying)
1739 pandecode_msg("XXX: cannot discard attribute\n");
1740
1741 /* If we're all good, omit the record */
1742 if (!zero && varying && good_swizzle) {
1743 pandecode_log("/* discarded varying */\n");
1744 continue;
1745 }
1746 }
1747
1748 if (attr_meta->index > max_index)
1749 max_index = attr_meta->index;
1750
1751 if (attr_meta->unknown1 != 0x2) {
1752 pandecode_msg("XXX: expected unknown1 = 0x2\n");
1753 pandecode_prop("unknown1 = 0x%" PRIx64, (u64) attr_meta->unknown1);
1754 }
1755
1756 if (attr_meta->unknown3) {
1757 pandecode_msg("XXX: unexpected unknown3 set\n");
1758 pandecode_prop("unknown3 = 0x%" PRIx64, (u64) attr_meta->unknown3);
1759 }
1760
1761 pandecode_format_short(attr_meta->format, false);
1762 pandecode_log_cont(" %s_%u", prefix, attr_meta->index);
1763
1764 if (attr_meta->src_offset)
1765 pandecode_log_cont("[%u]", attr_meta->src_offset);
1766
1767 pandecode_swizzle(attr_meta->swizzle, attr_meta->format);
1768
1769 pandecode_log_cont(";\n");
1770 }
1771
1772 pandecode_log("\n");
1773
1774 return count ? (max_index + 1) : 0;
1775 }
1776
1777 /* return bits [lo, hi) of word */
1778 static u32
1779 bits(u32 word, u32 lo, u32 hi)
1780 {
1781 if (hi - lo >= 32)
1782 return word; // avoid undefined behavior with the shift
1783
1784 return (word >> lo) & ((1 << (hi - lo)) - 1);
1785 }
1786
1787 static void
1788 pandecode_vertex_tiler_prefix(struct mali_vertex_tiler_prefix *p, int job_no, bool graphics)
1789 {
1790 pandecode_log(".prefix = {\n");
1791 pandecode_indent++;
1792
1793 /* Decode invocation_count. See the comment before the definition of
1794 * invocation_count for an explanation.
1795 */
1796
1797 unsigned size_y_shift = bits(p->invocation_shifts, 0, 5);
1798 unsigned size_z_shift = bits(p->invocation_shifts, 5, 10);
1799 unsigned workgroups_x_shift = bits(p->invocation_shifts, 10, 16);
1800 unsigned workgroups_y_shift = bits(p->invocation_shifts, 16, 22);
1801 unsigned workgroups_z_shift = bits(p->invocation_shifts, 22, 28);
1802 unsigned workgroups_x_shift_2 = bits(p->invocation_shifts, 28, 32);
1803
1804 unsigned size_x = bits(p->invocation_count, 0, size_y_shift) + 1;
1805 unsigned size_y = bits(p->invocation_count, size_y_shift, size_z_shift) + 1;
1806 unsigned size_z = bits(p->invocation_count, size_z_shift, workgroups_x_shift) + 1;
1807
1808 unsigned groups_x = bits(p->invocation_count, workgroups_x_shift, workgroups_y_shift) + 1;
1809 unsigned groups_y = bits(p->invocation_count, workgroups_y_shift, workgroups_z_shift) + 1;
1810 unsigned groups_z = bits(p->invocation_count, workgroups_z_shift, 32) + 1;
1811
1812 /* Even though we have this decoded, we want to ensure that the
1813 * representation is "unique" so we don't lose anything by printing only
1814 * the final result. More specifically, we need to check that we were
1815 * passed something in canonical form, since the definition per the
1816 * hardware is inherently not unique. How? Well, take the resulting
1817 * decode and pack it ourselves! If it is bit exact with what we
1818 * decoded, we're good to go. */
1819
1820 struct mali_vertex_tiler_prefix ref;
1821 panfrost_pack_work_groups_compute(&ref, groups_x, groups_y, groups_z, size_x, size_y, size_z, graphics);
1822
1823 bool canonical =
1824 (p->invocation_count == ref.invocation_count) &&
1825 (p->invocation_shifts == ref.invocation_shifts);
1826
1827 if (!canonical) {
1828 pandecode_msg("XXX: non-canonical workgroups packing\n");
1829 pandecode_msg("expected: %X, %X",
1830 ref.invocation_count,
1831 ref.invocation_shifts);
1832
1833 pandecode_prop("invocation_count = 0x%" PRIx32, p->invocation_count);
1834 pandecode_prop("size_y_shift = %d", size_y_shift);
1835 pandecode_prop("size_z_shift = %d", size_z_shift);
1836 pandecode_prop("workgroups_x_shift = %d", workgroups_x_shift);
1837 pandecode_prop("workgroups_y_shift = %d", workgroups_y_shift);
1838 pandecode_prop("workgroups_z_shift = %d", workgroups_z_shift);
1839 pandecode_prop("workgroups_x_shift_2 = %d", workgroups_x_shift_2);
1840 }
1841
1842 /* Regardless, print the decode */
1843 pandecode_msg("size (%d, %d, %d), count (%d, %d, %d)\n",
1844 size_x, size_y, size_z,
1845 groups_x, groups_y, groups_z);
1846
1847 /* TODO: Decode */
1848 if (p->unknown_draw)
1849 pandecode_prop("unknown_draw = 0x%" PRIx32, p->unknown_draw);
1850
1851 pandecode_prop("workgroups_x_shift_3 = 0x%" PRIx32, p->workgroups_x_shift_3);
1852
1853 if (p->draw_mode != MALI_DRAW_MODE_NONE)
1854 pandecode_prop("draw_mode = %s", mali_draw_mode_as_str(p->draw_mode));
1855
1856 /* Index count only exists for tiler jobs anyway */
1857
1858 if (p->index_count)
1859 pandecode_prop("index_count = MALI_POSITIVE(%" PRId32 ")", p->index_count + 1);
1860
1861
1862 unsigned index_raw_size = (p->unknown_draw & MALI_DRAW_INDEXED_SIZE);
1863 index_raw_size >>= MALI_DRAW_INDEXED_SHIFT;
1864
1865 /* Validate an index buffer is present if we need one. TODO: verify
1866 * relationship between invocation_count and index_count */
1867
1868 if (p->indices) {
1869 unsigned count = p->index_count;
1870
1871 /* Grab the size */
1872 unsigned size = (index_raw_size == 0x3) ? 4 : index_raw_size;
1873
1874 /* Ensure we got a size, and if so, validate the index buffer
1875 * is large enough to hold a full set of indices of the given
1876 * size */
1877
1878 if (!index_raw_size)
1879 pandecode_msg("XXX: index size missing\n");
1880 else
1881 pandecode_validate_buffer(p->indices, count * size);
1882 } else if (index_raw_size)
1883 pandecode_msg("XXX: unexpected index size %u\n", index_raw_size);
1884
1885 if (p->offset_bias_correction)
1886 pandecode_prop("offset_bias_correction = %d", p->offset_bias_correction);
1887
1888 /* TODO: Figure out what this is. It's not zero */
1889 pandecode_prop("zero1 = 0x%" PRIx32, p->zero1);
1890
1891 pandecode_indent--;
1892 pandecode_log("},\n");
1893 }
1894
1895 static void
1896 pandecode_uniform_buffers(mali_ptr pubufs, int ubufs_count, int job_no)
1897 {
1898 struct pandecode_mapped_memory *umem = pandecode_find_mapped_gpu_mem_containing(pubufs);
1899 uint64_t *PANDECODE_PTR_VAR(ubufs, umem, pubufs);
1900
1901 for (int i = 0; i < ubufs_count; i++) {
1902 unsigned size = (ubufs[i] & ((1 << 10) - 1)) * 16;
1903 mali_ptr addr = (ubufs[i] >> 10) << 2;
1904
1905 pandecode_validate_buffer(addr, size);
1906
1907 char *ptr = pointer_as_memory_reference(addr);
1908 pandecode_log("ubuf_%d[%u] = %s;\n", i, size, ptr);
1909 free(ptr);
1910 }
1911
1912 pandecode_log("\n");
1913 }
1914
1915 static void
1916 pandecode_uniforms(mali_ptr uniforms, unsigned uniform_count)
1917 {
1918 pandecode_validate_buffer(uniforms, uniform_count * 16);
1919
1920 char *ptr = pointer_as_memory_reference(uniforms);
1921 pandecode_log("vec4 uniforms[%u] = %s;\n", uniform_count, ptr);
1922 free(ptr);
1923 }
1924
1925 static const char *
1926 shader_type_for_job(unsigned type)
1927 {
1928 switch (type) {
1929 case MALI_JOB_TYPE_VERTEX: return "VERTEX";
1930 case MALI_JOB_TYPE_TILER: return "FRAGMENT";
1931 case MALI_JOB_TYPE_COMPUTE: return "COMPUTE";
1932 default:
1933 return "UNKNOWN";
1934 }
1935 }
1936
1937 static unsigned shader_id = 0;
1938
1939 static struct midgard_disasm_stats
1940 pandecode_shader_disassemble(mali_ptr shader_ptr, int shader_no, int type,
1941 bool is_bifrost, unsigned gpu_id)
1942 {
1943 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(shader_ptr);
1944 uint8_t *PANDECODE_PTR_VAR(code, mem, shader_ptr);
1945
1946 /* Compute maximum possible size */
1947 size_t sz = mem->length - (shader_ptr - mem->gpu_va);
1948
1949 /* Print some boilerplate to clearly denote the assembly (which doesn't
1950 * obey indentation rules), and actually do the disassembly! */
1951
1952 pandecode_log_cont("\n\n");
1953
1954 struct midgard_disasm_stats stats;
1955
1956 if (is_bifrost) {
1957 disassemble_bifrost(pandecode_dump_stream, code, sz, true);
1958
1959 /* TODO: Extend stats to Bifrost */
1960 stats.texture_count = -128;
1961 stats.sampler_count = -128;
1962 stats.attribute_count = -128;
1963 stats.varying_count = -128;
1964 stats.uniform_count = -128;
1965 stats.uniform_buffer_count = -128;
1966 stats.work_count = -128;
1967
1968 stats.instruction_count = 0;
1969 stats.bundle_count = 0;
1970 stats.quadword_count = 0;
1971 stats.helper_invocations = false;
1972 } else {
1973 stats = disassemble_midgard(pandecode_dump_stream,
1974 code, sz, gpu_id,
1975 type == MALI_JOB_TYPE_TILER ?
1976 MESA_SHADER_FRAGMENT : MESA_SHADER_VERTEX);
1977 }
1978
1979 /* Print shader-db stats. Skip COMPUTE jobs since they are used for
1980 * driver-internal purposes with the blob and interfere */
1981
1982 bool should_shaderdb = type != MALI_JOB_TYPE_COMPUTE;
1983
1984 if (should_shaderdb) {
1985 unsigned nr_threads =
1986 (stats.work_count <= 4) ? 4 :
1987 (stats.work_count <= 8) ? 2 :
1988 1;
1989
1990 pandecode_log_cont("shader%d - MESA_SHADER_%s shader: "
1991 "%u inst, %u bundles, %u quadwords, "
1992 "%u registers, %u threads, 0 loops, 0:0 spills:fills\n\n\n",
1993 shader_id++,
1994 shader_type_for_job(type),
1995 stats.instruction_count, stats.bundle_count, stats.quadword_count,
1996 stats.work_count, nr_threads);
1997 }
1998
1999
2000 return stats;
2001 }
2002
2003 static void
2004 pandecode_texture_payload(mali_ptr payload,
2005 enum mali_texture_dimension dim,
2006 enum mali_texture_layout layout,
2007 bool manual_stride,
2008 uint8_t levels,
2009 uint16_t depth,
2010 uint16_t array_size,
2011 struct pandecode_mapped_memory *tmem)
2012 {
2013 pandecode_log(".payload = {\n");
2014 pandecode_indent++;
2015
2016 /* A bunch of bitmap pointers follow.
2017 * We work out the correct number,
2018 * based on the mipmap/cubemap
2019 * properties, but dump extra
2020 * possibilities to futureproof */
2021
2022 int bitmap_count = levels + 1;
2023
2024 /* Miptree for each face */
2025 if (dim == MALI_TEXTURE_DIMENSION_CUBE)
2026 bitmap_count *= 6;
2027
2028 /* Array of layers */
2029 bitmap_count *= depth;
2030
2031 /* Array of textures */
2032 bitmap_count *= array_size;
2033
2034 /* Stride for each element */
2035 if (manual_stride)
2036 bitmap_count *= 2;
2037
2038 mali_ptr *pointers_and_strides = pandecode_fetch_gpu_mem(tmem,
2039 payload, sizeof(mali_ptr) * bitmap_count);
2040 for (int i = 0; i < bitmap_count; ++i) {
2041 /* How we dump depends if this is a stride or a pointer */
2042
2043 if (manual_stride && (i & 1)) {
2044 /* signed 32-bit snuck in as a 64-bit pointer */
2045 uint64_t stride_set = pointers_and_strides[i];
2046 uint32_t clamped_stride = stride_set;
2047 int32_t stride = clamped_stride;
2048 assert(stride_set == clamped_stride);
2049 pandecode_log("(mali_ptr) %d /* stride */, \n", stride);
2050 } else {
2051 char *a = pointer_as_memory_reference(pointers_and_strides[i]);
2052 pandecode_log("%s, \n", a);
2053 free(a);
2054 }
2055 }
2056
2057 pandecode_indent--;
2058 pandecode_log("},\n");
2059 }
2060
2061 static void
2062 pandecode_texture(mali_ptr u,
2063 struct pandecode_mapped_memory *tmem,
2064 unsigned job_no, unsigned tex)
2065 {
2066 struct pandecode_mapped_memory *mapped_mem = pandecode_find_mapped_gpu_mem_containing(u);
2067 const uint8_t *cl = pandecode_fetch_gpu_mem(mapped_mem, u, MALI_MIDGARD_TEXTURE_LENGTH);
2068
2069 struct MALI_MIDGARD_TEXTURE temp;
2070 MALI_MIDGARD_TEXTURE_unpack(cl, &temp);
2071 MALI_MIDGARD_TEXTURE_print(pandecode_dump_stream, &temp, 2);
2072
2073 pandecode_texture_payload(u + MALI_MIDGARD_TEXTURE_LENGTH,
2074 temp.dimension, temp.texel_ordering, temp.manual_stride,
2075 temp.levels, temp.depth, temp.array_size, mapped_mem);
2076 }
2077
2078 static void
2079 pandecode_bifrost_texture(
2080 const void *cl,
2081 unsigned job_no,
2082 unsigned tex)
2083 {
2084 struct MALI_BIFROST_TEXTURE temp;
2085 MALI_BIFROST_TEXTURE_unpack(cl, &temp);
2086 MALI_BIFROST_TEXTURE_print(pandecode_dump_stream, &temp, 2);
2087
2088 struct pandecode_mapped_memory *tmem = pandecode_find_mapped_gpu_mem_containing(temp.surfaces);
2089 pandecode_texture_payload(temp.surfaces, temp.dimension, temp.texel_ordering,
2090 true, temp.levels, 1, 1, tmem);
2091 }
2092
2093 /* For shader properties like texture_count, we have a claimed property in the shader_meta, and the actual Truth from static analysis (this may just be an upper limit). We validate accordingly */
2094
2095 static void
2096 pandecode_shader_prop(const char *name, unsigned claim, signed truth, bool fuzzy)
2097 {
2098 /* Nothing to do */
2099 if (claim == truth)
2100 return;
2101
2102 if (fuzzy && (truth < 0))
2103 pandecode_msg("XXX: fuzzy %s, claimed %d, expected %d\n", name, claim, truth);
2104
2105 if ((truth >= 0) && !fuzzy) {
2106 pandecode_msg("%s: expected %s = %d, claimed %u\n",
2107 (truth < claim) ? "warn" : "XXX",
2108 name, truth, claim);
2109 } else if ((claim > -truth) && !fuzzy) {
2110 pandecode_msg("XXX: expected %s <= %u, claimed %u\n",
2111 name, -truth, claim);
2112 } else if (fuzzy && (claim < truth))
2113 pandecode_msg("XXX: expected %s >= %u, claimed %u\n",
2114 name, truth, claim);
2115
2116 pandecode_log(".%s = %" PRId16, name, claim);
2117
2118 if (fuzzy)
2119 pandecode_log_cont(" /* %u used */", truth);
2120
2121 pandecode_log_cont(",\n");
2122 }
2123
2124 static void
2125 pandecode_blend_shader_disassemble(mali_ptr shader, int job_no, int job_type,
2126 bool is_bifrost, unsigned gpu_id)
2127 {
2128 struct midgard_disasm_stats stats =
2129 pandecode_shader_disassemble(shader, job_no, job_type, is_bifrost, gpu_id);
2130
2131 bool has_texture = (stats.texture_count > 0);
2132 bool has_sampler = (stats.sampler_count > 0);
2133 bool has_attribute = (stats.attribute_count > 0);
2134 bool has_varying = (stats.varying_count > 0);
2135 bool has_uniform = (stats.uniform_count > 0);
2136 bool has_ubo = (stats.uniform_buffer_count > 0);
2137
2138 if (has_texture || has_sampler)
2139 pandecode_msg("XXX: blend shader accessing textures\n");
2140
2141 if (has_attribute || has_varying)
2142 pandecode_msg("XXX: blend shader accessing interstage\n");
2143
2144 if (has_uniform || has_ubo)
2145 pandecode_msg("XXX: blend shader accessing uniforms\n");
2146 }
2147
2148 static void
2149 pandecode_textures(mali_ptr textures, unsigned texture_count, int job_no, bool is_bifrost)
2150 {
2151 struct pandecode_mapped_memory *mmem = pandecode_find_mapped_gpu_mem_containing(textures);
2152
2153 if (!mmem)
2154 return;
2155
2156 pandecode_log("Textures (%"PRIx64"):\n", textures);
2157
2158 if (is_bifrost) {
2159 const void *cl = pandecode_fetch_gpu_mem(mmem,
2160 textures, MALI_BIFROST_TEXTURE_LENGTH *
2161 texture_count);
2162
2163 for (unsigned tex = 0; tex < texture_count; ++tex) {
2164 pandecode_bifrost_texture(cl +
2165 MALI_BIFROST_TEXTURE_LENGTH * tex,
2166 job_no, tex);
2167 }
2168 } else {
2169 mali_ptr *PANDECODE_PTR_VAR(u, mmem, textures);
2170
2171 for (int tex = 0; tex < texture_count; ++tex) {
2172 mali_ptr *PANDECODE_PTR_VAR(u, mmem, textures + tex * sizeof(mali_ptr));
2173 char *a = pointer_as_memory_reference(*u);
2174 pandecode_log("%s,\n", a);
2175 free(a);
2176 }
2177
2178 /* Now, finally, descend down into the texture descriptor */
2179 for (unsigned tex = 0; tex < texture_count; ++tex) {
2180 mali_ptr *PANDECODE_PTR_VAR(u, mmem, textures + tex * sizeof(mali_ptr));
2181 struct pandecode_mapped_memory *tmem = pandecode_find_mapped_gpu_mem_containing(*u);
2182 if (tmem)
2183 pandecode_texture(*u, tmem, job_no, tex);
2184 }
2185 }
2186 }
2187
2188 static void
2189 pandecode_samplers(mali_ptr samplers, unsigned sampler_count, int job_no, bool is_bifrost)
2190 {
2191 for (int i = 0; i < sampler_count; ++i) {
2192 if (is_bifrost) {
2193 DUMP_ADDR("Sampler", BIFROST_SAMPLER, samplers + (MALI_BIFROST_SAMPLER_LENGTH * i), 1);
2194 } else {
2195 DUMP_ADDR("Sampler", MIDGARD_SAMPLER, samplers + (MALI_MIDGARD_SAMPLER_LENGTH * i), 1);
2196 }
2197 }
2198 }
2199
2200 static void
2201 pandecode_vertex_tiler_postfix_pre(
2202 const struct mali_vertex_tiler_postfix *p,
2203 int job_no, enum mali_job_type job_type,
2204 char *suffix, bool is_bifrost, unsigned gpu_id)
2205 {
2206 struct pandecode_mapped_memory *attr_mem;
2207
2208 /* On Bifrost, since the tiler heap (for tiler jobs) and the scratchpad
2209 * are the only things actually needed from the FBD, vertex/tiler jobs
2210 * no longer reference the FBD -- instead, this field points to some
2211 * info about the scratchpad.
2212 */
2213
2214 struct pandecode_fbd fbd_info = {
2215 /* Default for Bifrost */
2216 .rt_count = 1
2217 };
2218
2219 if (is_bifrost) {
2220 pandecode_log_cont("\t/* %X %/\n", p->shared_memory & 1);
2221 pandecode_compute_fbd(p->shared_memory & ~1, job_no);
2222 } else if (p->shared_memory & MALI_MFBD)
2223 fbd_info = pandecode_mfbd_bfr((u64) ((uintptr_t) p->shared_memory) & FBD_MASK, job_no, false, job_type == MALI_JOB_TYPE_COMPUTE, false);
2224 else if (job_type == MALI_JOB_TYPE_COMPUTE)
2225 pandecode_compute_fbd((u64) (uintptr_t) p->shared_memory, job_no);
2226 else
2227 fbd_info = pandecode_sfbd((u64) (uintptr_t) p->shared_memory, job_no, false, gpu_id);
2228
2229 int varying_count = 0, attribute_count = 0, uniform_count = 0, uniform_buffer_count = 0;
2230 int texture_count = 0, sampler_count = 0;
2231
2232 if (p->shader) {
2233 struct pandecode_mapped_memory *smem = pandecode_find_mapped_gpu_mem_containing(p->shader);
2234 struct mali_shader_meta *PANDECODE_PTR_VAR(s, smem, p->shader);
2235
2236 /* Disassemble ahead-of-time to get stats. Initialize with
2237 * stats for the missing-shader case so we get validation
2238 * there, too */
2239
2240 struct midgard_disasm_stats info = {
2241 .texture_count = 0,
2242 .sampler_count = 0,
2243 .attribute_count = 0,
2244 .varying_count = 0,
2245 .work_count = 1,
2246
2247 .uniform_count = -128,
2248 .uniform_buffer_count = 0
2249 };
2250
2251 if (s->shader & ~0xF)
2252 info = pandecode_shader_disassemble(s->shader & ~0xF, job_no, job_type, is_bifrost, gpu_id);
2253
2254 pandecode_log("struct mali_shader_meta shader_meta_%"PRIx64"_%d%s = {\n", p->shader, job_no, suffix);
2255 pandecode_indent++;
2256
2257 /* Save for dumps */
2258 attribute_count = s->attribute_count;
2259 varying_count = s->varying_count;
2260 texture_count = s->texture_count;
2261 sampler_count = s->sampler_count;
2262
2263 if (is_bifrost) {
2264 uniform_count = s->bifrost2.uniform_count;
2265 uniform_buffer_count = s->bifrost1.uniform_buffer_count;
2266 } else {
2267 uniform_count = s->midgard1.uniform_count;
2268 uniform_buffer_count = s->midgard1.uniform_buffer_count;
2269 }
2270
2271 pandecode_shader_address("shader", s->shader);
2272
2273 pandecode_shader_prop("texture_count", s->texture_count, info.texture_count, false);
2274 pandecode_shader_prop("sampler_count", s->sampler_count, info.sampler_count, false);
2275 pandecode_shader_prop("attribute_count", s->attribute_count, info.attribute_count, false);
2276 pandecode_shader_prop("varying_count", s->varying_count, info.varying_count, false);
2277 pandecode_shader_prop("uniform_buffer_count",
2278 uniform_buffer_count,
2279 info.uniform_buffer_count, true);
2280
2281 if (!is_bifrost) {
2282 pandecode_shader_prop("uniform_count",
2283 uniform_count,
2284 info.uniform_count, false);
2285
2286 pandecode_shader_prop("work_count",
2287 s->midgard1.work_count, info.work_count, false);
2288 }
2289
2290 if (is_bifrost) {
2291 pandecode_log("bifrost1.unk1 = ");
2292 pandecode_log_decoded_flags(shader_bifrost_info, s->bifrost1.unk1);
2293 pandecode_log_cont(",\n");
2294 } else {
2295 bool helpers = s->midgard1.flags_lo & MALI_HELPER_INVOCATIONS;
2296
2297 if (helpers != info.helper_invocations) {
2298 pandecode_msg("XXX: expected helpers %u but got %u\n",
2299 info.helper_invocations, helpers);
2300 }
2301
2302 pandecode_log(".midgard1.flags_lo = ");
2303 pandecode_log_decoded_flags(shader_midgard1_flag_lo_info,
2304 s->midgard1.flags_lo & ~MALI_HELPER_INVOCATIONS);
2305 pandecode_log_cont(",\n");
2306
2307 pandecode_log(".midgard1.flags_hi = ");
2308 pandecode_log_decoded_flags(shader_midgard1_flag_hi_info, s->midgard1.flags_hi);
2309 pandecode_log_cont(",\n");
2310 }
2311
2312 if (s->depth_units || s->depth_factor) {
2313 pandecode_prop("depth_factor = %f", s->depth_factor);
2314 pandecode_prop("depth_units = %f", s->depth_units);
2315 }
2316
2317 if (s->coverage_mask)
2318 pandecode_prop("coverage_mask = 0x%X", s->coverage_mask);
2319
2320 if (s->unknown2_2)
2321 pandecode_prop(".unknown2_2 = %X", s->unknown2_2);
2322
2323 if (s->unknown2_3 || s->unknown2_4) {
2324 pandecode_log(".unknown2_3 = ");
2325
2326 int unknown2_3 = s->unknown2_3;
2327 int unknown2_4 = s->unknown2_4;
2328
2329 /* We're not quite sure what these flags mean without the depth test, if anything */
2330
2331 if (unknown2_3 & (MALI_DEPTH_WRITEMASK | MALI_DEPTH_FUNC_MASK)) {
2332 const char *func = mali_func_as_str(MALI_GET_DEPTH_FUNC(unknown2_3));
2333 unknown2_3 &= ~MALI_DEPTH_FUNC_MASK;
2334
2335 pandecode_log_cont("MALI_DEPTH_FUNC(%s) | ", func);
2336 }
2337
2338 pandecode_log_decoded_flags(u3_flag_info, unknown2_3);
2339 pandecode_log_cont(",\n");
2340
2341 pandecode_log(".unknown2_4 = ");
2342 pandecode_log_decoded_flags(u4_flag_info, unknown2_4);
2343 pandecode_log_cont(",\n");
2344 }
2345
2346 if (s->stencil_mask_front || s->stencil_mask_back) {
2347 pandecode_prop("stencil_mask_front = 0x%02X", s->stencil_mask_front);
2348 pandecode_prop("stencil_mask_back = 0x%02X", s->stencil_mask_back);
2349 }
2350
2351 DUMP_CL("Stencil front", STENCIL, &s->stencil_front, 1);
2352 DUMP_CL("Stencil back", STENCIL, &s->stencil_back, 1);
2353
2354 if (is_bifrost) {
2355 pandecode_log(".bifrost2 = {\n");
2356 pandecode_indent++;
2357
2358 pandecode_prop("unk3 = 0x%" PRIx32, s->bifrost2.unk3);
2359 pandecode_prop("preload_regs = 0x%" PRIx32, s->bifrost2.preload_regs);
2360 pandecode_prop("uniform_count = %" PRId32, s->bifrost2.uniform_count);
2361 pandecode_prop("unk4 = 0x%" PRIx32, s->bifrost2.unk4);
2362
2363 pandecode_indent--;
2364 pandecode_log("},\n");
2365 } else if (s->midgard2.unknown2_7) {
2366 pandecode_log(".midgard2 = {\n");
2367 pandecode_indent++;
2368
2369 pandecode_prop("unknown2_7 = 0x%" PRIx32, s->midgard2.unknown2_7);
2370 pandecode_indent--;
2371 pandecode_log("},\n");
2372 }
2373
2374 if (s->padding) {
2375 pandecode_msg("XXX: shader padding tripped\n");
2376 pandecode_prop("padding = 0x%" PRIx32, s->padding);
2377 }
2378
2379 if (!is_bifrost) {
2380 /* TODO: Blend shaders routing/disasm */
2381 union midgard_blend blend = s->blend;
2382 mali_ptr shader = pandecode_midgard_blend(&blend, s->unknown2_3 & MALI_HAS_BLEND_SHADER);
2383 if (shader & ~0xF)
2384 pandecode_blend_shader_disassemble(shader, job_no, job_type, false, gpu_id);
2385 } else {
2386 pandecode_msg("mdg_blend = %" PRIx64 "\n", s->blend.shader);
2387 }
2388
2389 pandecode_indent--;
2390 pandecode_log("};\n");
2391
2392 /* MRT blend fields are used whenever MFBD is used, with
2393 * per-RT descriptors */
2394
2395 if (job_type == MALI_JOB_TYPE_TILER && (is_bifrost || p->shared_memory & MALI_MFBD)) {
2396 void* blend_base = (void *) (s + 1);
2397
2398 for (unsigned i = 0; i < fbd_info.rt_count; i++) {
2399 mali_ptr shader = 0;
2400
2401 if (is_bifrost)
2402 shader = pandecode_bifrost_blend(blend_base, job_no, i);
2403 else
2404 shader = pandecode_midgard_blend_mrt(blend_base, job_no, i);
2405
2406 if (shader & ~0xF)
2407 pandecode_blend_shader_disassemble(shader, job_no, job_type, false, gpu_id);
2408
2409 }
2410 }
2411 } else
2412 pandecode_msg("XXX: missing shader descriptor\n");
2413
2414 if (p->viewport)
2415 DUMP_ADDR("Viewport", VIEWPORT, p->viewport, 1);
2416
2417 unsigned max_attr_index = 0;
2418
2419 if (p->attribute_meta)
2420 max_attr_index = pandecode_attribute_meta(job_no, attribute_count, p, false, suffix);
2421
2422 if (p->attributes) {
2423 attr_mem = pandecode_find_mapped_gpu_mem_containing(p->attributes);
2424 pandecode_attributes(attr_mem, p->attributes, job_no, suffix, max_attr_index, false, job_type);
2425 }
2426
2427 /* Varyings are encoded like attributes but not actually sent; we just
2428 * pass a zero buffer with the right stride/size set, (or whatever)
2429 * since the GPU will write to it itself */
2430
2431 if (p->varying_meta) {
2432 varying_count = pandecode_attribute_meta(job_no, varying_count, p, true, suffix);
2433 }
2434
2435 if (p->varyings) {
2436 attr_mem = pandecode_find_mapped_gpu_mem_containing(p->varyings);
2437
2438 /* Number of descriptors depends on whether there are
2439 * non-internal varyings */
2440
2441 pandecode_attributes(attr_mem, p->varyings, job_no, suffix, varying_count, true, job_type);
2442 }
2443
2444 if (p->uniform_buffers) {
2445 if (uniform_buffer_count)
2446 pandecode_uniform_buffers(p->uniform_buffers, uniform_buffer_count, job_no);
2447 else
2448 pandecode_msg("warn: UBOs specified but not referenced\n");
2449 } else if (uniform_buffer_count)
2450 pandecode_msg("XXX: UBOs referenced but not specified\n");
2451
2452 /* We don't want to actually dump uniforms, but we do need to validate
2453 * that the counts we were given are sane */
2454
2455 if (p->uniforms) {
2456 if (uniform_count)
2457 pandecode_uniforms(p->uniforms, uniform_count);
2458 else
2459 pandecode_msg("warn: Uniforms specified but not referenced\n");
2460 } else if (uniform_count)
2461 pandecode_msg("XXX: Uniforms referenced but not specified\n");
2462
2463 if (p->textures)
2464 pandecode_textures(p->textures, texture_count, job_no, is_bifrost);
2465
2466 if (p->sampler_descriptor)
2467 pandecode_samplers(p->sampler_descriptor, sampler_count, job_no, is_bifrost);
2468 }
2469
2470 static void
2471 pandecode_gl_enables(uint32_t gl_enables, int job_type)
2472 {
2473 pandecode_log(".gl_enables = ");
2474
2475 pandecode_log_decoded_flags(gl_enable_flag_info, gl_enables);
2476
2477 pandecode_log_cont(",\n");
2478 }
2479
2480 static void
2481 pandecode_vertex_tiler_postfix(const struct mali_vertex_tiler_postfix *p, int job_no, bool is_bifrost)
2482 {
2483 if (p->shader & 0xF)
2484 pandecode_msg("warn: shader tagged %X\n", (unsigned) (p->shader & 0xF));
2485
2486 pandecode_log(".postfix = {\n");
2487 pandecode_indent++;
2488
2489 pandecode_gl_enables(p->gl_enables, MALI_JOB_TYPE_TILER);
2490 pandecode_prop("instance_shift = 0x%x", p->instance_shift);
2491 pandecode_prop("instance_odd = 0x%x", p->instance_odd);
2492
2493 if (p->zero4) {
2494 pandecode_msg("XXX: vertex only zero tripped");
2495 pandecode_prop("zero4 = 0x%" PRIx32, p->zero4);
2496 }
2497
2498 pandecode_prop("offset_start = 0x%x", p->offset_start);
2499
2500 if (p->zero5) {
2501 pandecode_msg("XXX: vertex only zero tripped");
2502 pandecode_prop("zero5 = 0x%" PRIx64, p->zero5);
2503 }
2504
2505 MEMORY_PROP(p, position_varying);
2506 MEMORY_PROP(p, occlusion_counter);
2507
2508 pandecode_indent--;
2509 pandecode_log("},\n");
2510 }
2511
2512 static void
2513 pandecode_tiler_heap_meta(mali_ptr gpu_va, int job_no)
2514 {
2515 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
2516 const struct bifrost_tiler_heap_meta *PANDECODE_PTR_VAR(h, mem, gpu_va);
2517
2518 pandecode_log("struct bifrost_tiler_heap_meta tiler_heap_meta_%"PRIx64"_%d = {\n", gpu_va, job_no);
2519 pandecode_indent++;
2520
2521 if (h->zero) {
2522 pandecode_msg("XXX: tiler heap zero tripped\n");
2523 pandecode_prop("zero = 0x%x", h->zero);
2524 }
2525
2526 pandecode_prop("heap_size = 0x%x", h->heap_size);
2527 MEMORY_PROP(h, tiler_heap_start);
2528 MEMORY_PROP(h, tiler_heap_free);
2529
2530 /* this might point to the beginning of another buffer, when it's
2531 * really the end of the tiler heap buffer, so we have to be careful
2532 * here. but for zero length, we need the same pointer.
2533 */
2534
2535 if (h->tiler_heap_end == h->tiler_heap_start) {
2536 MEMORY_PROP(h, tiler_heap_start);
2537 } else {
2538 char *a = pointer_as_memory_reference(h->tiler_heap_end - 1);
2539 pandecode_prop("tiler_heap_end = %s + 1", a);
2540 free(a);
2541 }
2542
2543 for (int i = 0; i < 10; i++) {
2544 if (h->zeros[i] != 0) {
2545 pandecode_msg("XXX: tiler heap zero %d tripped, value %x\n",
2546 i, h->zeros[i]);
2547 }
2548 }
2549
2550 if (h->unk1 != 0x1) {
2551 pandecode_msg("XXX: tiler heap unk1 tripped\n");
2552 pandecode_prop("unk1 = 0x%x", h->unk1);
2553 }
2554
2555 if (h->unk7e007e != 0x7e007e) {
2556 pandecode_msg("XXX: tiler heap unk7e007e tripped\n");
2557 pandecode_prop("unk7e007e = 0x%x", h->unk7e007e);
2558 }
2559
2560 pandecode_indent--;
2561 pandecode_log("};\n");
2562 }
2563
2564 static void
2565 pandecode_tiler_meta(mali_ptr gpu_va, int job_no)
2566 {
2567 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
2568 const struct bifrost_tiler_meta *PANDECODE_PTR_VAR(t, mem, gpu_va);
2569
2570 pandecode_tiler_heap_meta(t->tiler_heap_meta, job_no);
2571
2572 pandecode_log("struct bifrost_tiler_meta tiler_meta_%"PRIx64"_%d = {\n", gpu_va, job_no);
2573 pandecode_indent++;
2574
2575 pandecode_prop("tiler_heap_next_start = 0x%" PRIx32, t->tiler_heap_next_start);
2576 pandecode_prop("used_hierarchy_mask = 0x%" PRIx32, t->used_hierarchy_mask);
2577
2578 if (t->hierarchy_mask != 0xa &&
2579 t->hierarchy_mask != 0x14 &&
2580 t->hierarchy_mask != 0x28 &&
2581 t->hierarchy_mask != 0x50 &&
2582 t->hierarchy_mask != 0xa0)
2583 pandecode_prop("XXX: Unexpected hierarchy_mask (not 0xa, 0x14, 0x28, 0x50 or 0xa0)!");
2584
2585 pandecode_prop("hierarchy_mask = 0x%" PRIx16, t->hierarchy_mask);
2586
2587 pandecode_prop("flags = 0x%" PRIx16, t->flags);
2588
2589 pandecode_prop("width = MALI_POSITIVE(%d)", t->width + 1);
2590 pandecode_prop("height = MALI_POSITIVE(%d)", t->height + 1);
2591
2592 if (t->zero0) {
2593 pandecode_msg("XXX: tiler meta zero tripped\n");
2594 pandecode_prop("zero0 = 0x%" PRIx64, t->zero0);
2595 }
2596
2597 for (int i = 0; i < 12; i++) {
2598 if (t->zeros[i] != 0) {
2599 pandecode_msg("XXX: tiler heap zero %d tripped, value %" PRIx64 "\n",
2600 i, t->zeros[i]);
2601 }
2602 }
2603
2604 pandecode_indent--;
2605 pandecode_log("};\n");
2606 }
2607
2608 static void
2609 pandecode_primitive_size(union midgard_primitive_size u, bool constant)
2610 {
2611 if (u.pointer == 0x0)
2612 return;
2613
2614 pandecode_log(".primitive_size = {\n");
2615 pandecode_indent++;
2616
2617 if (constant) {
2618 pandecode_prop("constant = %f", u.constant);
2619 } else {
2620 MEMORY_PROP((&u), pointer);
2621 }
2622
2623 pandecode_indent--;
2624 pandecode_log("},\n");
2625 }
2626
2627 static void
2628 pandecode_tiler_only_bfr(const struct bifrost_tiler_only *t, int job_no)
2629 {
2630 pandecode_log_cont("{\n");
2631 pandecode_indent++;
2632
2633 /* TODO: gl_PointSize on Bifrost */
2634 pandecode_primitive_size(t->primitive_size, true);
2635
2636 if (t->zero1 || t->zero2 || t->zero3 || t->zero4 || t->zero5
2637 || t->zero6) {
2638 pandecode_msg("XXX: tiler only zero tripped\n");
2639 pandecode_prop("zero1 = 0x%" PRIx64, t->zero1);
2640 pandecode_prop("zero2 = 0x%" PRIx64, t->zero2);
2641 pandecode_prop("zero3 = 0x%" PRIx64, t->zero3);
2642 pandecode_prop("zero4 = 0x%" PRIx64, t->zero4);
2643 pandecode_prop("zero5 = 0x%" PRIx64, t->zero5);
2644 pandecode_prop("zero6 = 0x%" PRIx64, t->zero6);
2645 }
2646
2647 pandecode_indent--;
2648 pandecode_log("},\n");
2649 }
2650
2651 static int
2652 pandecode_vertex_job_bfr(const struct mali_job_descriptor_header *h,
2653 const struct pandecode_mapped_memory *mem,
2654 mali_ptr payload, int job_no, unsigned gpu_id)
2655 {
2656 struct bifrost_payload_vertex *PANDECODE_PTR_VAR(v, mem, payload);
2657
2658 pandecode_vertex_tiler_postfix_pre(&v->postfix, job_no, h->job_type, "", true, gpu_id);
2659
2660 pandecode_log("struct bifrost_payload_vertex payload_%"PRIx64"_%d = {\n", payload, job_no);
2661 pandecode_indent++;
2662
2663 pandecode_vertex_tiler_prefix(&v->prefix, job_no, false);
2664 pandecode_vertex_tiler_postfix(&v->postfix, job_no, true);
2665
2666 pandecode_indent--;
2667 pandecode_log("};\n");
2668
2669 return sizeof(*v);
2670 }
2671
2672 static int
2673 pandecode_tiler_job_bfr(const struct mali_job_descriptor_header *h,
2674 const struct pandecode_mapped_memory *mem,
2675 mali_ptr payload, int job_no, unsigned gpu_id)
2676 {
2677 struct bifrost_payload_tiler *PANDECODE_PTR_VAR(t, mem, payload);
2678
2679 pandecode_vertex_tiler_postfix_pre(&t->postfix, job_no, h->job_type, "", true, gpu_id);
2680 pandecode_tiler_meta(t->tiler.tiler_meta, job_no);
2681
2682 pandecode_log("struct bifrost_payload_tiler payload_%"PRIx64"_%d = {\n", payload, job_no);
2683 pandecode_indent++;
2684
2685 pandecode_vertex_tiler_prefix(&t->prefix, job_no, false);
2686
2687 pandecode_log(".tiler = ");
2688 pandecode_tiler_only_bfr(&t->tiler, job_no);
2689
2690 pandecode_vertex_tiler_postfix(&t->postfix, job_no, true);
2691
2692 pandecode_indent--;
2693 pandecode_log("};\n");
2694
2695 return sizeof(*t);
2696 }
2697
2698 static int
2699 pandecode_vertex_or_tiler_job_mdg(const struct mali_job_descriptor_header *h,
2700 const struct pandecode_mapped_memory *mem,
2701 mali_ptr payload, int job_no, unsigned gpu_id)
2702 {
2703 struct midgard_payload_vertex_tiler *PANDECODE_PTR_VAR(v, mem, payload);
2704 bool is_graphics = (h->job_type == MALI_JOB_TYPE_VERTEX) || (h->job_type == MALI_JOB_TYPE_TILER);
2705
2706 pandecode_vertex_tiler_postfix_pre(&v->postfix, job_no, h->job_type, "", false, gpu_id);
2707
2708 pandecode_log("struct midgard_payload_vertex_tiler payload_%d = {\n", job_no);
2709 pandecode_indent++;
2710
2711 pandecode_vertex_tiler_prefix(&v->prefix, job_no, is_graphics);
2712 pandecode_vertex_tiler_postfix(&v->postfix, job_no, false);
2713
2714 bool has_primitive_pointer = v->prefix.unknown_draw & MALI_DRAW_VARYING_SIZE;
2715 pandecode_primitive_size(v->primitive_size, !has_primitive_pointer);
2716
2717 pandecode_indent--;
2718 pandecode_log("};\n");
2719
2720 return sizeof(*v);
2721 }
2722
2723 static int
2724 pandecode_fragment_job(const struct pandecode_mapped_memory *mem,
2725 mali_ptr payload, int job_no,
2726 bool is_bifrost, unsigned gpu_id)
2727 {
2728 const struct mali_payload_fragment *PANDECODE_PTR_VAR(s, mem, payload);
2729
2730 bool is_mfbd = s->framebuffer & MALI_MFBD;
2731
2732 if (!is_mfbd && is_bifrost)
2733 pandecode_msg("XXX: Bifrost fragment must use MFBD\n");
2734
2735 struct pandecode_fbd info;
2736
2737 if (is_mfbd)
2738 info = pandecode_mfbd_bfr(s->framebuffer & FBD_MASK, job_no, true, false, is_bifrost);
2739 else
2740 info = pandecode_sfbd(s->framebuffer & FBD_MASK, job_no, true, gpu_id);
2741
2742 /* Compute the tag for the tagged pointer. This contains the type of
2743 * FBD (MFBD/SFBD), and in the case of an MFBD, information about which
2744 * additional structures follow the MFBD header (an extra payload or
2745 * not, as well as a count of render targets) */
2746
2747 unsigned expected_tag = is_mfbd ? MALI_MFBD : 0;
2748
2749 if (is_mfbd) {
2750 if (info.has_extra)
2751 expected_tag |= MALI_MFBD_TAG_EXTRA;
2752
2753 expected_tag |= (MALI_POSITIVE(info.rt_count) << 2);
2754 }
2755
2756 if ((s->min_tile_coord | s->max_tile_coord) & ~(MALI_X_COORD_MASK | MALI_Y_COORD_MASK)) {
2757 pandecode_msg("XXX: unexpected tile coordinate bits\n");
2758 pandecode_prop("min_tile_coord = 0x%X\n", s->min_tile_coord);
2759 pandecode_prop("max_tile_coord = 0x%X\n", s->max_tile_coord);
2760 }
2761
2762 /* Extract tile coordinates */
2763
2764 unsigned min_x = MALI_TILE_COORD_X(s->min_tile_coord) << MALI_TILE_SHIFT;
2765 unsigned min_y = MALI_TILE_COORD_Y(s->min_tile_coord) << MALI_TILE_SHIFT;
2766
2767 unsigned max_x = (MALI_TILE_COORD_X(s->max_tile_coord) + 1) << MALI_TILE_SHIFT;
2768 unsigned max_y = (MALI_TILE_COORD_Y(s->max_tile_coord) + 1) << MALI_TILE_SHIFT;
2769
2770 /* For the max, we also want the floored (rather than ceiled) version for checking */
2771
2772 unsigned max_x_f = (MALI_TILE_COORD_X(s->max_tile_coord)) << MALI_TILE_SHIFT;
2773 unsigned max_y_f = (MALI_TILE_COORD_Y(s->max_tile_coord)) << MALI_TILE_SHIFT;
2774
2775 /* Validate the coordinates are well-ordered */
2776
2777 if (min_x == max_x)
2778 pandecode_msg("XXX: empty X coordinates (%u = %u)\n", min_x, max_x);
2779 else if (min_x > max_x)
2780 pandecode_msg("XXX: misordered X coordinates (%u > %u)\n", min_x, max_x);
2781
2782 if (min_y == max_y)
2783 pandecode_msg("XXX: empty X coordinates (%u = %u)\n", min_x, max_x);
2784 else if (min_y > max_y)
2785 pandecode_msg("XXX: misordered X coordinates (%u > %u)\n", min_x, max_x);
2786
2787 /* Validate the coordinates fit inside the framebuffer. We use floor,
2788 * rather than ceil, for the max coordinates, since the tile
2789 * coordinates for something like an 800x600 framebuffer will actually
2790 * resolve to 800x608, which would otherwise trigger a Y-overflow */
2791
2792 if ((min_x > info.width) || (max_x_f > info.width))
2793 pandecode_msg("XXX: tile coordinates overflow in X direction\n");
2794
2795 if ((min_y > info.height) || (max_y_f > info.height))
2796 pandecode_msg("XXX: tile coordinates overflow in Y direction\n");
2797
2798 /* After validation, we print */
2799
2800 pandecode_log("fragment (%u, %u) ... (%u, %u)\n\n", min_x, min_y, max_x, max_y);
2801
2802 /* The FBD is a tagged pointer */
2803
2804 unsigned tag = (s->framebuffer & ~FBD_MASK);
2805
2806 if (tag != expected_tag)
2807 pandecode_msg("XXX: expected FBD tag %X but got %X\n", expected_tag, tag);
2808
2809 return sizeof(*s);
2810 }
2811
2812 /* Entrypoint to start tracing. jc_gpu_va is the GPU address for the first job
2813 * in the chain; later jobs are found by walking the chain. Bifrost is, well,
2814 * if it's bifrost or not. GPU ID is the more finegrained ID (at some point, we
2815 * might wish to combine this with the bifrost parameter) because some details
2816 * are model-specific even within a particular architecture. Minimal traces
2817 * *only* examine the job descriptors, skipping printing entirely if there is
2818 * no faults, and only descends into the payload if there are faults. This is
2819 * useful for looking for faults without the overhead of invasive traces. */
2820
2821 void
2822 pandecode_jc(mali_ptr jc_gpu_va, bool bifrost, unsigned gpu_id, bool minimal)
2823 {
2824 pandecode_dump_file_open();
2825
2826 struct mali_job_descriptor_header *h;
2827 unsigned job_descriptor_number = 0;
2828
2829 do {
2830 struct pandecode_mapped_memory *mem =
2831 pandecode_find_mapped_gpu_mem_containing(jc_gpu_va);
2832
2833 void *payload;
2834
2835 h = PANDECODE_PTR(mem, jc_gpu_va, struct mali_job_descriptor_header);
2836
2837 /* On Midgard, for 32-bit jobs except for fragment jobs, the
2838 * high 32-bits of the 64-bit pointer are reused to store
2839 * something else.
2840 */
2841 int offset = h->job_descriptor_size == MALI_JOB_32 &&
2842 h->job_type != MALI_JOB_TYPE_FRAGMENT ? 4 : 0;
2843 mali_ptr payload_ptr = jc_gpu_va + sizeof(*h) - offset;
2844
2845 payload = pandecode_fetch_gpu_mem(mem, payload_ptr, 256);
2846
2847 int job_no = job_descriptor_number++;
2848
2849 /* If the job is good to go, skip it in minimal mode */
2850 if (minimal && (h->exception_status == 0x0 || h->exception_status == 0x1))
2851 continue;
2852
2853 pandecode_log("struct mali_job_descriptor_header job_%"PRIx64"_%d = {\n", jc_gpu_va, job_no);
2854 pandecode_indent++;
2855
2856 pandecode_prop("job_type = %s", mali_job_type_as_str(h->job_type));
2857
2858 if (h->job_descriptor_size)
2859 pandecode_prop("job_descriptor_size = %d", h->job_descriptor_size);
2860
2861 if (h->exception_status && h->exception_status != 0x1)
2862 pandecode_prop("exception_status = %x (source ID: 0x%x access: %s exception: 0x%x)",
2863 h->exception_status,
2864 (h->exception_status >> 16) & 0xFFFF,
2865 pandecode_exception_access((h->exception_status >> 8) & 0x3),
2866 h->exception_status & 0xFF);
2867
2868 if (h->first_incomplete_task)
2869 pandecode_prop("first_incomplete_task = %d", h->first_incomplete_task);
2870
2871 if (h->fault_pointer)
2872 pandecode_prop("fault_pointer = 0x%" PRIx64, h->fault_pointer);
2873
2874 if (h->job_barrier)
2875 pandecode_prop("job_barrier = %d", h->job_barrier);
2876
2877 pandecode_prop("job_index = %d", h->job_index);
2878
2879 if (h->unknown_flags)
2880 pandecode_prop("unknown_flags = %d", h->unknown_flags);
2881
2882 if (h->job_dependency_index_1)
2883 pandecode_prop("job_dependency_index_1 = %d", h->job_dependency_index_1);
2884
2885 if (h->job_dependency_index_2)
2886 pandecode_prop("job_dependency_index_2 = %d", h->job_dependency_index_2);
2887
2888 pandecode_indent--;
2889 pandecode_log("};\n");
2890
2891 switch (h->job_type) {
2892 case MALI_JOB_TYPE_WRITE_VALUE: {
2893 struct mali_payload_write_value *s = payload;
2894 pandecode_log("struct mali_payload_write_value payload_%"PRIx64"_%d = {\n", payload_ptr, job_no);
2895 pandecode_indent++;
2896 MEMORY_PROP(s, address);
2897
2898 if (s->value_descriptor != MALI_WRITE_VALUE_ZERO) {
2899 pandecode_msg("XXX: unknown value descriptor\n");
2900 pandecode_prop("value_descriptor = 0x%" PRIX32, s->value_descriptor);
2901 }
2902
2903 if (s->reserved) {
2904 pandecode_msg("XXX: set value tripped\n");
2905 pandecode_prop("reserved = 0x%" PRIX32, s->reserved);
2906 }
2907
2908 pandecode_prop("immediate = 0x%" PRIX64, s->immediate);
2909 pandecode_indent--;
2910 pandecode_log("};\n");
2911
2912 break;
2913 }
2914
2915 case MALI_JOB_TYPE_TILER:
2916 case MALI_JOB_TYPE_VERTEX:
2917 case MALI_JOB_TYPE_COMPUTE:
2918 if (bifrost) {
2919 if (h->job_type == MALI_JOB_TYPE_TILER)
2920 pandecode_tiler_job_bfr(h, mem, payload_ptr, job_no, gpu_id);
2921 else
2922 pandecode_vertex_job_bfr(h, mem, payload_ptr, job_no, gpu_id);
2923 } else
2924 pandecode_vertex_or_tiler_job_mdg(h, mem, payload_ptr, job_no, gpu_id);
2925
2926 break;
2927
2928 case MALI_JOB_TYPE_FRAGMENT:
2929 pandecode_fragment_job(mem, payload_ptr, job_no, bifrost, gpu_id);
2930 break;
2931
2932 default:
2933 break;
2934 }
2935 } while ((jc_gpu_va = h->next_job));
2936
2937 pandecode_map_read_write();
2938 }