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6b2e71ae12bd67ec0cb8e6ed9b639c2d7c7c078f
[mesa.git] / src / panfrost / lib / decode.c
1 /*
2 * Copyright (C) 2017-2019 Alyssa Rosenzweig
3 * Copyright (C) 2017-2019 Connor Abbott
4 * Copyright (C) 2019 Collabora, Ltd.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 */
25
26 #include <midgard_pack.h>
27 #include <stdio.h>
28 #include <stdlib.h>
29 #include <memory.h>
30 #include <stdbool.h>
31 #include <stdarg.h>
32 #include <ctype.h>
33 #include "decode.h"
34 #include "util/macros.h"
35 #include "util/u_math.h"
36
37 #include "midgard/disassemble.h"
38 #include "bifrost/disassemble.h"
39
40 #include "pan_encoder.h"
41
42 static void pandecode_swizzle(unsigned swizzle, enum mali_format format);
43
44 #define MEMORY_PROP(obj, p) {\
45 if (obj->p) { \
46 char *a = pointer_as_memory_reference(obj->p); \
47 pandecode_prop("%s = %s", #p, a); \
48 free(a); \
49 } \
50 }
51
52 #define MEMORY_PROP_DIR(obj, p) {\
53 if (obj.p) { \
54 char *a = pointer_as_memory_reference(obj.p); \
55 pandecode_prop("%s = %s", #p, a); \
56 free(a); \
57 } \
58 }
59
60 #define DUMP_CL(title, T, cl, indent) {\
61 fprintf(pandecode_dump_stream, "%s\n", title); \
62 struct MALI_ ## T temp; \
63 MALI_ ## T ## _unpack((const uint8_t *) cl, &temp); \
64 MALI_ ## T ## _print(pandecode_dump_stream, &temp, indent * 2); \
65 }
66
67 #define MAP_ADDR(T, addr, cl) \
68 const uint8_t *cl = 0; \
69 { \
70 struct pandecode_mapped_memory *mapped_mem = pandecode_find_mapped_gpu_mem_containing(addr); \
71 cl = pandecode_fetch_gpu_mem(mapped_mem, addr, MALI_ ## T ## _LENGTH); \
72 }
73
74 #define DUMP_ADDR(title, T, addr, indent) {\
75 MAP_ADDR(T, addr, cl) \
76 DUMP_CL(title, T, cl, indent); \
77 }
78
79 FILE *pandecode_dump_stream;
80
81 /* Semantic logging type.
82 *
83 * Raw: for raw messages to be printed as is.
84 * Message: for helpful information to be commented out in replays.
85 * Property: for properties of a struct
86 *
87 * Use one of pandecode_log, pandecode_msg, or pandecode_prop as syntax sugar.
88 */
89
90 enum pandecode_log_type {
91 PANDECODE_RAW,
92 PANDECODE_MESSAGE,
93 PANDECODE_PROPERTY
94 };
95
96 #define pandecode_log(...) pandecode_log_typed(PANDECODE_RAW, __VA_ARGS__)
97 #define pandecode_msg(...) pandecode_log_typed(PANDECODE_MESSAGE, __VA_ARGS__)
98 #define pandecode_prop(...) pandecode_log_typed(PANDECODE_PROPERTY, __VA_ARGS__)
99
100 unsigned pandecode_indent = 0;
101
102 static void
103 pandecode_make_indent(void)
104 {
105 for (unsigned i = 0; i < pandecode_indent; ++i)
106 fprintf(pandecode_dump_stream, " ");
107 }
108
109 static void
110 pandecode_log_typed(enum pandecode_log_type type, const char *format, ...)
111 {
112 va_list ap;
113
114 pandecode_make_indent();
115
116 if (type == PANDECODE_MESSAGE)
117 fprintf(pandecode_dump_stream, "// ");
118 else if (type == PANDECODE_PROPERTY)
119 fprintf(pandecode_dump_stream, ".");
120
121 va_start(ap, format);
122 vfprintf(pandecode_dump_stream, format, ap);
123 va_end(ap);
124
125 if (type == PANDECODE_PROPERTY)
126 fprintf(pandecode_dump_stream, ",\n");
127 }
128
129 static void
130 pandecode_log_cont(const char *format, ...)
131 {
132 va_list ap;
133
134 va_start(ap, format);
135 vfprintf(pandecode_dump_stream, format, ap);
136 va_end(ap);
137 }
138
139 /* To check for memory safety issues, validates that the given pointer in GPU
140 * memory is valid, containing at least sz bytes. The goal is to eliminate
141 * GPU-side memory bugs (NULL pointer dereferences, buffer overflows, or buffer
142 * overruns) by statically validating pointers.
143 */
144
145 static void
146 pandecode_validate_buffer(mali_ptr addr, size_t sz)
147 {
148 if (!addr) {
149 pandecode_msg("XXX: null pointer deref");
150 return;
151 }
152
153 /* Find a BO */
154
155 struct pandecode_mapped_memory *bo =
156 pandecode_find_mapped_gpu_mem_containing(addr);
157
158 if (!bo) {
159 pandecode_msg("XXX: invalid memory dereference\n");
160 return;
161 }
162
163 /* Bounds check */
164
165 unsigned offset = addr - bo->gpu_va;
166 unsigned total = offset + sz;
167
168 if (total > bo->length) {
169 pandecode_msg("XXX: buffer overrun. "
170 "Chunk of size %zu at offset %d in buffer of size %zu. "
171 "Overrun by %zu bytes. \n",
172 sz, offset, bo->length, total - bo->length);
173 return;
174 }
175 }
176
177 struct pandecode_flag_info {
178 u64 flag;
179 const char *name;
180 };
181
182 static void
183 pandecode_log_decoded_flags(const struct pandecode_flag_info *flag_info,
184 u64 flags)
185 {
186 bool decodable_flags_found = false;
187
188 for (int i = 0; flag_info[i].name; i++) {
189 if ((flags & flag_info[i].flag) != flag_info[i].flag)
190 continue;
191
192 if (!decodable_flags_found) {
193 decodable_flags_found = true;
194 } else {
195 pandecode_log_cont(" | ");
196 }
197
198 pandecode_log_cont("%s", flag_info[i].name);
199
200 flags &= ~flag_info[i].flag;
201 }
202
203 if (decodable_flags_found) {
204 if (flags)
205 pandecode_log_cont(" | 0x%" PRIx64, flags);
206 } else {
207 pandecode_log_cont("0x%" PRIx64, flags);
208 }
209 }
210
211 #define FLAG_INFO(flag) { MALI_##flag, "MALI_" #flag }
212 static const struct pandecode_flag_info gl_enable_flag_info[] = {
213 FLAG_INFO(OCCLUSION_QUERY),
214 FLAG_INFO(OCCLUSION_PRECISE),
215 FLAG_INFO(FRONT_CCW_TOP),
216 FLAG_INFO(CULL_FACE_FRONT),
217 FLAG_INFO(CULL_FACE_BACK),
218 {}
219 };
220 #undef FLAG_INFO
221
222 #define FLAG_INFO(flag) { MALI_CLEAR_##flag, "MALI_CLEAR_" #flag }
223 static const struct pandecode_flag_info clear_flag_info[] = {
224 FLAG_INFO(FAST),
225 FLAG_INFO(SLOW),
226 FLAG_INFO(SLOW_STENCIL),
227 {}
228 };
229 #undef FLAG_INFO
230
231 #define FLAG_INFO(flag) { MALI_##flag, "MALI_" #flag }
232 static const struct pandecode_flag_info u3_flag_info[] = {
233 FLAG_INFO(HAS_MSAA),
234 FLAG_INFO(PER_SAMPLE),
235 FLAG_INFO(CAN_DISCARD),
236 FLAG_INFO(HAS_BLEND_SHADER),
237 FLAG_INFO(DEPTH_WRITEMASK),
238 FLAG_INFO(DEPTH_CLIP_NEAR),
239 FLAG_INFO(DEPTH_CLIP_FAR),
240 {}
241 };
242
243 static const struct pandecode_flag_info u4_flag_info[] = {
244 FLAG_INFO(NO_MSAA),
245 FLAG_INFO(NO_DITHER),
246 FLAG_INFO(DEPTH_RANGE_A),
247 FLAG_INFO(DEPTH_RANGE_B),
248 FLAG_INFO(STENCIL_TEST),
249 FLAG_INFO(ALPHA_TO_COVERAGE),
250 {}
251 };
252 #undef FLAG_INFO
253
254 #define FLAG_INFO(flag) { MALI_MFBD_FORMAT_##flag, "MALI_MFBD_FORMAT_" #flag }
255 static const struct pandecode_flag_info mfbd_fmt_flag_info[] = {
256 FLAG_INFO(SRGB),
257 {}
258 };
259 #undef FLAG_INFO
260
261 #define FLAG_INFO(flag) { MALI_AFBC_##flag, "MALI_AFBC_" #flag }
262 static const struct pandecode_flag_info afbc_fmt_flag_info[] = {
263 FLAG_INFO(YTR),
264 {}
265 };
266 #undef FLAG_INFO
267
268 #define FLAG_INFO(flag) { MALI_EXTRA_##flag, "MALI_EXTRA_" #flag }
269 static const struct pandecode_flag_info mfbd_extra_flag_hi_info[] = {
270 FLAG_INFO(PRESENT),
271 {}
272 };
273 #undef FLAG_INFO
274
275 #define FLAG_INFO(flag) { MALI_EXTRA_##flag, "MALI_EXTRA_" #flag }
276 static const struct pandecode_flag_info mfbd_extra_flag_lo_info[] = {
277 FLAG_INFO(ZS),
278 {}
279 };
280 #undef FLAG_INFO
281
282 #define FLAG_INFO(flag) { MALI_MFBD_##flag, "MALI_MFBD_" #flag }
283 static const struct pandecode_flag_info mfbd_flag_info [] = {
284 FLAG_INFO(DEPTH_WRITE),
285 FLAG_INFO(EXTRA),
286 {}
287 };
288 #undef FLAG_INFO
289
290 #define FLAG_INFO(flag) { MALI_SFBD_FORMAT_##flag, "MALI_SFBD_FORMAT_" #flag }
291 static const struct pandecode_flag_info sfbd_unk1_info [] = {
292 FLAG_INFO(MSAA_8),
293 FLAG_INFO(MSAA_A),
294 {}
295 };
296 #undef FLAG_INFO
297
298 #define FLAG_INFO(flag) { MALI_SFBD_FORMAT_##flag, "MALI_SFBD_FORMAT_" #flag }
299 static const struct pandecode_flag_info sfbd_unk2_info [] = {
300 FLAG_INFO(MSAA_B),
301 FLAG_INFO(SRGB),
302 {}
303 };
304 #undef FLAG_INFO
305
306 /* Midgard's tiler descriptor is embedded within the
307 * larger FBD */
308
309 static void
310 pandecode_midgard_tiler_descriptor(
311 const struct midgard_tiler_descriptor *t,
312 unsigned width,
313 unsigned height,
314 bool is_fragment,
315 bool has_hierarchy)
316 {
317 pandecode_log(".tiler = {\n");
318 pandecode_indent++;
319
320 if (t->hierarchy_mask == MALI_TILER_DISABLED)
321 pandecode_prop("hierarchy_mask = MALI_TILER_DISABLED");
322 else
323 pandecode_prop("hierarchy_mask = 0x%" PRIx16, t->hierarchy_mask);
324
325 /* We know this name from the kernel, but we never see it nonzero */
326
327 if (t->flags)
328 pandecode_msg("XXX: unexpected tiler flags 0x%" PRIx16, t->flags);
329
330 MEMORY_PROP(t, polygon_list);
331
332 /* The body is offset from the base of the polygon list */
333 //assert(t->polygon_list_body > t->polygon_list);
334 unsigned body_offset = t->polygon_list_body - t->polygon_list;
335
336 /* It needs to fit inside the reported size */
337 //assert(t->polygon_list_size >= body_offset);
338
339 /* Now that we've sanity checked, we'll try to calculate the sizes
340 * ourselves for comparison */
341
342 unsigned ref_header = panfrost_tiler_header_size(width, height, t->hierarchy_mask, has_hierarchy);
343 unsigned ref_size = panfrost_tiler_full_size(width, height, t->hierarchy_mask, has_hierarchy);
344
345 if (!((ref_header == body_offset) && (ref_size == t->polygon_list_size))) {
346 pandecode_msg("XXX: bad polygon list size (expected %d / 0x%x)\n",
347 ref_header, ref_size);
348 pandecode_prop("polygon_list_size = 0x%x", t->polygon_list_size);
349 pandecode_msg("body offset %d\n", body_offset);
350 }
351
352 /* The tiler heap has a start and end specified -- it should be
353 * identical to what we have in the BO. The exception is if tiling is
354 * disabled. */
355
356 MEMORY_PROP(t, heap_start);
357 assert(t->heap_end >= t->heap_start);
358
359 unsigned heap_size = t->heap_end - t->heap_start;
360
361 /* Tiling is enabled with a special flag */
362 unsigned hierarchy_mask = t->hierarchy_mask & MALI_HIERARCHY_MASK;
363 unsigned tiler_flags = t->hierarchy_mask ^ hierarchy_mask;
364
365 bool tiling_enabled = hierarchy_mask;
366
367 if (tiling_enabled) {
368 /* We should also have no other flags */
369 if (tiler_flags)
370 pandecode_msg("XXX: unexpected tiler %X\n", tiler_flags);
371 } else {
372 /* When tiling is disabled, we should have that flag and no others */
373
374 if (tiler_flags != MALI_TILER_DISABLED) {
375 pandecode_msg("XXX: unexpected tiler flag %X, expected MALI_TILER_DISABLED\n",
376 tiler_flags);
377 }
378
379 /* We should also have an empty heap */
380 if (heap_size) {
381 pandecode_msg("XXX: tiler heap size %d given, expected empty\n",
382 heap_size);
383 }
384
385 /* Disabled tiling is used only for clear-only jobs, which are
386 * purely FRAGMENT, so we should never see this for
387 * non-FRAGMENT descriptors. */
388
389 if (!is_fragment)
390 pandecode_msg("XXX: tiler disabled for non-FRAGMENT job\n");
391 }
392
393 /* We've never seen weights used in practice, but we know from the
394 * kernel these fields is there */
395
396 bool nonzero_weights = false;
397
398 for (unsigned w = 0; w < ARRAY_SIZE(t->weights); ++w) {
399 nonzero_weights |= t->weights[w] != 0x0;
400 }
401
402 if (nonzero_weights) {
403 pandecode_log(".weights = { ");
404
405 for (unsigned w = 0; w < ARRAY_SIZE(t->weights); ++w) {
406 pandecode_log_cont("%d, ", t->weights[w]);
407 }
408
409 pandecode_log("},");
410 }
411
412 pandecode_indent--;
413 pandecode_log("}\n");
414 }
415
416 /* TODO: The Bifrost tiler is not understood at all yet */
417
418 static void
419 pandecode_bifrost_tiler_descriptor(const struct mali_framebuffer *fb)
420 {
421 pandecode_log(".tiler = {\n");
422 pandecode_indent++;
423
424 MEMORY_PROP(fb, tiler_meta);
425
426 for (int i = 0; i < 16; i++) {
427 if (fb->zeros[i] != 0) {
428 pandecode_msg("XXX: tiler descriptor zero %d tripped, value %x\n",
429 i, fb->zeros[i]);
430 }
431 }
432
433 pandecode_log("},\n");
434
435 pandecode_indent--;
436 pandecode_log("}\n");
437
438 }
439
440 /* Information about the framebuffer passed back for
441 * additional analysis */
442
443 struct pandecode_fbd {
444 unsigned width;
445 unsigned height;
446 unsigned rt_count;
447 bool has_extra;
448 };
449
450 static void
451 pandecode_sfbd_format(struct mali_sfbd_format format)
452 {
453 pandecode_log(".format = {\n");
454 pandecode_indent++;
455
456 pandecode_log(".unk1 = ");
457 pandecode_log_decoded_flags(sfbd_unk1_info, format.unk1);
458 pandecode_log_cont(",\n");
459
460 /* TODO: Map formats so we can check swizzles and print nicely */
461 pandecode_log("swizzle");
462 pandecode_swizzle(format.swizzle, MALI_RGBA8_UNORM);
463 pandecode_log_cont(",\n");
464
465 pandecode_prop("nr_channels = MALI_POSITIVE(%d)",
466 (format.nr_channels + 1));
467
468 pandecode_log(".unk2 = ");
469 pandecode_log_decoded_flags(sfbd_unk2_info, format.unk2);
470 pandecode_log_cont(",\n");
471
472 pandecode_prop("block = %s", mali_block_format_as_str(format.block));
473
474 pandecode_prop("unk3 = 0x%" PRIx32, format.unk3);
475
476 pandecode_indent--;
477 pandecode_log("},\n");
478 }
479
480 static void
481 pandecode_shared_memory(const struct mali_shared_memory *desc, bool is_compute)
482 {
483 pandecode_prop("stack_shift = 0x%x", desc->stack_shift);
484
485 if (desc->unk0)
486 pandecode_prop("unk0 = 0x%x", desc->unk0);
487
488 if (desc->shared_workgroup_count != 0x1F) {
489 pandecode_prop("shared_workgroup_count = %d", desc->shared_workgroup_count);
490 if (!is_compute)
491 pandecode_msg("XXX: wrong workgroup count for noncompute\n");
492 }
493
494 if (desc->shared_unk1 || desc->shared_shift) {
495 pandecode_prop("shared_unk1 = %X", desc->shared_unk1);
496 pandecode_prop("shared_shift = %X", desc->shared_shift);
497
498 if (!is_compute)
499 pandecode_msg("XXX: shared memory configured in noncompute shader");
500 }
501
502 if (desc->shared_zero) {
503 pandecode_msg("XXX: shared memory zero tripped\n");
504 pandecode_prop("shared_zero = 0x%" PRIx32, desc->shared_zero);
505 }
506
507 if (desc->shared_memory && !is_compute)
508 pandecode_msg("XXX: shared memory used in noncompute shader\n");
509
510 MEMORY_PROP(desc, scratchpad);
511 MEMORY_PROP(desc, shared_memory);
512 MEMORY_PROP(desc, unknown1);
513
514 if (desc->scratchpad) {
515 struct pandecode_mapped_memory *smem =
516 pandecode_find_mapped_gpu_mem_containing(desc->scratchpad);
517
518 pandecode_msg("scratchpad size %u\n", smem->length);
519 }
520
521 }
522
523 static struct pandecode_fbd
524 pandecode_sfbd(uint64_t gpu_va, int job_no, bool is_fragment, unsigned gpu_id)
525 {
526 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
527 const struct mali_single_framebuffer *PANDECODE_PTR_VAR(s, mem, (mali_ptr) gpu_va);
528
529 struct pandecode_fbd info = {
530 .has_extra = false,
531 .rt_count = 1
532 };
533
534 pandecode_log("struct mali_single_framebuffer framebuffer_%"PRIx64"_%d = {\n", gpu_va, job_no);
535 pandecode_indent++;
536
537 pandecode_log(".shared_memory = {\n");
538 pandecode_indent++;
539 pandecode_shared_memory(&s->shared_memory, false);
540 pandecode_indent--;
541 pandecode_log("},\n");
542
543 pandecode_sfbd_format(s->format);
544
545 info.width = s->width + 1;
546 info.height = s->height + 1;
547
548 pandecode_prop("width = MALI_POSITIVE(%" PRId16 ")", info.width);
549 pandecode_prop("height = MALI_POSITIVE(%" PRId16 ")", info.height);
550
551 MEMORY_PROP(s, checksum);
552
553 if (s->checksum_stride)
554 pandecode_prop("checksum_stride = %d", s->checksum_stride);
555
556 MEMORY_PROP(s, framebuffer);
557 pandecode_prop("stride = %d", s->stride);
558
559 /* Earlier in the actual commandstream -- right before width -- but we
560 * delay to flow nicer */
561
562 pandecode_log(".clear_flags = ");
563 pandecode_log_decoded_flags(clear_flag_info, s->clear_flags);
564 pandecode_log_cont(",\n");
565
566 if (s->depth_buffer) {
567 MEMORY_PROP(s, depth_buffer);
568 pandecode_prop("depth_stride = %d", s->depth_stride);
569 }
570
571 if (s->stencil_buffer) {
572 MEMORY_PROP(s, stencil_buffer);
573 pandecode_prop("stencil_stride = %d", s->stencil_stride);
574 }
575
576 if (s->depth_stride_zero ||
577 s->stencil_stride_zero ||
578 s->zero7 || s->zero8) {
579 pandecode_msg("XXX: Depth/stencil zeros tripped\n");
580 pandecode_prop("depth_stride_zero = 0x%x",
581 s->depth_stride_zero);
582 pandecode_prop("stencil_stride_zero = 0x%x",
583 s->stencil_stride_zero);
584 pandecode_prop("zero7 = 0x%" PRIx32,
585 s->zero7);
586 pandecode_prop("zero8 = 0x%" PRIx32,
587 s->zero8);
588 }
589
590 if (s->clear_color_1 | s->clear_color_2 | s->clear_color_3 | s->clear_color_4) {
591 pandecode_prop("clear_color_1 = 0x%" PRIx32, s->clear_color_1);
592 pandecode_prop("clear_color_2 = 0x%" PRIx32, s->clear_color_2);
593 pandecode_prop("clear_color_3 = 0x%" PRIx32, s->clear_color_3);
594 pandecode_prop("clear_color_4 = 0x%" PRIx32, s->clear_color_4);
595 }
596
597 if (s->clear_depth_1 != 0 || s->clear_depth_2 != 0 || s->clear_depth_3 != 0 || s->clear_depth_4 != 0) {
598 pandecode_prop("clear_depth_1 = %f", s->clear_depth_1);
599 pandecode_prop("clear_depth_2 = %f", s->clear_depth_2);
600 pandecode_prop("clear_depth_3 = %f", s->clear_depth_3);
601 pandecode_prop("clear_depth_4 = %f", s->clear_depth_4);
602 }
603
604 if (s->clear_stencil) {
605 pandecode_prop("clear_stencil = 0x%x", s->clear_stencil);
606 }
607
608 const struct midgard_tiler_descriptor t = s->tiler;
609
610 bool has_hierarchy = !(gpu_id == 0x0720 || gpu_id == 0x0820 || gpu_id == 0x0830);
611 pandecode_midgard_tiler_descriptor(&t, s->width + 1, s->height + 1, is_fragment, has_hierarchy);
612
613 pandecode_indent--;
614 pandecode_log("};\n");
615
616 pandecode_prop("zero2 = 0x%" PRIx32, s->zero2);
617 pandecode_prop("zero4 = 0x%" PRIx32, s->zero4);
618 pandecode_prop("zero5 = 0x%" PRIx32, s->zero5);
619
620 pandecode_log_cont(".zero3 = {");
621
622 for (int i = 0; i < sizeof(s->zero3) / sizeof(s->zero3[0]); ++i)
623 pandecode_log_cont("%X, ", s->zero3[i]);
624
625 pandecode_log_cont("},\n");
626
627 pandecode_log_cont(".zero6 = {");
628
629 for (int i = 0; i < sizeof(s->zero6) / sizeof(s->zero6[0]); ++i)
630 pandecode_log_cont("%X, ", s->zero6[i]);
631
632 pandecode_log_cont("},\n");
633
634 return info;
635 }
636
637 static void
638 pandecode_compute_fbd(uint64_t gpu_va, int job_no)
639 {
640 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
641 const struct mali_shared_memory *PANDECODE_PTR_VAR(s, mem, (mali_ptr) gpu_va);
642
643 pandecode_log("struct mali_shared_memory shared_%"PRIx64"_%d = {\n", gpu_va, job_no);
644 pandecode_indent++;
645 pandecode_shared_memory(s, true);
646 pandecode_indent--;
647 pandecode_log("},\n");
648 }
649
650 /* Extracts the number of components associated with a Mali format */
651
652 static unsigned
653 pandecode_format_component_count(enum mali_format fmt)
654 {
655 /* Mask out the format class */
656 unsigned top = fmt & 0b11100000;
657
658 switch (top) {
659 case MALI_FORMAT_SNORM:
660 case MALI_FORMAT_UINT:
661 case MALI_FORMAT_UNORM:
662 case MALI_FORMAT_SINT:
663 return ((fmt >> 3) & 3) + 1;
664 default:
665 /* TODO: Validate */
666 return 4;
667 }
668 }
669
670 /* Extracts a mask of accessed components from a 12-bit Mali swizzle */
671
672 static unsigned
673 pandecode_access_mask_from_channel_swizzle(unsigned swizzle)
674 {
675 unsigned mask = 0;
676 assert(MALI_CHANNEL_R == 0);
677
678 for (unsigned c = 0; c < 4; ++c) {
679 enum mali_channel chan = (swizzle >> (3*c)) & 0x7;
680
681 if (chan <= MALI_CHANNEL_A)
682 mask |= (1 << chan);
683 }
684
685 return mask;
686 }
687
688 /* Validates that a (format, swizzle) pair is valid, in the sense that the
689 * swizzle doesn't access any components that are undefined in the format.
690 * Returns whether the swizzle is trivial (doesn't do any swizzling) and can be
691 * omitted */
692
693 static bool
694 pandecode_validate_format_swizzle(enum mali_format fmt, unsigned swizzle)
695 {
696 unsigned nr_comp = pandecode_format_component_count(fmt);
697 unsigned access_mask = pandecode_access_mask_from_channel_swizzle(swizzle);
698 unsigned valid_mask = (1 << nr_comp) - 1;
699 unsigned invalid_mask = ~valid_mask;
700
701 if (access_mask & invalid_mask) {
702 pandecode_msg("XXX: invalid components accessed\n");
703 return false;
704 }
705
706 /* Check for the default non-swizzling swizzle so we can suppress
707 * useless printing for the defaults */
708
709 unsigned default_swizzles[4] = {
710 MALI_CHANNEL_R | (MALI_CHANNEL_0 << 3) | (MALI_CHANNEL_0 << 6) | (MALI_CHANNEL_1 << 9),
711 MALI_CHANNEL_R | (MALI_CHANNEL_G << 3) | (MALI_CHANNEL_0 << 6) | (MALI_CHANNEL_1 << 9),
712 MALI_CHANNEL_R | (MALI_CHANNEL_G << 3) | (MALI_CHANNEL_B << 6) | (MALI_CHANNEL_1 << 9),
713 MALI_CHANNEL_R | (MALI_CHANNEL_G << 3) | (MALI_CHANNEL_B << 6) | (MALI_CHANNEL_A << 9)
714 };
715
716 return (swizzle == default_swizzles[nr_comp - 1]);
717 }
718
719 static void
720 pandecode_swizzle(unsigned swizzle, enum mali_format format)
721 {
722 /* First, do some validation */
723 bool trivial_swizzle = pandecode_validate_format_swizzle(
724 format, swizzle);
725
726 if (trivial_swizzle)
727 return;
728
729 /* Next, print the swizzle */
730 pandecode_log_cont(".");
731
732 static const char components[] = "rgba01";
733
734 for (unsigned c = 0; c < 4; ++c) {
735 enum mali_channel chan = (swizzle >> (3 * c)) & 0x7;
736
737 if (chan > MALI_CHANNEL_1) {
738 pandecode_log("XXX: invalid swizzle channel %d\n", chan);
739 continue;
740 }
741 pandecode_log_cont("%c", components[chan]);
742 }
743 }
744
745 static void
746 pandecode_rt_format(struct mali_rt_format format)
747 {
748 pandecode_log(".format = {\n");
749 pandecode_indent++;
750
751 pandecode_prop("unk1 = 0x%" PRIx32, format.unk1);
752 pandecode_prop("unk2 = 0x%" PRIx32, format.unk2);
753 pandecode_prop("unk3 = 0x%" PRIx32, format.unk3);
754 pandecode_prop("unk4 = 0x%" PRIx32, format.unk4);
755
756 pandecode_prop("block = %s", mali_block_format_as_str(format.block));
757
758 /* TODO: Map formats so we can check swizzles and print nicely */
759 pandecode_log("swizzle");
760 pandecode_swizzle(format.swizzle, MALI_RGBA8_UNORM);
761 pandecode_log_cont(",\n");
762
763 pandecode_prop("nr_channels = MALI_POSITIVE(%d)",
764 (format.nr_channels + 1));
765
766 pandecode_log(".flags = ");
767 pandecode_log_decoded_flags(mfbd_fmt_flag_info, format.flags);
768 pandecode_log_cont(",\n");
769
770 pandecode_prop("msaa = %s", mali_msaa_as_str(format.msaa));
771
772 /* In theory, the no_preload bit can be cleared to enable MFBD preload,
773 * which is a faster hardware-based alternative to the wallpaper method
774 * to preserve framebuffer contents across frames. In practice, MFBD
775 * preload is buggy on Midgard, and so this is a chicken bit. If this
776 * bit isn't set, most likely something broke unrelated to preload */
777
778 if (!format.no_preload) {
779 pandecode_msg("XXX: buggy MFBD preload enabled - chicken bit should be clear\n");
780 pandecode_prop("no_preload = 0x%" PRIx32, format.no_preload);
781 }
782
783 if (format.zero)
784 pandecode_prop("zero = 0x%" PRIx32, format.zero);
785
786 pandecode_indent--;
787 pandecode_log("},\n");
788 }
789
790 static void
791 pandecode_render_target(uint64_t gpu_va, unsigned job_no, const struct mali_framebuffer *fb)
792 {
793 pandecode_log("struct mali_render_target rts_list_%"PRIx64"_%d[] = {\n", gpu_va, job_no);
794 pandecode_indent++;
795
796 for (int i = 0; i < (fb->rt_count_1 + 1); i++) {
797 mali_ptr rt_va = gpu_va + i * sizeof(struct mali_render_target);
798 struct pandecode_mapped_memory *mem =
799 pandecode_find_mapped_gpu_mem_containing(rt_va);
800 const struct mali_render_target *PANDECODE_PTR_VAR(rt, mem, (mali_ptr) rt_va);
801
802 pandecode_log("{\n");
803 pandecode_indent++;
804
805 pandecode_rt_format(rt->format);
806
807 if (rt->format.block == MALI_BLOCK_FORMAT_AFBC) {
808 pandecode_log(".afbc = {\n");
809 pandecode_indent++;
810
811 char *a = pointer_as_memory_reference(rt->afbc.metadata);
812 pandecode_prop("metadata = %s", a);
813 free(a);
814
815 pandecode_prop("stride = %d", rt->afbc.stride);
816
817 pandecode_log(".flags = ");
818 pandecode_log_decoded_flags(afbc_fmt_flag_info, rt->afbc.flags);
819 pandecode_log_cont(",\n");
820
821 pandecode_indent--;
822 pandecode_log("},\n");
823 } else if (rt->afbc.metadata || rt->afbc.stride || rt->afbc.flags) {
824 pandecode_msg("XXX: AFBC disabled but AFBC field set (0x%lX, 0x%x, 0x%x)\n",
825 rt->afbc.metadata,
826 rt->afbc.stride,
827 rt->afbc.flags);
828 }
829
830 MEMORY_PROP(rt, framebuffer);
831 pandecode_prop("framebuffer_stride = %d", rt->framebuffer_stride);
832
833 if (rt->layer_stride)
834 pandecode_prop("layer_stride = %d", rt->layer_stride);
835
836 if (rt->clear_color_1 | rt->clear_color_2 | rt->clear_color_3 | rt->clear_color_4) {
837 pandecode_prop("clear_color_1 = 0x%" PRIx32, rt->clear_color_1);
838 pandecode_prop("clear_color_2 = 0x%" PRIx32, rt->clear_color_2);
839 pandecode_prop("clear_color_3 = 0x%" PRIx32, rt->clear_color_3);
840 pandecode_prop("clear_color_4 = 0x%" PRIx32, rt->clear_color_4);
841 }
842
843 if (rt->zero1 || rt->zero2) {
844 pandecode_msg("XXX: render target zeros tripped\n");
845 pandecode_prop("zero1 = 0x%" PRIx64, rt->zero1);
846 pandecode_prop("zero2 = 0x%" PRIx32, rt->zero2);
847 }
848
849 pandecode_indent--;
850 pandecode_log("},\n");
851 }
852
853 pandecode_indent--;
854 pandecode_log("};\n");
855 }
856
857 static struct pandecode_fbd
858 pandecode_mfbd_bfr(uint64_t gpu_va, int job_no, bool is_fragment, bool is_compute, bool is_bifrost)
859 {
860 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
861 const struct mali_framebuffer *PANDECODE_PTR_VAR(fb, mem, (mali_ptr) gpu_va);
862
863 struct pandecode_fbd info;
864
865 if (is_bifrost && fb->msaa.sample_locations) {
866 /* The blob stores all possible sample locations in a single buffer
867 * allocated on startup, and just switches the pointer when switching
868 * MSAA state. For now, we just put the data into the cmdstream, but we
869 * should do something like what the blob does with a real driver.
870 *
871 * There seem to be 32 slots for sample locations, followed by another
872 * 16. The second 16 is just the center location followed by 15 zeros
873 * in all the cases I've identified (maybe shader vs. depth/color
874 * samples?).
875 */
876
877 struct pandecode_mapped_memory *smem = pandecode_find_mapped_gpu_mem_containing(fb->msaa.sample_locations);
878
879 const u16 *PANDECODE_PTR_VAR(samples, smem, fb->msaa.sample_locations);
880
881 pandecode_log("uint16_t sample_locations_%d[] = {\n", job_no);
882 pandecode_indent++;
883
884 for (int i = 0; i < 32 + 16; i++) {
885 pandecode_log("%d, %d,\n", samples[2 * i], samples[2 * i + 1]);
886 }
887
888 pandecode_indent--;
889 pandecode_log("};\n");
890 }
891
892 pandecode_log("struct mali_framebuffer framebuffer_%"PRIx64"_%d = {\n", gpu_va, job_no);
893 pandecode_indent++;
894
895 if (is_bifrost) {
896 pandecode_log(".msaa = {\n");
897 pandecode_indent++;
898
899 if (fb->msaa.sample_locations)
900 pandecode_prop("sample_locations = sample_locations_%d", job_no);
901 else
902 pandecode_msg("XXX: sample_locations missing\n");
903
904 if (fb->msaa.zero1 || fb->msaa.zero2 || fb->msaa.zero4) {
905 pandecode_msg("XXX: multisampling zero tripped\n");
906 pandecode_prop("zero1 = %" PRIx64, fb->msaa.zero1);
907 pandecode_prop("zero2 = %" PRIx64, fb->msaa.zero2);
908 pandecode_prop("zero4 = %" PRIx64, fb->msaa.zero4);
909 }
910
911 pandecode_indent--;
912 pandecode_log("},\n");
913 } else {
914 pandecode_log(".shared_memory = {\n");
915 pandecode_indent++;
916 pandecode_shared_memory(&fb->shared_memory, is_compute);
917 pandecode_indent--;
918 pandecode_log("},\n");
919 }
920
921 info.width = fb->width1 + 1;
922 info.height = fb->height1 + 1;
923 info.rt_count = fb->rt_count_1 + 1;
924
925 pandecode_prop("width1 = MALI_POSITIVE(%d)", fb->width1 + 1);
926 pandecode_prop("height1 = MALI_POSITIVE(%d)", fb->height1 + 1);
927 pandecode_prop("width2 = MALI_POSITIVE(%d)", fb->width2 + 1);
928 pandecode_prop("height2 = MALI_POSITIVE(%d)", fb->height2 + 1);
929
930 pandecode_prop("unk1 = 0x%x", fb->unk1);
931 pandecode_prop("unk2 = 0x%x", fb->unk2);
932 pandecode_prop("rt_count_1 = MALI_POSITIVE(%d)", fb->rt_count_1 + 1);
933 pandecode_prop("rt_count_2 = %d", fb->rt_count_2);
934
935 pandecode_log(".mfbd_flags = ");
936 pandecode_log_decoded_flags(mfbd_flag_info, fb->mfbd_flags);
937 pandecode_log_cont(",\n");
938
939 if (fb->clear_stencil)
940 pandecode_prop("clear_stencil = 0x%x", fb->clear_stencil);
941
942 if (fb->clear_depth)
943 pandecode_prop("clear_depth = %f", fb->clear_depth);
944
945 if (!is_compute)
946 if (is_bifrost)
947 pandecode_bifrost_tiler_descriptor(fb);
948 else {
949 const struct midgard_tiler_descriptor t = fb->tiler;
950 pandecode_midgard_tiler_descriptor(&t, fb->width1 + 1, fb->height1 + 1, is_fragment, true);
951 }
952 else
953 pandecode_msg("XXX: skipping compute MFBD, fixme\n");
954
955 if (fb->zero3 || fb->zero4) {
956 pandecode_msg("XXX: framebuffer zeros tripped\n");
957 pandecode_prop("zero3 = 0x%" PRIx32, fb->zero3);
958 pandecode_prop("zero4 = 0x%" PRIx32, fb->zero4);
959 }
960
961 pandecode_indent--;
962 pandecode_log("};\n");
963
964 gpu_va += sizeof(struct mali_framebuffer);
965
966 info.has_extra = (fb->mfbd_flags & MALI_MFBD_EXTRA) && is_fragment;
967
968 if (info.has_extra) {
969 mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
970 const struct mali_framebuffer_extra *PANDECODE_PTR_VAR(fbx, mem, (mali_ptr) gpu_va);
971
972 pandecode_log("struct mali_framebuffer_extra fb_extra_%"PRIx64"_%d = {\n", gpu_va, job_no);
973 pandecode_indent++;
974
975 MEMORY_PROP(fbx, checksum);
976
977 if (fbx->checksum_stride)
978 pandecode_prop("checksum_stride = %d", fbx->checksum_stride);
979
980 pandecode_log(".flags_hi = ");
981 pandecode_log_decoded_flags(mfbd_extra_flag_hi_info, fbx->flags_hi);
982 pandecode_log_cont(",\n");
983
984 pandecode_log(".flags_lo = ");
985 pandecode_log_decoded_flags(mfbd_extra_flag_lo_info, fbx->flags_lo);
986 pandecode_log_cont(",\n");
987
988 pandecode_prop("zs_block = %s", mali_block_format_as_str(fbx->zs_block));
989 pandecode_prop("zs_samples = MALI_POSITIVE(%u)", fbx->zs_samples + 1);
990
991 if (fbx->zs_block == MALI_BLOCK_FORMAT_AFBC) {
992 pandecode_log(".ds_afbc = {\n");
993 pandecode_indent++;
994
995 MEMORY_PROP_DIR(fbx->ds_afbc, depth_stencil_afbc_metadata);
996 pandecode_prop("depth_stencil_afbc_stride = %d",
997 fbx->ds_afbc.depth_stencil_afbc_stride);
998 MEMORY_PROP_DIR(fbx->ds_afbc, depth_stencil);
999
1000 pandecode_log(".flags = ");
1001 pandecode_log_decoded_flags(afbc_fmt_flag_info, fbx->ds_afbc.flags);
1002 pandecode_log_cont(",\n");
1003
1004 if (fbx->ds_afbc.padding) {
1005 pandecode_msg("XXX: Depth/stencil AFBC zeros tripped\n");
1006 pandecode_prop("padding = 0x%" PRIx64, fbx->ds_afbc.padding);
1007 }
1008
1009 pandecode_indent--;
1010 pandecode_log("},\n");
1011 } else {
1012 pandecode_log(".ds_linear = {\n");
1013 pandecode_indent++;
1014
1015 if (fbx->ds_linear.depth) {
1016 MEMORY_PROP_DIR(fbx->ds_linear, depth);
1017 pandecode_prop("depth_stride = %d",
1018 fbx->ds_linear.depth_stride);
1019 pandecode_prop("depth_layer_stride = %d",
1020 fbx->ds_linear.depth_layer_stride);
1021 } else if (fbx->ds_linear.depth_stride || fbx->ds_linear.depth_layer_stride) {
1022 pandecode_msg("XXX: depth stride zero tripped %d %d\n", fbx->ds_linear.depth_stride, fbx->ds_linear.depth_layer_stride);
1023 }
1024
1025 if (fbx->ds_linear.stencil) {
1026 MEMORY_PROP_DIR(fbx->ds_linear, stencil);
1027 pandecode_prop("stencil_stride = %d",
1028 fbx->ds_linear.stencil_stride);
1029 pandecode_prop("stencil_layer_stride = %d",
1030 fbx->ds_linear.stencil_layer_stride);
1031 } else if (fbx->ds_linear.stencil_stride || fbx->ds_linear.stencil_layer_stride) {
1032 pandecode_msg("XXX: stencil stride zero tripped %d %d\n", fbx->ds_linear.stencil_stride, fbx->ds_linear.stencil_layer_stride);
1033 }
1034
1035 if (fbx->ds_linear.depth_stride_zero ||
1036 fbx->ds_linear.stencil_stride_zero) {
1037 pandecode_msg("XXX: Depth/stencil zeros tripped\n");
1038 pandecode_prop("depth_stride_zero = 0x%x",
1039 fbx->ds_linear.depth_stride_zero);
1040 pandecode_prop("stencil_stride_zero = 0x%x",
1041 fbx->ds_linear.stencil_stride_zero);
1042 }
1043
1044 pandecode_indent--;
1045 pandecode_log("},\n");
1046 }
1047
1048 if (fbx->clear_color_1 | fbx->clear_color_2) {
1049 pandecode_prop("clear_color_1 = 0x%" PRIx32, fbx->clear_color_1);
1050 pandecode_prop("clear_color_2 = 0x%" PRIx32, fbx->clear_color_2);
1051 }
1052
1053 if (fbx->zero3) {
1054 pandecode_msg("XXX: fb_extra zeros tripped\n");
1055 pandecode_prop("zero3 = 0x%" PRIx64, fbx->zero3);
1056 }
1057
1058 pandecode_indent--;
1059 pandecode_log("};\n");
1060
1061 gpu_va += sizeof(struct mali_framebuffer_extra);
1062 }
1063
1064 if (is_fragment)
1065 pandecode_render_target(gpu_va, job_no, fb);
1066
1067 return info;
1068 }
1069
1070 static void
1071 pandecode_attributes(const struct pandecode_mapped_memory *mem,
1072 mali_ptr addr, int job_no, char *suffix,
1073 int count, bool varying, enum mali_job_type job_type)
1074 {
1075 char *prefix = varying ? "Varying" : "Attribute";
1076 assert(addr);
1077
1078 if (!count) {
1079 pandecode_msg("warn: No %s records\n", prefix);
1080 return;
1081 }
1082
1083 MAP_ADDR(ATTRIBUTE_BUFFER, addr, cl);
1084
1085 for (int i = 0; i < count; ++i) {
1086 fprintf(pandecode_dump_stream, "%s\n", prefix);
1087
1088 struct MALI_ATTRIBUTE_BUFFER temp;
1089 MALI_ATTRIBUTE_BUFFER_unpack(cl + i * MALI_ATTRIBUTE_BUFFER_LENGTH, &temp);
1090 MALI_ATTRIBUTE_BUFFER_print(pandecode_dump_stream, &temp, 2);
1091
1092 if (temp.type == MALI_ATTRIBUTE_TYPE_1D_NPOT_DIVISOR) {
1093 struct MALI_ATTRIBUTE_BUFFER_CONTINUATION_NPOT temp2;
1094 MALI_ATTRIBUTE_BUFFER_CONTINUATION_NPOT_unpack(cl + (i + 1) * MALI_ATTRIBUTE_BUFFER_LENGTH, &temp2);
1095 MALI_ATTRIBUTE_BUFFER_CONTINUATION_NPOT_print(pandecode_dump_stream, &temp2, 2);
1096 }
1097 }
1098 }
1099
1100 static mali_ptr
1101 pandecode_shader_address(const char *name, mali_ptr ptr)
1102 {
1103 /* TODO: Decode flags */
1104 mali_ptr shader_ptr = ptr & ~15;
1105
1106 char *a = pointer_as_memory_reference(shader_ptr);
1107 pandecode_prop("%s = (%s) | %d", name, a, (int) (ptr & 15));
1108 free(a);
1109
1110 return shader_ptr;
1111 }
1112
1113 /* Decodes a Bifrost blend constant. See the notes in bifrost_blend_rt */
1114
1115 static unsigned
1116 decode_bifrost_constant(u16 constant)
1117 {
1118 float lo = (float) (constant & 0xFF);
1119 float hi = (float) (constant >> 8);
1120
1121 return (hi / 255.0) + (lo / 65535.0);
1122 }
1123
1124 static mali_ptr
1125 pandecode_bifrost_blend(void *descs, int job_no, int rt_no)
1126 {
1127 struct bifrost_blend_rt *b =
1128 ((struct bifrost_blend_rt *) descs) + rt_no;
1129
1130 pandecode_log("struct bifrost_blend_rt blend_rt_%d_%d = {\n", job_no, rt_no);
1131 pandecode_indent++;
1132
1133 pandecode_prop("flags = 0x%" PRIx16, b->flags);
1134 pandecode_prop("constant = 0x%" PRIx8 " /* %f */",
1135 b->constant, decode_bifrost_constant(b->constant));
1136
1137 /* TODO figure out blend shader enable bit */
1138 DUMP_CL("Equation", BLEND_EQUATION, &b->equation, 2);
1139
1140 pandecode_prop("unk2 = 0x%" PRIx16, b->unk2);
1141 pandecode_prop("index = 0x%" PRIx16, b->index);
1142
1143 pandecode_log(".format = %s", mali_format_as_str(b->format));
1144 pandecode_swizzle(b->swizzle, b->format);
1145 pandecode_log_cont(",\n");
1146
1147 pandecode_prop("swizzle = 0x%" PRIx32, b->swizzle);
1148 pandecode_prop("format = 0x%" PRIx32, b->format);
1149
1150 if (b->zero1) {
1151 pandecode_msg("XXX: pandecode_bifrost_blend zero1 tripped\n");
1152 pandecode_prop("zero1 = 0x%" PRIx32, b->zero1);
1153 }
1154
1155 pandecode_log(".shader_type = ");
1156 switch(b->shader_type) {
1157 case BIFROST_BLEND_F16:
1158 pandecode_log_cont("BIFROST_BLEND_F16");
1159 break;
1160 case BIFROST_BLEND_F32:
1161 pandecode_log_cont("BIFROST_BLEND_F32");
1162 break;
1163 case BIFROST_BLEND_I32:
1164 pandecode_log_cont("BIFROST_BLEND_I32");
1165 break;
1166 case BIFROST_BLEND_U32:
1167 pandecode_log_cont("BIFROST_BLEND_U32");
1168 break;
1169 case BIFROST_BLEND_I16:
1170 pandecode_log_cont("BIFROST_BLEND_I16");
1171 break;
1172 case BIFROST_BLEND_U16:
1173 pandecode_log_cont("BIFROST_BLEND_U16");
1174 break;
1175 }
1176 pandecode_log_cont(",\n");
1177
1178 if (b->zero2) {
1179 pandecode_msg("XXX: pandecode_bifrost_blend zero2 tripped\n");
1180 pandecode_prop("zero2 = 0x%" PRIx32, b->zero2);
1181 }
1182
1183 pandecode_prop("shader = 0x%" PRIx32, b->shader);
1184
1185 pandecode_indent--;
1186 pandecode_log("},\n");
1187
1188 return 0;
1189 }
1190
1191 static mali_ptr
1192 pandecode_midgard_blend(union midgard_blend *blend, bool is_shader)
1193 {
1194 /* constant/equation is in a union */
1195 if (!blend->shader)
1196 return 0;
1197
1198 pandecode_log(".blend = {\n");
1199 pandecode_indent++;
1200
1201 if (is_shader) {
1202 pandecode_shader_address("shader", blend->shader);
1203 } else {
1204 DUMP_CL("Equation", BLEND_EQUATION, &blend->equation, 2);
1205 pandecode_prop("constant = %f", blend->constant);
1206 }
1207
1208 pandecode_indent--;
1209 pandecode_log("},\n");
1210
1211 /* Return blend shader to disassemble if present */
1212 return is_shader ? (blend->shader & ~0xF) : 0;
1213 }
1214
1215 static mali_ptr
1216 pandecode_midgard_blend_mrt(void *descs, int job_no, int rt_no)
1217 {
1218 struct midgard_blend_rt *b =
1219 ((struct midgard_blend_rt *) descs) + rt_no;
1220
1221 /* Flags determine presence of blend shader */
1222 bool is_shader = b->flags.opaque[0] & 0x2;
1223
1224 pandecode_log("struct midgard_blend_rt blend_rt_%d_%d = {\n", job_no, rt_no);
1225 pandecode_indent++;
1226
1227 DUMP_CL("Flags", BLEND_FLAGS, &b->flags, 2);
1228
1229 union midgard_blend blend = b->blend;
1230 mali_ptr shader = pandecode_midgard_blend(&blend, is_shader);
1231
1232 pandecode_indent--;
1233 pandecode_log("};\n");
1234
1235 return shader;
1236 }
1237
1238 /* Attributes and varyings have descriptor records, which contain information
1239 * about their format and ordering with the attribute/varying buffers. We'll
1240 * want to validate that the combinations specified are self-consistent.
1241 */
1242
1243 static int
1244 pandecode_attribute_meta(int job_no, int count, const struct mali_vertex_tiler_postfix *v, bool varying, char *suffix)
1245 {
1246 const char *prefix = varying ? "Varying" : "Attribute";
1247 mali_ptr p = varying ? v->varying_meta : v->attribute_meta;
1248
1249 for (int i = 0; i < count; ++i, p += MALI_ATTRIBUTE_LENGTH)
1250 DUMP_ADDR(prefix, ATTRIBUTE, p, 1);
1251
1252 return count;
1253 }
1254
1255 /* return bits [lo, hi) of word */
1256 static u32
1257 bits(u32 word, u32 lo, u32 hi)
1258 {
1259 if (hi - lo >= 32)
1260 return word; // avoid undefined behavior with the shift
1261
1262 return (word >> lo) & ((1 << (hi - lo)) - 1);
1263 }
1264
1265 static void
1266 pandecode_vertex_tiler_prefix(struct mali_vertex_tiler_prefix *p, int job_no, bool graphics)
1267 {
1268 pandecode_log(".prefix = {\n");
1269 pandecode_indent++;
1270
1271 /* Decode invocation_count. See the comment before the definition of
1272 * invocation_count for an explanation.
1273 */
1274
1275 unsigned size_y_shift = bits(p->invocation_shifts, 0, 5);
1276 unsigned size_z_shift = bits(p->invocation_shifts, 5, 10);
1277 unsigned workgroups_x_shift = bits(p->invocation_shifts, 10, 16);
1278 unsigned workgroups_y_shift = bits(p->invocation_shifts, 16, 22);
1279 unsigned workgroups_z_shift = bits(p->invocation_shifts, 22, 28);
1280 unsigned workgroups_x_shift_2 = bits(p->invocation_shifts, 28, 32);
1281
1282 unsigned size_x = bits(p->invocation_count, 0, size_y_shift) + 1;
1283 unsigned size_y = bits(p->invocation_count, size_y_shift, size_z_shift) + 1;
1284 unsigned size_z = bits(p->invocation_count, size_z_shift, workgroups_x_shift) + 1;
1285
1286 unsigned groups_x = bits(p->invocation_count, workgroups_x_shift, workgroups_y_shift) + 1;
1287 unsigned groups_y = bits(p->invocation_count, workgroups_y_shift, workgroups_z_shift) + 1;
1288 unsigned groups_z = bits(p->invocation_count, workgroups_z_shift, 32) + 1;
1289
1290 /* Even though we have this decoded, we want to ensure that the
1291 * representation is "unique" so we don't lose anything by printing only
1292 * the final result. More specifically, we need to check that we were
1293 * passed something in canonical form, since the definition per the
1294 * hardware is inherently not unique. How? Well, take the resulting
1295 * decode and pack it ourselves! If it is bit exact with what we
1296 * decoded, we're good to go. */
1297
1298 struct mali_vertex_tiler_prefix ref;
1299 panfrost_pack_work_groups_compute(&ref, groups_x, groups_y, groups_z, size_x, size_y, size_z, graphics);
1300
1301 bool canonical =
1302 (p->invocation_count == ref.invocation_count) &&
1303 (p->invocation_shifts == ref.invocation_shifts);
1304
1305 if (!canonical) {
1306 pandecode_msg("XXX: non-canonical workgroups packing\n");
1307 pandecode_msg("expected: %X, %X",
1308 ref.invocation_count,
1309 ref.invocation_shifts);
1310
1311 pandecode_prop("invocation_count = 0x%" PRIx32, p->invocation_count);
1312 pandecode_prop("size_y_shift = %d", size_y_shift);
1313 pandecode_prop("size_z_shift = %d", size_z_shift);
1314 pandecode_prop("workgroups_x_shift = %d", workgroups_x_shift);
1315 pandecode_prop("workgroups_y_shift = %d", workgroups_y_shift);
1316 pandecode_prop("workgroups_z_shift = %d", workgroups_z_shift);
1317 pandecode_prop("workgroups_x_shift_2 = %d", workgroups_x_shift_2);
1318 }
1319
1320 /* Regardless, print the decode */
1321 pandecode_msg("size (%d, %d, %d), count (%d, %d, %d)\n",
1322 size_x, size_y, size_z,
1323 groups_x, groups_y, groups_z);
1324
1325 /* TODO: Decode */
1326 if (p->unknown_draw)
1327 pandecode_prop("unknown_draw = 0x%" PRIx32, p->unknown_draw);
1328
1329 pandecode_prop("workgroups_x_shift_3 = 0x%" PRIx32, p->workgroups_x_shift_3);
1330
1331 if (p->draw_mode != MALI_DRAW_MODE_NONE)
1332 pandecode_prop("draw_mode = %s", mali_draw_mode_as_str(p->draw_mode));
1333
1334 /* Index count only exists for tiler jobs anyway */
1335
1336 if (p->index_count)
1337 pandecode_prop("index_count = MALI_POSITIVE(%" PRId32 ")", p->index_count + 1);
1338
1339
1340 unsigned index_raw_size = (p->unknown_draw & MALI_DRAW_INDEXED_SIZE);
1341 index_raw_size >>= MALI_DRAW_INDEXED_SHIFT;
1342
1343 /* Validate an index buffer is present if we need one. TODO: verify
1344 * relationship between invocation_count and index_count */
1345
1346 if (p->indices) {
1347 unsigned count = p->index_count;
1348
1349 /* Grab the size */
1350 unsigned size = (index_raw_size == 0x3) ? 4 : index_raw_size;
1351
1352 /* Ensure we got a size, and if so, validate the index buffer
1353 * is large enough to hold a full set of indices of the given
1354 * size */
1355
1356 if (!index_raw_size)
1357 pandecode_msg("XXX: index size missing\n");
1358 else
1359 pandecode_validate_buffer(p->indices, count * size);
1360 } else if (index_raw_size)
1361 pandecode_msg("XXX: unexpected index size %u\n", index_raw_size);
1362
1363 if (p->offset_bias_correction)
1364 pandecode_prop("offset_bias_correction = %d", p->offset_bias_correction);
1365
1366 /* TODO: Figure out what this is. It's not zero */
1367 pandecode_prop("zero1 = 0x%" PRIx32, p->zero1);
1368
1369 pandecode_indent--;
1370 pandecode_log("},\n");
1371 }
1372
1373 static void
1374 pandecode_uniform_buffers(mali_ptr pubufs, int ubufs_count, int job_no)
1375 {
1376 struct pandecode_mapped_memory *umem = pandecode_find_mapped_gpu_mem_containing(pubufs);
1377 uint64_t *PANDECODE_PTR_VAR(ubufs, umem, pubufs);
1378
1379 for (int i = 0; i < ubufs_count; i++) {
1380 unsigned size = (ubufs[i] & ((1 << 10) - 1)) * 16;
1381 mali_ptr addr = (ubufs[i] >> 10) << 2;
1382
1383 pandecode_validate_buffer(addr, size);
1384
1385 char *ptr = pointer_as_memory_reference(addr);
1386 pandecode_log("ubuf_%d[%u] = %s;\n", i, size, ptr);
1387 free(ptr);
1388 }
1389
1390 pandecode_log("\n");
1391 }
1392
1393 static void
1394 pandecode_uniforms(mali_ptr uniforms, unsigned uniform_count)
1395 {
1396 pandecode_validate_buffer(uniforms, uniform_count * 16);
1397
1398 char *ptr = pointer_as_memory_reference(uniforms);
1399 pandecode_log("vec4 uniforms[%u] = %s;\n", uniform_count, ptr);
1400 free(ptr);
1401 }
1402
1403 static const char *
1404 shader_type_for_job(unsigned type)
1405 {
1406 switch (type) {
1407 case MALI_JOB_TYPE_VERTEX: return "VERTEX";
1408 case MALI_JOB_TYPE_TILER: return "FRAGMENT";
1409 case MALI_JOB_TYPE_COMPUTE: return "COMPUTE";
1410 default:
1411 return "UNKNOWN";
1412 }
1413 }
1414
1415 static unsigned shader_id = 0;
1416
1417 static struct midgard_disasm_stats
1418 pandecode_shader_disassemble(mali_ptr shader_ptr, int shader_no, int type,
1419 bool is_bifrost, unsigned gpu_id)
1420 {
1421 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(shader_ptr);
1422 uint8_t *PANDECODE_PTR_VAR(code, mem, shader_ptr);
1423
1424 /* Compute maximum possible size */
1425 size_t sz = mem->length - (shader_ptr - mem->gpu_va);
1426
1427 /* Print some boilerplate to clearly denote the assembly (which doesn't
1428 * obey indentation rules), and actually do the disassembly! */
1429
1430 pandecode_log_cont("\n\n");
1431
1432 struct midgard_disasm_stats stats;
1433
1434 if (is_bifrost) {
1435 disassemble_bifrost(pandecode_dump_stream, code, sz, true);
1436
1437 /* TODO: Extend stats to Bifrost */
1438 stats.texture_count = -128;
1439 stats.sampler_count = -128;
1440 stats.attribute_count = -128;
1441 stats.varying_count = -128;
1442 stats.uniform_count = -128;
1443 stats.uniform_buffer_count = -128;
1444 stats.work_count = -128;
1445
1446 stats.instruction_count = 0;
1447 stats.bundle_count = 0;
1448 stats.quadword_count = 0;
1449 stats.helper_invocations = false;
1450 } else {
1451 stats = disassemble_midgard(pandecode_dump_stream,
1452 code, sz, gpu_id,
1453 type == MALI_JOB_TYPE_TILER ?
1454 MESA_SHADER_FRAGMENT : MESA_SHADER_VERTEX);
1455 }
1456
1457 /* Print shader-db stats. Skip COMPUTE jobs since they are used for
1458 * driver-internal purposes with the blob and interfere */
1459
1460 bool should_shaderdb = type != MALI_JOB_TYPE_COMPUTE;
1461
1462 if (should_shaderdb) {
1463 unsigned nr_threads =
1464 (stats.work_count <= 4) ? 4 :
1465 (stats.work_count <= 8) ? 2 :
1466 1;
1467
1468 pandecode_log_cont("shader%d - MESA_SHADER_%s shader: "
1469 "%u inst, %u bundles, %u quadwords, "
1470 "%u registers, %u threads, 0 loops, 0:0 spills:fills\n\n\n",
1471 shader_id++,
1472 shader_type_for_job(type),
1473 stats.instruction_count, stats.bundle_count, stats.quadword_count,
1474 stats.work_count, nr_threads);
1475 }
1476
1477
1478 return stats;
1479 }
1480
1481 static void
1482 pandecode_texture_payload(mali_ptr payload,
1483 enum mali_texture_dimension dim,
1484 enum mali_texture_layout layout,
1485 bool manual_stride,
1486 uint8_t levels,
1487 uint16_t depth,
1488 uint16_t array_size,
1489 struct pandecode_mapped_memory *tmem)
1490 {
1491 pandecode_log(".payload = {\n");
1492 pandecode_indent++;
1493
1494 /* A bunch of bitmap pointers follow.
1495 * We work out the correct number,
1496 * based on the mipmap/cubemap
1497 * properties, but dump extra
1498 * possibilities to futureproof */
1499
1500 int bitmap_count = levels + 1;
1501
1502 /* Miptree for each face */
1503 if (dim == MALI_TEXTURE_DIMENSION_CUBE)
1504 bitmap_count *= 6;
1505
1506 /* Array of layers */
1507 bitmap_count *= depth;
1508
1509 /* Array of textures */
1510 bitmap_count *= array_size;
1511
1512 /* Stride for each element */
1513 if (manual_stride)
1514 bitmap_count *= 2;
1515
1516 mali_ptr *pointers_and_strides = pandecode_fetch_gpu_mem(tmem,
1517 payload, sizeof(mali_ptr) * bitmap_count);
1518 for (int i = 0; i < bitmap_count; ++i) {
1519 /* How we dump depends if this is a stride or a pointer */
1520
1521 if (manual_stride && (i & 1)) {
1522 /* signed 32-bit snuck in as a 64-bit pointer */
1523 uint64_t stride_set = pointers_and_strides[i];
1524 uint32_t clamped_stride = stride_set;
1525 int32_t stride = clamped_stride;
1526 assert(stride_set == clamped_stride);
1527 pandecode_log("(mali_ptr) %d /* stride */, \n", stride);
1528 } else {
1529 char *a = pointer_as_memory_reference(pointers_and_strides[i]);
1530 pandecode_log("%s, \n", a);
1531 free(a);
1532 }
1533 }
1534
1535 pandecode_indent--;
1536 pandecode_log("},\n");
1537 }
1538
1539 static void
1540 pandecode_texture(mali_ptr u,
1541 struct pandecode_mapped_memory *tmem,
1542 unsigned job_no, unsigned tex)
1543 {
1544 struct pandecode_mapped_memory *mapped_mem = pandecode_find_mapped_gpu_mem_containing(u);
1545 const uint8_t *cl = pandecode_fetch_gpu_mem(mapped_mem, u, MALI_MIDGARD_TEXTURE_LENGTH);
1546
1547 struct MALI_MIDGARD_TEXTURE temp;
1548 MALI_MIDGARD_TEXTURE_unpack(cl, &temp);
1549 MALI_MIDGARD_TEXTURE_print(pandecode_dump_stream, &temp, 2);
1550
1551 pandecode_texture_payload(u + MALI_MIDGARD_TEXTURE_LENGTH,
1552 temp.dimension, temp.texel_ordering, temp.manual_stride,
1553 temp.levels, temp.depth, temp.array_size, mapped_mem);
1554 }
1555
1556 static void
1557 pandecode_bifrost_texture(
1558 const void *cl,
1559 unsigned job_no,
1560 unsigned tex)
1561 {
1562 struct MALI_BIFROST_TEXTURE temp;
1563 MALI_BIFROST_TEXTURE_unpack(cl, &temp);
1564 MALI_BIFROST_TEXTURE_print(pandecode_dump_stream, &temp, 2);
1565
1566 struct pandecode_mapped_memory *tmem = pandecode_find_mapped_gpu_mem_containing(temp.surfaces);
1567 pandecode_texture_payload(temp.surfaces, temp.dimension, temp.texel_ordering,
1568 true, temp.levels, 1, 1, tmem);
1569 }
1570
1571 /* For shader properties like texture_count, we have a claimed property in the shader_meta, and the actual Truth from static analysis (this may just be an upper limit). We validate accordingly */
1572
1573 static void
1574 pandecode_shader_prop(const char *name, unsigned claim, signed truth, bool fuzzy)
1575 {
1576 /* Nothing to do */
1577 if (claim == truth)
1578 return;
1579
1580 if (fuzzy && (truth < 0))
1581 pandecode_msg("XXX: fuzzy %s, claimed %d, expected %d\n", name, claim, truth);
1582
1583 if ((truth >= 0) && !fuzzy) {
1584 pandecode_msg("%s: expected %s = %d, claimed %u\n",
1585 (truth < claim) ? "warn" : "XXX",
1586 name, truth, claim);
1587 } else if ((claim > -truth) && !fuzzy) {
1588 pandecode_msg("XXX: expected %s <= %u, claimed %u\n",
1589 name, -truth, claim);
1590 } else if (fuzzy && (claim < truth))
1591 pandecode_msg("XXX: expected %s >= %u, claimed %u\n",
1592 name, truth, claim);
1593
1594 pandecode_log(".%s = %" PRId16, name, claim);
1595
1596 if (fuzzy)
1597 pandecode_log_cont(" /* %u used */", truth);
1598
1599 pandecode_log_cont(",\n");
1600 }
1601
1602 static void
1603 pandecode_blend_shader_disassemble(mali_ptr shader, int job_no, int job_type,
1604 bool is_bifrost, unsigned gpu_id)
1605 {
1606 struct midgard_disasm_stats stats =
1607 pandecode_shader_disassemble(shader, job_no, job_type, is_bifrost, gpu_id);
1608
1609 bool has_texture = (stats.texture_count > 0);
1610 bool has_sampler = (stats.sampler_count > 0);
1611 bool has_attribute = (stats.attribute_count > 0);
1612 bool has_varying = (stats.varying_count > 0);
1613 bool has_uniform = (stats.uniform_count > 0);
1614 bool has_ubo = (stats.uniform_buffer_count > 0);
1615
1616 if (has_texture || has_sampler)
1617 pandecode_msg("XXX: blend shader accessing textures\n");
1618
1619 if (has_attribute || has_varying)
1620 pandecode_msg("XXX: blend shader accessing interstage\n");
1621
1622 if (has_uniform || has_ubo)
1623 pandecode_msg("XXX: blend shader accessing uniforms\n");
1624 }
1625
1626 static void
1627 pandecode_textures(mali_ptr textures, unsigned texture_count, int job_no, bool is_bifrost)
1628 {
1629 struct pandecode_mapped_memory *mmem = pandecode_find_mapped_gpu_mem_containing(textures);
1630
1631 if (!mmem)
1632 return;
1633
1634 pandecode_log("Textures (%"PRIx64"):\n", textures);
1635
1636 if (is_bifrost) {
1637 const void *cl = pandecode_fetch_gpu_mem(mmem,
1638 textures, MALI_BIFROST_TEXTURE_LENGTH *
1639 texture_count);
1640
1641 for (unsigned tex = 0; tex < texture_count; ++tex) {
1642 pandecode_bifrost_texture(cl +
1643 MALI_BIFROST_TEXTURE_LENGTH * tex,
1644 job_no, tex);
1645 }
1646 } else {
1647 mali_ptr *PANDECODE_PTR_VAR(u, mmem, textures);
1648
1649 for (int tex = 0; tex < texture_count; ++tex) {
1650 mali_ptr *PANDECODE_PTR_VAR(u, mmem, textures + tex * sizeof(mali_ptr));
1651 char *a = pointer_as_memory_reference(*u);
1652 pandecode_log("%s,\n", a);
1653 free(a);
1654 }
1655
1656 /* Now, finally, descend down into the texture descriptor */
1657 for (unsigned tex = 0; tex < texture_count; ++tex) {
1658 mali_ptr *PANDECODE_PTR_VAR(u, mmem, textures + tex * sizeof(mali_ptr));
1659 struct pandecode_mapped_memory *tmem = pandecode_find_mapped_gpu_mem_containing(*u);
1660 if (tmem)
1661 pandecode_texture(*u, tmem, job_no, tex);
1662 }
1663 }
1664 }
1665
1666 static void
1667 pandecode_samplers(mali_ptr samplers, unsigned sampler_count, int job_no, bool is_bifrost)
1668 {
1669 for (int i = 0; i < sampler_count; ++i) {
1670 if (is_bifrost) {
1671 DUMP_ADDR("Sampler", BIFROST_SAMPLER, samplers + (MALI_BIFROST_SAMPLER_LENGTH * i), 1);
1672 } else {
1673 DUMP_ADDR("Sampler", MIDGARD_SAMPLER, samplers + (MALI_MIDGARD_SAMPLER_LENGTH * i), 1);
1674 }
1675 }
1676 }
1677
1678 static void
1679 pandecode_vertex_tiler_postfix_pre(
1680 const struct mali_vertex_tiler_postfix *p,
1681 int job_no, enum mali_job_type job_type,
1682 char *suffix, bool is_bifrost, unsigned gpu_id)
1683 {
1684 struct pandecode_mapped_memory *attr_mem;
1685
1686 /* On Bifrost, since the tiler heap (for tiler jobs) and the scratchpad
1687 * are the only things actually needed from the FBD, vertex/tiler jobs
1688 * no longer reference the FBD -- instead, this field points to some
1689 * info about the scratchpad.
1690 */
1691
1692 struct pandecode_fbd fbd_info = {
1693 /* Default for Bifrost */
1694 .rt_count = 1
1695 };
1696
1697 if (is_bifrost) {
1698 pandecode_log_cont("\t/* %X %/\n", p->shared_memory & 1);
1699 pandecode_compute_fbd(p->shared_memory & ~1, job_no);
1700 } else if (p->shared_memory & MALI_MFBD)
1701 fbd_info = pandecode_mfbd_bfr((u64) ((uintptr_t) p->shared_memory) & FBD_MASK, job_no, false, job_type == MALI_JOB_TYPE_COMPUTE, false);
1702 else if (job_type == MALI_JOB_TYPE_COMPUTE)
1703 pandecode_compute_fbd((u64) (uintptr_t) p->shared_memory, job_no);
1704 else
1705 fbd_info = pandecode_sfbd((u64) (uintptr_t) p->shared_memory, job_no, false, gpu_id);
1706
1707 int varying_count = 0, attribute_count = 0, uniform_count = 0, uniform_buffer_count = 0;
1708 int texture_count = 0, sampler_count = 0;
1709
1710 if (p->shader) {
1711 struct pandecode_mapped_memory *smem = pandecode_find_mapped_gpu_mem_containing(p->shader);
1712 struct mali_shader_meta *PANDECODE_PTR_VAR(s, smem, p->shader);
1713
1714 /* Disassemble ahead-of-time to get stats. Initialize with
1715 * stats for the missing-shader case so we get validation
1716 * there, too */
1717
1718 struct midgard_disasm_stats info = {
1719 .texture_count = 0,
1720 .sampler_count = 0,
1721 .attribute_count = 0,
1722 .varying_count = 0,
1723 .work_count = 1,
1724
1725 .uniform_count = -128,
1726 .uniform_buffer_count = 0
1727 };
1728
1729 if (s->shader & ~0xF)
1730 info = pandecode_shader_disassemble(s->shader & ~0xF, job_no, job_type, is_bifrost, gpu_id);
1731
1732 struct MALI_MIDGARD_PROPERTIES midg_props;
1733 struct MALI_BIFROST_PROPERTIES bi_props;
1734
1735 pandecode_log("struct mali_shader_meta shader_meta_%"PRIx64"_%d%s = {\n", p->shader, job_no, suffix);
1736 pandecode_indent++;
1737
1738 /* Save for dumps */
1739 attribute_count = s->attribute_count;
1740 varying_count = s->varying_count;
1741 texture_count = s->texture_count;
1742 sampler_count = s->sampler_count;
1743
1744 if (is_bifrost) {
1745 uint32_t opaque = s->bifrost_props.opaque[0];
1746 MALI_BIFROST_PROPERTIES_unpack((const uint8_t *) &opaque, &bi_props);
1747
1748 uniform_count = s->bifrost2.uniform_count;
1749 uniform_buffer_count = bi_props.uniform_buffer_count;
1750 } else {
1751 uint32_t opaque = s->midgard_props.opaque[0];
1752 MALI_MIDGARD_PROPERTIES_unpack((const uint8_t *) &opaque, &midg_props);
1753
1754 uniform_count = midg_props.uniform_count;
1755 uniform_buffer_count = midg_props.uniform_buffer_count;
1756 }
1757
1758 pandecode_shader_address("shader", s->shader);
1759
1760 pandecode_shader_prop("texture_count", s->texture_count, info.texture_count, false);
1761 pandecode_shader_prop("sampler_count", s->sampler_count, info.sampler_count, false);
1762 pandecode_shader_prop("attribute_count", s->attribute_count, info.attribute_count, false);
1763 pandecode_shader_prop("varying_count", s->varying_count, info.varying_count, false);
1764
1765 if (is_bifrost)
1766 MALI_BIFROST_PROPERTIES_print(pandecode_dump_stream, &bi_props, 2);
1767 else
1768 MALI_MIDGARD_PROPERTIES_print(pandecode_dump_stream, &midg_props, 2);
1769
1770 if (s->depth_units || s->depth_factor) {
1771 pandecode_prop("depth_factor = %f", s->depth_factor);
1772 pandecode_prop("depth_units = %f", s->depth_units);
1773 }
1774
1775 if (s->coverage_mask)
1776 pandecode_prop("coverage_mask = 0x%X", s->coverage_mask);
1777
1778 if (s->unknown2_2)
1779 pandecode_prop(".unknown2_2 = %X", s->unknown2_2);
1780
1781 if (s->unknown2_3 || s->unknown2_4) {
1782 pandecode_log(".unknown2_3 = ");
1783
1784 int unknown2_3 = s->unknown2_3;
1785 int unknown2_4 = s->unknown2_4;
1786
1787 /* We're not quite sure what these flags mean without the depth test, if anything */
1788
1789 if (unknown2_3 & (MALI_DEPTH_WRITEMASK | MALI_DEPTH_FUNC_MASK)) {
1790 const char *func = mali_func_as_str(MALI_GET_DEPTH_FUNC(unknown2_3));
1791 unknown2_3 &= ~MALI_DEPTH_FUNC_MASK;
1792
1793 pandecode_log_cont("MALI_DEPTH_FUNC(%s) | ", func);
1794 }
1795
1796 pandecode_log_decoded_flags(u3_flag_info, unknown2_3);
1797 pandecode_log_cont(",\n");
1798
1799 pandecode_log(".unknown2_4 = ");
1800 pandecode_log_decoded_flags(u4_flag_info, unknown2_4);
1801 pandecode_log_cont(",\n");
1802 }
1803
1804 if (s->stencil_mask_front || s->stencil_mask_back) {
1805 pandecode_prop("stencil_mask_front = 0x%02X", s->stencil_mask_front);
1806 pandecode_prop("stencil_mask_back = 0x%02X", s->stencil_mask_back);
1807 }
1808
1809 DUMP_CL("Stencil front", STENCIL, &s->stencil_front, 1);
1810 DUMP_CL("Stencil back", STENCIL, &s->stencil_back, 1);
1811
1812 if (is_bifrost) {
1813 pandecode_log(".bifrost2 = {\n");
1814 pandecode_indent++;
1815
1816 pandecode_prop("unk3 = 0x%" PRIx32, s->bifrost2.unk3);
1817 pandecode_prop("preload_regs = 0x%" PRIx32, s->bifrost2.preload_regs);
1818 pandecode_prop("uniform_count = %" PRId32, s->bifrost2.uniform_count);
1819 pandecode_prop("unk4 = 0x%" PRIx32, s->bifrost2.unk4);
1820
1821 pandecode_indent--;
1822 pandecode_log("},\n");
1823 } else if (s->midgard2.unknown2_7) {
1824 pandecode_log(".midgard2 = {\n");
1825 pandecode_indent++;
1826
1827 pandecode_prop("unknown2_7 = 0x%" PRIx32, s->midgard2.unknown2_7);
1828 pandecode_indent--;
1829 pandecode_log("},\n");
1830 }
1831
1832 if (s->padding) {
1833 pandecode_msg("XXX: shader padding tripped\n");
1834 pandecode_prop("padding = 0x%" PRIx32, s->padding);
1835 }
1836
1837 if (!is_bifrost) {
1838 /* TODO: Blend shaders routing/disasm */
1839 union midgard_blend blend = s->blend;
1840 mali_ptr shader = pandecode_midgard_blend(&blend, s->unknown2_3 & MALI_HAS_BLEND_SHADER);
1841 if (shader & ~0xF)
1842 pandecode_blend_shader_disassemble(shader, job_no, job_type, false, gpu_id);
1843 } else {
1844 pandecode_msg("mdg_blend = %" PRIx64 "\n", s->blend.shader);
1845 }
1846
1847 pandecode_indent--;
1848 pandecode_log("};\n");
1849
1850 /* MRT blend fields are used whenever MFBD is used, with
1851 * per-RT descriptors */
1852
1853 if (job_type == MALI_JOB_TYPE_TILER && (is_bifrost || p->shared_memory & MALI_MFBD)) {
1854 void* blend_base = (void *) (s + 1);
1855
1856 for (unsigned i = 0; i < fbd_info.rt_count; i++) {
1857 mali_ptr shader = 0;
1858
1859 if (is_bifrost)
1860 shader = pandecode_bifrost_blend(blend_base, job_no, i);
1861 else
1862 shader = pandecode_midgard_blend_mrt(blend_base, job_no, i);
1863
1864 if (shader & ~0xF)
1865 pandecode_blend_shader_disassemble(shader, job_no, job_type, false, gpu_id);
1866
1867 }
1868 }
1869 } else
1870 pandecode_msg("XXX: missing shader descriptor\n");
1871
1872 if (p->viewport)
1873 DUMP_ADDR("Viewport", VIEWPORT, p->viewport, 1);
1874
1875 unsigned max_attr_index = 0;
1876
1877 if (p->attribute_meta)
1878 max_attr_index = pandecode_attribute_meta(job_no, attribute_count, p, false, suffix);
1879
1880 if (p->attributes) {
1881 attr_mem = pandecode_find_mapped_gpu_mem_containing(p->attributes);
1882 pandecode_attributes(attr_mem, p->attributes, job_no, suffix, max_attr_index, false, job_type);
1883 }
1884
1885 /* Varyings are encoded like attributes but not actually sent; we just
1886 * pass a zero buffer with the right stride/size set, (or whatever)
1887 * since the GPU will write to it itself */
1888
1889 if (p->varying_meta) {
1890 varying_count = pandecode_attribute_meta(job_no, varying_count, p, true, suffix);
1891 }
1892
1893 if (p->varyings) {
1894 attr_mem = pandecode_find_mapped_gpu_mem_containing(p->varyings);
1895
1896 /* Number of descriptors depends on whether there are
1897 * non-internal varyings */
1898
1899 pandecode_attributes(attr_mem, p->varyings, job_no, suffix, varying_count, true, job_type);
1900 }
1901
1902 if (p->uniform_buffers) {
1903 if (uniform_buffer_count)
1904 pandecode_uniform_buffers(p->uniform_buffers, uniform_buffer_count, job_no);
1905 else
1906 pandecode_msg("warn: UBOs specified but not referenced\n");
1907 } else if (uniform_buffer_count)
1908 pandecode_msg("XXX: UBOs referenced but not specified\n");
1909
1910 /* We don't want to actually dump uniforms, but we do need to validate
1911 * that the counts we were given are sane */
1912
1913 if (p->uniforms) {
1914 if (uniform_count)
1915 pandecode_uniforms(p->uniforms, uniform_count);
1916 else
1917 pandecode_msg("warn: Uniforms specified but not referenced\n");
1918 } else if (uniform_count)
1919 pandecode_msg("XXX: Uniforms referenced but not specified\n");
1920
1921 if (p->textures)
1922 pandecode_textures(p->textures, texture_count, job_no, is_bifrost);
1923
1924 if (p->sampler_descriptor)
1925 pandecode_samplers(p->sampler_descriptor, sampler_count, job_no, is_bifrost);
1926 }
1927
1928 static void
1929 pandecode_gl_enables(uint32_t gl_enables, int job_type)
1930 {
1931 pandecode_log(".gl_enables = ");
1932
1933 pandecode_log_decoded_flags(gl_enable_flag_info, gl_enables);
1934
1935 pandecode_log_cont(",\n");
1936 }
1937
1938 static void
1939 pandecode_vertex_tiler_postfix(const struct mali_vertex_tiler_postfix *p, int job_no, bool is_bifrost)
1940 {
1941 if (p->shader & 0xF)
1942 pandecode_msg("warn: shader tagged %X\n", (unsigned) (p->shader & 0xF));
1943
1944 pandecode_log(".postfix = {\n");
1945 pandecode_indent++;
1946
1947 pandecode_gl_enables(p->gl_enables, MALI_JOB_TYPE_TILER);
1948 pandecode_prop("instance_shift = 0x%x", p->instance_shift);
1949 pandecode_prop("instance_odd = 0x%x", p->instance_odd);
1950
1951 if (p->zero4) {
1952 pandecode_msg("XXX: vertex only zero tripped");
1953 pandecode_prop("zero4 = 0x%" PRIx32, p->zero4);
1954 }
1955
1956 pandecode_prop("offset_start = 0x%x", p->offset_start);
1957
1958 if (p->zero5) {
1959 pandecode_msg("XXX: vertex only zero tripped");
1960 pandecode_prop("zero5 = 0x%" PRIx64, p->zero5);
1961 }
1962
1963 MEMORY_PROP(p, position_varying);
1964 MEMORY_PROP(p, occlusion_counter);
1965
1966 pandecode_indent--;
1967 pandecode_log("},\n");
1968 }
1969
1970 static void
1971 pandecode_tiler_heap_meta(mali_ptr gpu_va, int job_no)
1972 {
1973 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
1974 const struct bifrost_tiler_heap_meta *PANDECODE_PTR_VAR(h, mem, gpu_va);
1975
1976 pandecode_log("struct bifrost_tiler_heap_meta tiler_heap_meta_%"PRIx64"_%d = {\n", gpu_va, job_no);
1977 pandecode_indent++;
1978
1979 if (h->zero) {
1980 pandecode_msg("XXX: tiler heap zero tripped\n");
1981 pandecode_prop("zero = 0x%x", h->zero);
1982 }
1983
1984 pandecode_prop("heap_size = 0x%x", h->heap_size);
1985 MEMORY_PROP(h, tiler_heap_start);
1986 MEMORY_PROP(h, tiler_heap_free);
1987
1988 /* this might point to the beginning of another buffer, when it's
1989 * really the end of the tiler heap buffer, so we have to be careful
1990 * here. but for zero length, we need the same pointer.
1991 */
1992
1993 if (h->tiler_heap_end == h->tiler_heap_start) {
1994 MEMORY_PROP(h, tiler_heap_start);
1995 } else {
1996 char *a = pointer_as_memory_reference(h->tiler_heap_end - 1);
1997 pandecode_prop("tiler_heap_end = %s + 1", a);
1998 free(a);
1999 }
2000
2001 for (int i = 0; i < 10; i++) {
2002 if (h->zeros[i] != 0) {
2003 pandecode_msg("XXX: tiler heap zero %d tripped, value %x\n",
2004 i, h->zeros[i]);
2005 }
2006 }
2007
2008 if (h->unk1 != 0x1) {
2009 pandecode_msg("XXX: tiler heap unk1 tripped\n");
2010 pandecode_prop("unk1 = 0x%x", h->unk1);
2011 }
2012
2013 if (h->unk7e007e != 0x7e007e) {
2014 pandecode_msg("XXX: tiler heap unk7e007e tripped\n");
2015 pandecode_prop("unk7e007e = 0x%x", h->unk7e007e);
2016 }
2017
2018 pandecode_indent--;
2019 pandecode_log("};\n");
2020 }
2021
2022 static void
2023 pandecode_tiler_meta(mali_ptr gpu_va, int job_no)
2024 {
2025 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
2026 const struct bifrost_tiler_meta *PANDECODE_PTR_VAR(t, mem, gpu_va);
2027
2028 pandecode_tiler_heap_meta(t->tiler_heap_meta, job_no);
2029
2030 pandecode_log("struct bifrost_tiler_meta tiler_meta_%"PRIx64"_%d = {\n", gpu_va, job_no);
2031 pandecode_indent++;
2032
2033 pandecode_prop("tiler_heap_next_start = 0x%" PRIx32, t->tiler_heap_next_start);
2034 pandecode_prop("used_hierarchy_mask = 0x%" PRIx32, t->used_hierarchy_mask);
2035
2036 if (t->hierarchy_mask != 0xa &&
2037 t->hierarchy_mask != 0x14 &&
2038 t->hierarchy_mask != 0x28 &&
2039 t->hierarchy_mask != 0x50 &&
2040 t->hierarchy_mask != 0xa0)
2041 pandecode_prop("XXX: Unexpected hierarchy_mask (not 0xa, 0x14, 0x28, 0x50 or 0xa0)!");
2042
2043 pandecode_prop("hierarchy_mask = 0x%" PRIx16, t->hierarchy_mask);
2044
2045 pandecode_prop("flags = 0x%" PRIx16, t->flags);
2046
2047 pandecode_prop("width = MALI_POSITIVE(%d)", t->width + 1);
2048 pandecode_prop("height = MALI_POSITIVE(%d)", t->height + 1);
2049
2050 if (t->zero0) {
2051 pandecode_msg("XXX: tiler meta zero tripped\n");
2052 pandecode_prop("zero0 = 0x%" PRIx64, t->zero0);
2053 }
2054
2055 for (int i = 0; i < 12; i++) {
2056 if (t->zeros[i] != 0) {
2057 pandecode_msg("XXX: tiler heap zero %d tripped, value %" PRIx64 "\n",
2058 i, t->zeros[i]);
2059 }
2060 }
2061
2062 pandecode_indent--;
2063 pandecode_log("};\n");
2064 }
2065
2066 static void
2067 pandecode_primitive_size(union midgard_primitive_size u, bool constant)
2068 {
2069 if (u.pointer == 0x0)
2070 return;
2071
2072 pandecode_log(".primitive_size = {\n");
2073 pandecode_indent++;
2074
2075 if (constant) {
2076 pandecode_prop("constant = %f", u.constant);
2077 } else {
2078 MEMORY_PROP((&u), pointer);
2079 }
2080
2081 pandecode_indent--;
2082 pandecode_log("},\n");
2083 }
2084
2085 static void
2086 pandecode_tiler_only_bfr(const struct bifrost_tiler_only *t, int job_no)
2087 {
2088 pandecode_log_cont("{\n");
2089 pandecode_indent++;
2090
2091 /* TODO: gl_PointSize on Bifrost */
2092 pandecode_primitive_size(t->primitive_size, true);
2093
2094 if (t->zero1 || t->zero2 || t->zero3 || t->zero4 || t->zero5
2095 || t->zero6) {
2096 pandecode_msg("XXX: tiler only zero tripped\n");
2097 pandecode_prop("zero1 = 0x%" PRIx64, t->zero1);
2098 pandecode_prop("zero2 = 0x%" PRIx64, t->zero2);
2099 pandecode_prop("zero3 = 0x%" PRIx64, t->zero3);
2100 pandecode_prop("zero4 = 0x%" PRIx64, t->zero4);
2101 pandecode_prop("zero5 = 0x%" PRIx64, t->zero5);
2102 pandecode_prop("zero6 = 0x%" PRIx64, t->zero6);
2103 }
2104
2105 pandecode_indent--;
2106 pandecode_log("},\n");
2107 }
2108
2109 static int
2110 pandecode_vertex_job_bfr(const struct mali_job_descriptor_header *h,
2111 const struct pandecode_mapped_memory *mem,
2112 mali_ptr payload, int job_no, unsigned gpu_id)
2113 {
2114 struct bifrost_payload_vertex *PANDECODE_PTR_VAR(v, mem, payload);
2115
2116 pandecode_vertex_tiler_postfix_pre(&v->postfix, job_no, h->job_type, "", true, gpu_id);
2117
2118 pandecode_log("struct bifrost_payload_vertex payload_%"PRIx64"_%d = {\n", payload, job_no);
2119 pandecode_indent++;
2120
2121 pandecode_vertex_tiler_prefix(&v->prefix, job_no, false);
2122 pandecode_vertex_tiler_postfix(&v->postfix, job_no, true);
2123
2124 pandecode_indent--;
2125 pandecode_log("};\n");
2126
2127 return sizeof(*v);
2128 }
2129
2130 static int
2131 pandecode_tiler_job_bfr(const struct mali_job_descriptor_header *h,
2132 const struct pandecode_mapped_memory *mem,
2133 mali_ptr payload, int job_no, unsigned gpu_id)
2134 {
2135 struct bifrost_payload_tiler *PANDECODE_PTR_VAR(t, mem, payload);
2136
2137 pandecode_vertex_tiler_postfix_pre(&t->postfix, job_no, h->job_type, "", true, gpu_id);
2138 pandecode_tiler_meta(t->tiler.tiler_meta, job_no);
2139
2140 pandecode_log("struct bifrost_payload_tiler payload_%"PRIx64"_%d = {\n", payload, job_no);
2141 pandecode_indent++;
2142
2143 pandecode_vertex_tiler_prefix(&t->prefix, job_no, false);
2144
2145 pandecode_log(".tiler = ");
2146 pandecode_tiler_only_bfr(&t->tiler, job_no);
2147
2148 pandecode_vertex_tiler_postfix(&t->postfix, job_no, true);
2149
2150 pandecode_indent--;
2151 pandecode_log("};\n");
2152
2153 return sizeof(*t);
2154 }
2155
2156 static int
2157 pandecode_vertex_or_tiler_job_mdg(const struct mali_job_descriptor_header *h,
2158 const struct pandecode_mapped_memory *mem,
2159 mali_ptr payload, int job_no, unsigned gpu_id)
2160 {
2161 struct midgard_payload_vertex_tiler *PANDECODE_PTR_VAR(v, mem, payload);
2162 bool is_graphics = (h->job_type == MALI_JOB_TYPE_VERTEX) || (h->job_type == MALI_JOB_TYPE_TILER);
2163
2164 pandecode_vertex_tiler_postfix_pre(&v->postfix, job_no, h->job_type, "", false, gpu_id);
2165
2166 pandecode_log("struct midgard_payload_vertex_tiler payload_%d = {\n", job_no);
2167 pandecode_indent++;
2168
2169 pandecode_vertex_tiler_prefix(&v->prefix, job_no, is_graphics);
2170 pandecode_vertex_tiler_postfix(&v->postfix, job_no, false);
2171
2172 bool has_primitive_pointer = v->prefix.unknown_draw & MALI_DRAW_VARYING_SIZE;
2173 pandecode_primitive_size(v->primitive_size, !has_primitive_pointer);
2174
2175 pandecode_indent--;
2176 pandecode_log("};\n");
2177
2178 return sizeof(*v);
2179 }
2180
2181 static int
2182 pandecode_fragment_job(const struct pandecode_mapped_memory *mem,
2183 mali_ptr payload, int job_no,
2184 bool is_bifrost, unsigned gpu_id)
2185 {
2186 const struct mali_payload_fragment *PANDECODE_PTR_VAR(s, mem, payload);
2187
2188 bool is_mfbd = s->framebuffer & MALI_MFBD;
2189
2190 if (!is_mfbd && is_bifrost)
2191 pandecode_msg("XXX: Bifrost fragment must use MFBD\n");
2192
2193 struct pandecode_fbd info;
2194
2195 if (is_mfbd)
2196 info = pandecode_mfbd_bfr(s->framebuffer & FBD_MASK, job_no, true, false, is_bifrost);
2197 else
2198 info = pandecode_sfbd(s->framebuffer & FBD_MASK, job_no, true, gpu_id);
2199
2200 /* Compute the tag for the tagged pointer. This contains the type of
2201 * FBD (MFBD/SFBD), and in the case of an MFBD, information about which
2202 * additional structures follow the MFBD header (an extra payload or
2203 * not, as well as a count of render targets) */
2204
2205 unsigned expected_tag = is_mfbd ? MALI_MFBD : 0;
2206
2207 if (is_mfbd) {
2208 if (info.has_extra)
2209 expected_tag |= MALI_MFBD_TAG_EXTRA;
2210
2211 expected_tag |= (MALI_POSITIVE(info.rt_count) << 2);
2212 }
2213
2214 if ((s->min_tile_coord | s->max_tile_coord) & ~(MALI_X_COORD_MASK | MALI_Y_COORD_MASK)) {
2215 pandecode_msg("XXX: unexpected tile coordinate bits\n");
2216 pandecode_prop("min_tile_coord = 0x%X\n", s->min_tile_coord);
2217 pandecode_prop("max_tile_coord = 0x%X\n", s->max_tile_coord);
2218 }
2219
2220 /* Extract tile coordinates */
2221
2222 unsigned min_x = MALI_TILE_COORD_X(s->min_tile_coord) << MALI_TILE_SHIFT;
2223 unsigned min_y = MALI_TILE_COORD_Y(s->min_tile_coord) << MALI_TILE_SHIFT;
2224
2225 unsigned max_x = (MALI_TILE_COORD_X(s->max_tile_coord) + 1) << MALI_TILE_SHIFT;
2226 unsigned max_y = (MALI_TILE_COORD_Y(s->max_tile_coord) + 1) << MALI_TILE_SHIFT;
2227
2228 /* For the max, we also want the floored (rather than ceiled) version for checking */
2229
2230 unsigned max_x_f = (MALI_TILE_COORD_X(s->max_tile_coord)) << MALI_TILE_SHIFT;
2231 unsigned max_y_f = (MALI_TILE_COORD_Y(s->max_tile_coord)) << MALI_TILE_SHIFT;
2232
2233 /* Validate the coordinates are well-ordered */
2234
2235 if (min_x == max_x)
2236 pandecode_msg("XXX: empty X coordinates (%u = %u)\n", min_x, max_x);
2237 else if (min_x > max_x)
2238 pandecode_msg("XXX: misordered X coordinates (%u > %u)\n", min_x, max_x);
2239
2240 if (min_y == max_y)
2241 pandecode_msg("XXX: empty X coordinates (%u = %u)\n", min_x, max_x);
2242 else if (min_y > max_y)
2243 pandecode_msg("XXX: misordered X coordinates (%u > %u)\n", min_x, max_x);
2244
2245 /* Validate the coordinates fit inside the framebuffer. We use floor,
2246 * rather than ceil, for the max coordinates, since the tile
2247 * coordinates for something like an 800x600 framebuffer will actually
2248 * resolve to 800x608, which would otherwise trigger a Y-overflow */
2249
2250 if ((min_x > info.width) || (max_x_f > info.width))
2251 pandecode_msg("XXX: tile coordinates overflow in X direction\n");
2252
2253 if ((min_y > info.height) || (max_y_f > info.height))
2254 pandecode_msg("XXX: tile coordinates overflow in Y direction\n");
2255
2256 /* After validation, we print */
2257
2258 pandecode_log("fragment (%u, %u) ... (%u, %u)\n\n", min_x, min_y, max_x, max_y);
2259
2260 /* The FBD is a tagged pointer */
2261
2262 unsigned tag = (s->framebuffer & ~FBD_MASK);
2263
2264 if (tag != expected_tag)
2265 pandecode_msg("XXX: expected FBD tag %X but got %X\n", expected_tag, tag);
2266
2267 return sizeof(*s);
2268 }
2269
2270 /* Entrypoint to start tracing. jc_gpu_va is the GPU address for the first job
2271 * in the chain; later jobs are found by walking the chain. Bifrost is, well,
2272 * if it's bifrost or not. GPU ID is the more finegrained ID (at some point, we
2273 * might wish to combine this with the bifrost parameter) because some details
2274 * are model-specific even within a particular architecture. Minimal traces
2275 * *only* examine the job descriptors, skipping printing entirely if there is
2276 * no faults, and only descends into the payload if there are faults. This is
2277 * useful for looking for faults without the overhead of invasive traces. */
2278
2279 void
2280 pandecode_jc(mali_ptr jc_gpu_va, bool bifrost, unsigned gpu_id, bool minimal)
2281 {
2282 pandecode_dump_file_open();
2283
2284 struct mali_job_descriptor_header *h;
2285 unsigned job_descriptor_number = 0;
2286
2287 do {
2288 struct pandecode_mapped_memory *mem =
2289 pandecode_find_mapped_gpu_mem_containing(jc_gpu_va);
2290
2291 void *payload;
2292
2293 h = PANDECODE_PTR(mem, jc_gpu_va, struct mali_job_descriptor_header);
2294
2295 mali_ptr payload_ptr = jc_gpu_va + sizeof(*h);
2296 payload = pandecode_fetch_gpu_mem(mem, payload_ptr, 256);
2297
2298 int job_no = job_descriptor_number++;
2299
2300 /* If the job is good to go, skip it in minimal mode */
2301 if (minimal && (h->exception_status == 0x0 || h->exception_status == 0x1))
2302 continue;
2303
2304 pandecode_log("struct mali_job_descriptor_header job_%"PRIx64"_%d = {\n", jc_gpu_va, job_no);
2305 pandecode_indent++;
2306
2307 pandecode_prop("job_type = %s", mali_job_type_as_str(h->job_type));
2308
2309 if (h->job_descriptor_size)
2310 pandecode_prop("job_descriptor_size = %d", h->job_descriptor_size);
2311
2312 if (h->exception_status && h->exception_status != 0x1)
2313 pandecode_prop("exception_status = %x (source ID: 0x%x access: %s exception: 0x%x)",
2314 h->exception_status,
2315 (h->exception_status >> 16) & 0xFFFF,
2316 mali_exception_access_as_str((h->exception_status >> 8) & 0x3),
2317 h->exception_status & 0xFF);
2318
2319 if (h->first_incomplete_task)
2320 pandecode_prop("first_incomplete_task = %d", h->first_incomplete_task);
2321
2322 if (h->fault_pointer)
2323 pandecode_prop("fault_pointer = 0x%" PRIx64, h->fault_pointer);
2324
2325 if (h->job_barrier)
2326 pandecode_prop("job_barrier = %d", h->job_barrier);
2327
2328 pandecode_prop("job_index = %d", h->job_index);
2329
2330 if (h->unknown_flags)
2331 pandecode_prop("unknown_flags = %d", h->unknown_flags);
2332
2333 if (h->job_dependency_index_1)
2334 pandecode_prop("job_dependency_index_1 = %d", h->job_dependency_index_1);
2335
2336 if (h->job_dependency_index_2)
2337 pandecode_prop("job_dependency_index_2 = %d", h->job_dependency_index_2);
2338
2339 pandecode_indent--;
2340 pandecode_log("};\n");
2341
2342 switch (h->job_type) {
2343 case MALI_JOB_TYPE_WRITE_VALUE: {
2344 struct mali_payload_write_value *s = payload;
2345 pandecode_log("struct mali_payload_write_value payload_%"PRIx64"_%d = {\n", payload_ptr, job_no);
2346 pandecode_indent++;
2347 MEMORY_PROP(s, address);
2348
2349 if (s->value_descriptor != MALI_WRITE_VALUE_ZERO) {
2350 pandecode_msg("XXX: unknown value descriptor\n");
2351 pandecode_prop("value_descriptor = 0x%" PRIX32, s->value_descriptor);
2352 }
2353
2354 if (s->reserved) {
2355 pandecode_msg("XXX: set value tripped\n");
2356 pandecode_prop("reserved = 0x%" PRIX32, s->reserved);
2357 }
2358
2359 pandecode_prop("immediate = 0x%" PRIX64, s->immediate);
2360 pandecode_indent--;
2361 pandecode_log("};\n");
2362
2363 break;
2364 }
2365
2366 case MALI_JOB_TYPE_TILER:
2367 case MALI_JOB_TYPE_VERTEX:
2368 case MALI_JOB_TYPE_COMPUTE:
2369 if (bifrost) {
2370 if (h->job_type == MALI_JOB_TYPE_TILER)
2371 pandecode_tiler_job_bfr(h, mem, payload_ptr, job_no, gpu_id);
2372 else
2373 pandecode_vertex_job_bfr(h, mem, payload_ptr, job_no, gpu_id);
2374 } else
2375 pandecode_vertex_or_tiler_job_mdg(h, mem, payload_ptr, job_no, gpu_id);
2376
2377 break;
2378
2379 case MALI_JOB_TYPE_FRAGMENT:
2380 pandecode_fragment_job(mem, payload_ptr, job_no, bifrost, gpu_id);
2381 break;
2382
2383 default:
2384 break;
2385 }
2386 } while ((jc_gpu_va = h->next_job));
2387
2388 pandecode_map_read_write();
2389 }