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panfrost: XMLify exception access
[mesa.git] / src / panfrost / lib / decode.c
1 /*
2 * Copyright (C) 2017-2019 Alyssa Rosenzweig
3 * Copyright (C) 2017-2019 Connor Abbott
4 * Copyright (C) 2019 Collabora, Ltd.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 */
25
26 #include <midgard_pack.h>
27 #include <stdio.h>
28 #include <stdlib.h>
29 #include <memory.h>
30 #include <stdbool.h>
31 #include <stdarg.h>
32 #include <ctype.h>
33 #include "decode.h"
34 #include "util/macros.h"
35 #include "util/u_math.h"
36
37 #include "midgard/disassemble.h"
38 #include "bifrost/disassemble.h"
39
40 #include "pan_encoder.h"
41
42 static void pandecode_swizzle(unsigned swizzle, enum mali_format format);
43
44 #define MEMORY_PROP(obj, p) {\
45 if (obj->p) { \
46 char *a = pointer_as_memory_reference(obj->p); \
47 pandecode_prop("%s = %s", #p, a); \
48 free(a); \
49 } \
50 }
51
52 #define MEMORY_PROP_DIR(obj, p) {\
53 if (obj.p) { \
54 char *a = pointer_as_memory_reference(obj.p); \
55 pandecode_prop("%s = %s", #p, a); \
56 free(a); \
57 } \
58 }
59
60 #define DUMP_CL(title, T, cl, indent) {\
61 fprintf(pandecode_dump_stream, "%s\n", title); \
62 struct MALI_ ## T temp; \
63 MALI_ ## T ## _unpack((const uint8_t *) cl, &temp); \
64 MALI_ ## T ## _print(pandecode_dump_stream, &temp, indent * 2); \
65 }
66
67 #define DUMP_ADDR(title, T, addr, indent) {\
68 struct pandecode_mapped_memory *mapped_mem = pandecode_find_mapped_gpu_mem_containing(addr); \
69 const uint8_t *cl = pandecode_fetch_gpu_mem(mapped_mem, addr, MALI_ ## T ## _LENGTH); \
70 DUMP_CL(title, T, cl, indent); \
71 }
72
73 FILE *pandecode_dump_stream;
74
75 /* Semantic logging type.
76 *
77 * Raw: for raw messages to be printed as is.
78 * Message: for helpful information to be commented out in replays.
79 * Property: for properties of a struct
80 *
81 * Use one of pandecode_log, pandecode_msg, or pandecode_prop as syntax sugar.
82 */
83
84 enum pandecode_log_type {
85 PANDECODE_RAW,
86 PANDECODE_MESSAGE,
87 PANDECODE_PROPERTY
88 };
89
90 #define pandecode_log(...) pandecode_log_typed(PANDECODE_RAW, __VA_ARGS__)
91 #define pandecode_msg(...) pandecode_log_typed(PANDECODE_MESSAGE, __VA_ARGS__)
92 #define pandecode_prop(...) pandecode_log_typed(PANDECODE_PROPERTY, __VA_ARGS__)
93
94 unsigned pandecode_indent = 0;
95
96 static void
97 pandecode_make_indent(void)
98 {
99 for (unsigned i = 0; i < pandecode_indent; ++i)
100 fprintf(pandecode_dump_stream, " ");
101 }
102
103 static void
104 pandecode_log_typed(enum pandecode_log_type type, const char *format, ...)
105 {
106 va_list ap;
107
108 pandecode_make_indent();
109
110 if (type == PANDECODE_MESSAGE)
111 fprintf(pandecode_dump_stream, "// ");
112 else if (type == PANDECODE_PROPERTY)
113 fprintf(pandecode_dump_stream, ".");
114
115 va_start(ap, format);
116 vfprintf(pandecode_dump_stream, format, ap);
117 va_end(ap);
118
119 if (type == PANDECODE_PROPERTY)
120 fprintf(pandecode_dump_stream, ",\n");
121 }
122
123 static void
124 pandecode_log_cont(const char *format, ...)
125 {
126 va_list ap;
127
128 va_start(ap, format);
129 vfprintf(pandecode_dump_stream, format, ap);
130 va_end(ap);
131 }
132
133 /* To check for memory safety issues, validates that the given pointer in GPU
134 * memory is valid, containing at least sz bytes. The goal is to eliminate
135 * GPU-side memory bugs (NULL pointer dereferences, buffer overflows, or buffer
136 * overruns) by statically validating pointers.
137 */
138
139 static void
140 pandecode_validate_buffer(mali_ptr addr, size_t sz)
141 {
142 if (!addr) {
143 pandecode_msg("XXX: null pointer deref");
144 return;
145 }
146
147 /* Find a BO */
148
149 struct pandecode_mapped_memory *bo =
150 pandecode_find_mapped_gpu_mem_containing(addr);
151
152 if (!bo) {
153 pandecode_msg("XXX: invalid memory dereference\n");
154 return;
155 }
156
157 /* Bounds check */
158
159 unsigned offset = addr - bo->gpu_va;
160 unsigned total = offset + sz;
161
162 if (total > bo->length) {
163 pandecode_msg("XXX: buffer overrun. "
164 "Chunk of size %zu at offset %d in buffer of size %zu. "
165 "Overrun by %zu bytes. \n",
166 sz, offset, bo->length, total - bo->length);
167 return;
168 }
169 }
170
171 struct pandecode_flag_info {
172 u64 flag;
173 const char *name;
174 };
175
176 static void
177 pandecode_log_decoded_flags(const struct pandecode_flag_info *flag_info,
178 u64 flags)
179 {
180 bool decodable_flags_found = false;
181
182 for (int i = 0; flag_info[i].name; i++) {
183 if ((flags & flag_info[i].flag) != flag_info[i].flag)
184 continue;
185
186 if (!decodable_flags_found) {
187 decodable_flags_found = true;
188 } else {
189 pandecode_log_cont(" | ");
190 }
191
192 pandecode_log_cont("%s", flag_info[i].name);
193
194 flags &= ~flag_info[i].flag;
195 }
196
197 if (decodable_flags_found) {
198 if (flags)
199 pandecode_log_cont(" | 0x%" PRIx64, flags);
200 } else {
201 pandecode_log_cont("0x%" PRIx64, flags);
202 }
203 }
204
205 #define FLAG_INFO(flag) { MALI_##flag, "MALI_" #flag }
206 static const struct pandecode_flag_info gl_enable_flag_info[] = {
207 FLAG_INFO(OCCLUSION_QUERY),
208 FLAG_INFO(OCCLUSION_PRECISE),
209 FLAG_INFO(FRONT_CCW_TOP),
210 FLAG_INFO(CULL_FACE_FRONT),
211 FLAG_INFO(CULL_FACE_BACK),
212 {}
213 };
214 #undef FLAG_INFO
215
216 #define FLAG_INFO(flag) { MALI_CLEAR_##flag, "MALI_CLEAR_" #flag }
217 static const struct pandecode_flag_info clear_flag_info[] = {
218 FLAG_INFO(FAST),
219 FLAG_INFO(SLOW),
220 FLAG_INFO(SLOW_STENCIL),
221 {}
222 };
223 #undef FLAG_INFO
224
225 #define FLAG_INFO(flag) { MALI_MASK_##flag, "MALI_MASK_" #flag }
226 static const struct pandecode_flag_info mask_flag_info[] = {
227 FLAG_INFO(R),
228 FLAG_INFO(G),
229 FLAG_INFO(B),
230 FLAG_INFO(A),
231 {}
232 };
233 #undef FLAG_INFO
234
235 #define FLAG_INFO(flag) { MALI_##flag, "MALI_" #flag }
236 static const struct pandecode_flag_info u3_flag_info[] = {
237 FLAG_INFO(HAS_MSAA),
238 FLAG_INFO(PER_SAMPLE),
239 FLAG_INFO(CAN_DISCARD),
240 FLAG_INFO(HAS_BLEND_SHADER),
241 FLAG_INFO(DEPTH_WRITEMASK),
242 FLAG_INFO(DEPTH_CLIP_NEAR),
243 FLAG_INFO(DEPTH_CLIP_FAR),
244 {}
245 };
246
247 static const struct pandecode_flag_info u4_flag_info[] = {
248 FLAG_INFO(NO_MSAA),
249 FLAG_INFO(NO_DITHER),
250 FLAG_INFO(DEPTH_RANGE_A),
251 FLAG_INFO(DEPTH_RANGE_B),
252 FLAG_INFO(STENCIL_TEST),
253 FLAG_INFO(ALPHA_TO_COVERAGE),
254 {}
255 };
256 #undef FLAG_INFO
257
258 #define FLAG_INFO(flag) { MALI_MFBD_FORMAT_##flag, "MALI_MFBD_FORMAT_" #flag }
259 static const struct pandecode_flag_info mfbd_fmt_flag_info[] = {
260 FLAG_INFO(SRGB),
261 {}
262 };
263 #undef FLAG_INFO
264
265 #define FLAG_INFO(flag) { MALI_AFBC_##flag, "MALI_AFBC_" #flag }
266 static const struct pandecode_flag_info afbc_fmt_flag_info[] = {
267 FLAG_INFO(YTR),
268 {}
269 };
270 #undef FLAG_INFO
271
272 #define FLAG_INFO(flag) { MALI_EXTRA_##flag, "MALI_EXTRA_" #flag }
273 static const struct pandecode_flag_info mfbd_extra_flag_hi_info[] = {
274 FLAG_INFO(PRESENT),
275 {}
276 };
277 #undef FLAG_INFO
278
279 #define FLAG_INFO(flag) { MALI_EXTRA_##flag, "MALI_EXTRA_" #flag }
280 static const struct pandecode_flag_info mfbd_extra_flag_lo_info[] = {
281 FLAG_INFO(ZS),
282 {}
283 };
284 #undef FLAG_INFO
285
286 #define FLAG_INFO(flag) { MALI_##flag, "MALI_" #flag }
287 static const struct pandecode_flag_info shader_midgard1_flag_lo_info [] = {
288 FLAG_INFO(WRITES_Z),
289 FLAG_INFO(EARLY_Z),
290 FLAG_INFO(READS_TILEBUFFER),
291 FLAG_INFO(WRITES_GLOBAL),
292 FLAG_INFO(READS_ZS),
293 {}
294 };
295
296 static const struct pandecode_flag_info shader_midgard1_flag_hi_info [] = {
297 FLAG_INFO(WRITES_S),
298 FLAG_INFO(SUPPRESS_INF_NAN),
299 {}
300 };
301 #undef FLAG_INFO
302
303 #define FLAG_INFO(flag) { MALI_BIFROST_##flag, "MALI_BIFROST_" #flag }
304 static const struct pandecode_flag_info shader_bifrost_info [] = {
305 FLAG_INFO(FULL_THREAD),
306 FLAG_INFO(EARLY_Z),
307 FLAG_INFO(FIRST_ATEST),
308 {}
309 };
310
311 #undef FLAG_INFO
312
313 #define FLAG_INFO(flag) { MALI_MFBD_##flag, "MALI_MFBD_" #flag }
314 static const struct pandecode_flag_info mfbd_flag_info [] = {
315 FLAG_INFO(DEPTH_WRITE),
316 FLAG_INFO(EXTRA),
317 {}
318 };
319 #undef FLAG_INFO
320
321 #define FLAG_INFO(flag) { MALI_SFBD_FORMAT_##flag, "MALI_SFBD_FORMAT_" #flag }
322 static const struct pandecode_flag_info sfbd_unk1_info [] = {
323 FLAG_INFO(MSAA_8),
324 FLAG_INFO(MSAA_A),
325 {}
326 };
327 #undef FLAG_INFO
328
329 #define FLAG_INFO(flag) { MALI_SFBD_FORMAT_##flag, "MALI_SFBD_FORMAT_" #flag }
330 static const struct pandecode_flag_info sfbd_unk2_info [] = {
331 FLAG_INFO(MSAA_B),
332 FLAG_INFO(SRGB),
333 {}
334 };
335 #undef FLAG_INFO
336
337 #define DEFINE_CASE(name) case MALI_## name: return "MALI_" #name
338 static char *pandecode_format(enum mali_format format)
339 {
340 static char unk_format_str[10];
341
342 switch (format) {
343 DEFINE_CASE(ETC2_RGB8);
344 DEFINE_CASE(ETC2_R11_UNORM);
345 DEFINE_CASE(ETC2_RGBA8);
346 DEFINE_CASE(ETC2_RG11_UNORM);
347 DEFINE_CASE(ETC2_R11_SNORM);
348 DEFINE_CASE(ETC2_RG11_SNORM);
349 DEFINE_CASE(ETC2_RGB8A1);
350 DEFINE_CASE(NXR);
351 DEFINE_CASE(BC1_UNORM);
352 DEFINE_CASE(BC2_UNORM);
353 DEFINE_CASE(BC3_UNORM);
354 DEFINE_CASE(BC4_UNORM);
355 DEFINE_CASE(BC4_SNORM);
356 DEFINE_CASE(BC5_UNORM);
357 DEFINE_CASE(BC5_SNORM);
358 DEFINE_CASE(BC6H_UF16);
359 DEFINE_CASE(BC6H_SF16);
360 DEFINE_CASE(BC7_UNORM);
361 DEFINE_CASE(ASTC_3D_LDR);
362 DEFINE_CASE(ASTC_3D_HDR);
363 DEFINE_CASE(ASTC_2D_LDR);
364 DEFINE_CASE(ASTC_2D_HDR);
365 DEFINE_CASE(RGB565);
366 DEFINE_CASE(RGB5_X1_UNORM);
367 DEFINE_CASE(RGB5_A1_UNORM);
368 DEFINE_CASE(RGB10_A2_UNORM);
369 DEFINE_CASE(RGB10_A2_SNORM);
370 DEFINE_CASE(RGB10_A2UI);
371 DEFINE_CASE(RGB10_A2I);
372 DEFINE_CASE(RGB332_UNORM);
373 DEFINE_CASE(RGB233_UNORM);
374 DEFINE_CASE(Z24X8_UNORM);
375 DEFINE_CASE(R32_FIXED);
376 DEFINE_CASE(RG32_FIXED);
377 DEFINE_CASE(RGB32_FIXED);
378 DEFINE_CASE(RGBA32_FIXED);
379 DEFINE_CASE(R11F_G11F_B10F);
380 DEFINE_CASE(R9F_G9F_B9F_E5F);
381 DEFINE_CASE(VARYING_POS);
382 DEFINE_CASE(VARYING_DISCARD);
383
384 DEFINE_CASE(R8_SNORM);
385 DEFINE_CASE(R16_SNORM);
386 DEFINE_CASE(R32_SNORM);
387 DEFINE_CASE(RG8_SNORM);
388 DEFINE_CASE(RG16_SNORM);
389 DEFINE_CASE(RG32_SNORM);
390 DEFINE_CASE(RGB8_SNORM);
391 DEFINE_CASE(RGB16_SNORM);
392 DEFINE_CASE(RGB32_SNORM);
393 DEFINE_CASE(RGBA8_SNORM);
394 DEFINE_CASE(RGBA16_SNORM);
395 DEFINE_CASE(RGBA32_SNORM);
396
397 DEFINE_CASE(R8UI);
398 DEFINE_CASE(R16UI);
399 DEFINE_CASE(R32UI);
400 DEFINE_CASE(RG8UI);
401 DEFINE_CASE(RG16UI);
402 DEFINE_CASE(RG32UI);
403 DEFINE_CASE(RGB8UI);
404 DEFINE_CASE(RGB16UI);
405 DEFINE_CASE(RGB32UI);
406 DEFINE_CASE(RGBA8UI);
407 DEFINE_CASE(RGBA16UI);
408 DEFINE_CASE(RGBA32UI);
409
410 DEFINE_CASE(R8_UNORM);
411 DEFINE_CASE(R16_UNORM);
412 DEFINE_CASE(R32_UNORM);
413 DEFINE_CASE(R32F);
414 DEFINE_CASE(RG8_UNORM);
415 DEFINE_CASE(RG16_UNORM);
416 DEFINE_CASE(RG32_UNORM);
417 DEFINE_CASE(RG32F);
418 DEFINE_CASE(RGB8_UNORM);
419 DEFINE_CASE(RGB16_UNORM);
420 DEFINE_CASE(RGB32_UNORM);
421 DEFINE_CASE(RGB32F);
422 DEFINE_CASE(RGBA4_UNORM);
423 DEFINE_CASE(RGBA8_UNORM);
424 DEFINE_CASE(RGBA16_UNORM);
425 DEFINE_CASE(RGBA32_UNORM);
426 DEFINE_CASE(RGBA32F);
427
428 DEFINE_CASE(R8I);
429 DEFINE_CASE(R16I);
430 DEFINE_CASE(R32I);
431 DEFINE_CASE(RG8I);
432 DEFINE_CASE(R16F);
433 DEFINE_CASE(RG16I);
434 DEFINE_CASE(RG32I);
435 DEFINE_CASE(RG16F);
436 DEFINE_CASE(RGB8I);
437 DEFINE_CASE(RGB16I);
438 DEFINE_CASE(RGB32I);
439 DEFINE_CASE(RGB16F);
440 DEFINE_CASE(RGBA8I);
441 DEFINE_CASE(RGBA16I);
442 DEFINE_CASE(RGBA32I);
443 DEFINE_CASE(RGBA16F);
444
445 DEFINE_CASE(RGBA4);
446 DEFINE_CASE(RGBA8_2);
447 DEFINE_CASE(RGB10_A2_2);
448 default:
449 snprintf(unk_format_str, sizeof(unk_format_str), "MALI_0x%02x", format);
450 return unk_format_str;
451 }
452 }
453
454 #undef DEFINE_CASE
455
456 static char *pandecode_attr_mode_short(enum mali_attr_mode mode)
457 {
458 switch(mode) {
459 /* TODO: Combine to just "instanced" once this can be done
460 * unambiguously in all known cases */
461 case MALI_ATTR_POT_DIVIDE:
462 return "instanced_pot";
463 case MALI_ATTR_MODULO:
464 return "instanced_mod";
465 case MALI_ATTR_NPOT_DIVIDE:
466 return "instanced_npot";
467 case MALI_ATTR_IMAGE:
468 return "image";
469 default:
470 pandecode_msg("XXX: invalid attribute mode %X\n", mode);
471 return "";
472 }
473 }
474
475 static const char *
476 pandecode_special_record(uint64_t v, bool* attribute)
477 {
478 switch(v) {
479 case MALI_ATTR_VERTEXID:
480 *attribute = true;
481 return "gl_VertexID";
482 case MALI_ATTR_INSTANCEID:
483 *attribute = true;
484 return "gl_InstanceID";
485 case MALI_VARYING_FRAG_COORD:
486 return "gl_FragCoord";
487 case MALI_VARYING_FRONT_FACING:
488 return "gl_FrontFacing";
489 case MALI_VARYING_POINT_COORD:
490 return "gl_PointCoord";
491 default:
492 pandecode_msg("XXX: invalid special record %" PRIx64 "\n", v);
493 return "";
494 }
495 }
496
497
498 /* Midgard's tiler descriptor is embedded within the
499 * larger FBD */
500
501 static void
502 pandecode_midgard_tiler_descriptor(
503 const struct midgard_tiler_descriptor *t,
504 unsigned width,
505 unsigned height,
506 bool is_fragment,
507 bool has_hierarchy)
508 {
509 pandecode_log(".tiler = {\n");
510 pandecode_indent++;
511
512 if (t->hierarchy_mask == MALI_TILER_DISABLED)
513 pandecode_prop("hierarchy_mask = MALI_TILER_DISABLED");
514 else
515 pandecode_prop("hierarchy_mask = 0x%" PRIx16, t->hierarchy_mask);
516
517 /* We know this name from the kernel, but we never see it nonzero */
518
519 if (t->flags)
520 pandecode_msg("XXX: unexpected tiler flags 0x%" PRIx16, t->flags);
521
522 MEMORY_PROP(t, polygon_list);
523
524 /* The body is offset from the base of the polygon list */
525 //assert(t->polygon_list_body > t->polygon_list);
526 unsigned body_offset = t->polygon_list_body - t->polygon_list;
527
528 /* It needs to fit inside the reported size */
529 //assert(t->polygon_list_size >= body_offset);
530
531 /* Now that we've sanity checked, we'll try to calculate the sizes
532 * ourselves for comparison */
533
534 unsigned ref_header = panfrost_tiler_header_size(width, height, t->hierarchy_mask, has_hierarchy);
535 unsigned ref_size = panfrost_tiler_full_size(width, height, t->hierarchy_mask, has_hierarchy);
536
537 if (!((ref_header == body_offset) && (ref_size == t->polygon_list_size))) {
538 pandecode_msg("XXX: bad polygon list size (expected %d / 0x%x)\n",
539 ref_header, ref_size);
540 pandecode_prop("polygon_list_size = 0x%x", t->polygon_list_size);
541 pandecode_msg("body offset %d\n", body_offset);
542 }
543
544 /* The tiler heap has a start and end specified -- it should be
545 * identical to what we have in the BO. The exception is if tiling is
546 * disabled. */
547
548 MEMORY_PROP(t, heap_start);
549 assert(t->heap_end >= t->heap_start);
550
551 struct pandecode_mapped_memory *heap =
552 pandecode_find_mapped_gpu_mem_containing(t->heap_start);
553
554 unsigned heap_size = t->heap_end - t->heap_start;
555
556 /* Tiling is enabled with a special flag */
557 unsigned hierarchy_mask = t->hierarchy_mask & MALI_HIERARCHY_MASK;
558 unsigned tiler_flags = t->hierarchy_mask ^ hierarchy_mask;
559
560 bool tiling_enabled = hierarchy_mask;
561
562 if (tiling_enabled) {
563 /* When tiling is enabled, the heap should be a tight fit */
564 unsigned heap_offset = t->heap_start - heap->gpu_va;
565 if ((heap_offset + heap_size) != heap->length) {
566 pandecode_msg("XXX: heap size %u (expected %zu)\n",
567 heap_size, heap->length - heap_offset);
568 }
569
570 /* We should also have no other flags */
571 if (tiler_flags)
572 pandecode_msg("XXX: unexpected tiler %X\n", tiler_flags);
573 } else {
574 /* When tiling is disabled, we should have that flag and no others */
575
576 if (tiler_flags != MALI_TILER_DISABLED) {
577 pandecode_msg("XXX: unexpected tiler flag %X, expected MALI_TILER_DISABLED\n",
578 tiler_flags);
579 }
580
581 /* We should also have an empty heap */
582 if (heap_size) {
583 pandecode_msg("XXX: tiler heap size %d given, expected empty\n",
584 heap_size);
585 }
586
587 /* Disabled tiling is used only for clear-only jobs, which are
588 * purely FRAGMENT, so we should never see this for
589 * non-FRAGMENT descriptors. */
590
591 if (!is_fragment)
592 pandecode_msg("XXX: tiler disabled for non-FRAGMENT job\n");
593 }
594
595 /* We've never seen weights used in practice, but we know from the
596 * kernel these fields is there */
597
598 bool nonzero_weights = false;
599
600 for (unsigned w = 0; w < ARRAY_SIZE(t->weights); ++w) {
601 nonzero_weights |= t->weights[w] != 0x0;
602 }
603
604 if (nonzero_weights) {
605 pandecode_log(".weights = { ");
606
607 for (unsigned w = 0; w < ARRAY_SIZE(t->weights); ++w) {
608 pandecode_log_cont("%d, ", t->weights[w]);
609 }
610
611 pandecode_log("},");
612 }
613
614 pandecode_indent--;
615 pandecode_log("}\n");
616 }
617
618 /* TODO: The Bifrost tiler is not understood at all yet */
619
620 static void
621 pandecode_bifrost_tiler_descriptor(const struct mali_framebuffer *fb)
622 {
623 pandecode_log(".tiler = {\n");
624 pandecode_indent++;
625
626 MEMORY_PROP(fb, tiler_meta);
627
628 for (int i = 0; i < 16; i++) {
629 if (fb->zeros[i] != 0) {
630 pandecode_msg("XXX: tiler descriptor zero %d tripped, value %x\n",
631 i, fb->zeros[i]);
632 }
633 }
634
635 pandecode_log("},\n");
636
637 pandecode_indent--;
638 pandecode_log("}\n");
639
640 }
641
642 /* Information about the framebuffer passed back for
643 * additional analysis */
644
645 struct pandecode_fbd {
646 unsigned width;
647 unsigned height;
648 unsigned rt_count;
649 bool has_extra;
650 };
651
652 static void
653 pandecode_sfbd_format(struct mali_sfbd_format format)
654 {
655 pandecode_log(".format = {\n");
656 pandecode_indent++;
657
658 pandecode_log(".unk1 = ");
659 pandecode_log_decoded_flags(sfbd_unk1_info, format.unk1);
660 pandecode_log_cont(",\n");
661
662 /* TODO: Map formats so we can check swizzles and print nicely */
663 pandecode_log("swizzle");
664 pandecode_swizzle(format.swizzle, MALI_RGBA8_UNORM);
665 pandecode_log_cont(",\n");
666
667 pandecode_prop("nr_channels = MALI_POSITIVE(%d)",
668 (format.nr_channels + 1));
669
670 pandecode_log(".unk2 = ");
671 pandecode_log_decoded_flags(sfbd_unk2_info, format.unk2);
672 pandecode_log_cont(",\n");
673
674 pandecode_prop("block = %s", mali_block_format_as_str(format.block));
675
676 pandecode_prop("unk3 = 0x%" PRIx32, format.unk3);
677
678 pandecode_indent--;
679 pandecode_log("},\n");
680 }
681
682 static void
683 pandecode_shared_memory(const struct mali_shared_memory *desc, bool is_compute)
684 {
685 pandecode_prop("stack_shift = 0x%x", desc->stack_shift);
686
687 if (desc->unk0)
688 pandecode_prop("unk0 = 0x%x", desc->unk0);
689
690 if (desc->shared_workgroup_count != 0x1F) {
691 pandecode_prop("shared_workgroup_count = %d", desc->shared_workgroup_count);
692 if (!is_compute)
693 pandecode_msg("XXX: wrong workgroup count for noncompute\n");
694 }
695
696 if (desc->shared_unk1 || desc->shared_shift) {
697 pandecode_prop("shared_unk1 = %X", desc->shared_unk1);
698 pandecode_prop("shared_shift = %X", desc->shared_shift);
699
700 if (!is_compute)
701 pandecode_msg("XXX: shared memory configured in noncompute shader");
702 }
703
704 if (desc->shared_zero) {
705 pandecode_msg("XXX: shared memory zero tripped\n");
706 pandecode_prop("shared_zero = 0x%" PRIx32, desc->shared_zero);
707 }
708
709 if (desc->shared_memory && !is_compute)
710 pandecode_msg("XXX: shared memory used in noncompute shader\n");
711
712 MEMORY_PROP(desc, scratchpad);
713 MEMORY_PROP(desc, shared_memory);
714 MEMORY_PROP(desc, unknown1);
715
716 if (desc->scratchpad) {
717 struct pandecode_mapped_memory *smem =
718 pandecode_find_mapped_gpu_mem_containing(desc->scratchpad);
719
720 pandecode_msg("scratchpad size %u\n", smem->length);
721 }
722
723 }
724
725 static struct pandecode_fbd
726 pandecode_sfbd(uint64_t gpu_va, int job_no, bool is_fragment, unsigned gpu_id)
727 {
728 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
729 const struct mali_single_framebuffer *PANDECODE_PTR_VAR(s, mem, (mali_ptr) gpu_va);
730
731 struct pandecode_fbd info = {
732 .has_extra = false,
733 .rt_count = 1
734 };
735
736 pandecode_log("struct mali_single_framebuffer framebuffer_%"PRIx64"_%d = {\n", gpu_va, job_no);
737 pandecode_indent++;
738
739 pandecode_log(".shared_memory = {\n");
740 pandecode_indent++;
741 pandecode_shared_memory(&s->shared_memory, false);
742 pandecode_indent--;
743 pandecode_log("},\n");
744
745 pandecode_sfbd_format(s->format);
746
747 info.width = s->width + 1;
748 info.height = s->height + 1;
749
750 pandecode_prop("width = MALI_POSITIVE(%" PRId16 ")", info.width);
751 pandecode_prop("height = MALI_POSITIVE(%" PRId16 ")", info.height);
752
753 MEMORY_PROP(s, checksum);
754
755 if (s->checksum_stride)
756 pandecode_prop("checksum_stride = %d", s->checksum_stride);
757
758 MEMORY_PROP(s, framebuffer);
759 pandecode_prop("stride = %d", s->stride);
760
761 /* Earlier in the actual commandstream -- right before width -- but we
762 * delay to flow nicer */
763
764 pandecode_log(".clear_flags = ");
765 pandecode_log_decoded_flags(clear_flag_info, s->clear_flags);
766 pandecode_log_cont(",\n");
767
768 if (s->depth_buffer) {
769 MEMORY_PROP(s, depth_buffer);
770 pandecode_prop("depth_stride = %d", s->depth_stride);
771 }
772
773 if (s->stencil_buffer) {
774 MEMORY_PROP(s, stencil_buffer);
775 pandecode_prop("stencil_stride = %d", s->stencil_stride);
776 }
777
778 if (s->depth_stride_zero ||
779 s->stencil_stride_zero ||
780 s->zero7 || s->zero8) {
781 pandecode_msg("XXX: Depth/stencil zeros tripped\n");
782 pandecode_prop("depth_stride_zero = 0x%x",
783 s->depth_stride_zero);
784 pandecode_prop("stencil_stride_zero = 0x%x",
785 s->stencil_stride_zero);
786 pandecode_prop("zero7 = 0x%" PRIx32,
787 s->zero7);
788 pandecode_prop("zero8 = 0x%" PRIx32,
789 s->zero8);
790 }
791
792 if (s->clear_color_1 | s->clear_color_2 | s->clear_color_3 | s->clear_color_4) {
793 pandecode_prop("clear_color_1 = 0x%" PRIx32, s->clear_color_1);
794 pandecode_prop("clear_color_2 = 0x%" PRIx32, s->clear_color_2);
795 pandecode_prop("clear_color_3 = 0x%" PRIx32, s->clear_color_3);
796 pandecode_prop("clear_color_4 = 0x%" PRIx32, s->clear_color_4);
797 }
798
799 if (s->clear_depth_1 != 0 || s->clear_depth_2 != 0 || s->clear_depth_3 != 0 || s->clear_depth_4 != 0) {
800 pandecode_prop("clear_depth_1 = %f", s->clear_depth_1);
801 pandecode_prop("clear_depth_2 = %f", s->clear_depth_2);
802 pandecode_prop("clear_depth_3 = %f", s->clear_depth_3);
803 pandecode_prop("clear_depth_4 = %f", s->clear_depth_4);
804 }
805
806 if (s->clear_stencil) {
807 pandecode_prop("clear_stencil = 0x%x", s->clear_stencil);
808 }
809
810 const struct midgard_tiler_descriptor t = s->tiler;
811
812 bool has_hierarchy = !(gpu_id == 0x0720 || gpu_id == 0x0820 || gpu_id == 0x0830);
813 pandecode_midgard_tiler_descriptor(&t, s->width + 1, s->height + 1, is_fragment, has_hierarchy);
814
815 pandecode_indent--;
816 pandecode_log("};\n");
817
818 pandecode_prop("zero2 = 0x%" PRIx32, s->zero2);
819 pandecode_prop("zero4 = 0x%" PRIx32, s->zero4);
820 pandecode_prop("zero5 = 0x%" PRIx32, s->zero5);
821
822 pandecode_log_cont(".zero3 = {");
823
824 for (int i = 0; i < sizeof(s->zero3) / sizeof(s->zero3[0]); ++i)
825 pandecode_log_cont("%X, ", s->zero3[i]);
826
827 pandecode_log_cont("},\n");
828
829 pandecode_log_cont(".zero6 = {");
830
831 for (int i = 0; i < sizeof(s->zero6) / sizeof(s->zero6[0]); ++i)
832 pandecode_log_cont("%X, ", s->zero6[i]);
833
834 pandecode_log_cont("},\n");
835
836 return info;
837 }
838
839 static void
840 pandecode_compute_fbd(uint64_t gpu_va, int job_no)
841 {
842 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
843 const struct mali_shared_memory *PANDECODE_PTR_VAR(s, mem, (mali_ptr) gpu_va);
844
845 pandecode_log("struct mali_shared_memory shared_%"PRIx64"_%d = {\n", gpu_va, job_no);
846 pandecode_indent++;
847 pandecode_shared_memory(s, true);
848 pandecode_indent--;
849 pandecode_log("},\n");
850 }
851
852 /* Extracts the number of components associated with a Mali format */
853
854 static unsigned
855 pandecode_format_component_count(enum mali_format fmt)
856 {
857 /* Mask out the format class */
858 unsigned top = fmt & 0b11100000;
859
860 switch (top) {
861 case MALI_FORMAT_SNORM:
862 case MALI_FORMAT_UINT:
863 case MALI_FORMAT_UNORM:
864 case MALI_FORMAT_SINT:
865 return ((fmt >> 3) & 3) + 1;
866 default:
867 /* TODO: Validate */
868 return 4;
869 }
870 }
871
872 /* Extracts a mask of accessed components from a 12-bit Mali swizzle */
873
874 static unsigned
875 pandecode_access_mask_from_channel_swizzle(unsigned swizzle)
876 {
877 unsigned mask = 0;
878 assert(MALI_CHANNEL_RED == 0);
879
880 for (unsigned c = 0; c < 4; ++c) {
881 enum mali_channel chan = (swizzle >> (3*c)) & 0x7;
882
883 if (chan <= MALI_CHANNEL_ALPHA)
884 mask |= (1 << chan);
885 }
886
887 return mask;
888 }
889
890 /* Validates that a (format, swizzle) pair is valid, in the sense that the
891 * swizzle doesn't access any components that are undefined in the format.
892 * Returns whether the swizzle is trivial (doesn't do any swizzling) and can be
893 * omitted */
894
895 static bool
896 pandecode_validate_format_swizzle(enum mali_format fmt, unsigned swizzle)
897 {
898 unsigned nr_comp = pandecode_format_component_count(fmt);
899 unsigned access_mask = pandecode_access_mask_from_channel_swizzle(swizzle);
900 unsigned valid_mask = (1 << nr_comp) - 1;
901 unsigned invalid_mask = ~valid_mask;
902
903 if (access_mask & invalid_mask) {
904 pandecode_msg("XXX: invalid components accessed\n");
905 return false;
906 }
907
908 /* Check for the default non-swizzling swizzle so we can suppress
909 * useless printing for the defaults */
910
911 unsigned default_swizzles[4] = {
912 MALI_CHANNEL_RED | (MALI_CHANNEL_ZERO << 3) | (MALI_CHANNEL_ZERO << 6) | (MALI_CHANNEL_ONE << 9),
913 MALI_CHANNEL_RED | (MALI_CHANNEL_GREEN << 3) | (MALI_CHANNEL_ZERO << 6) | (MALI_CHANNEL_ONE << 9),
914 MALI_CHANNEL_RED | (MALI_CHANNEL_GREEN << 3) | (MALI_CHANNEL_BLUE << 6) | (MALI_CHANNEL_ONE << 9),
915 MALI_CHANNEL_RED | (MALI_CHANNEL_GREEN << 3) | (MALI_CHANNEL_BLUE << 6) | (MALI_CHANNEL_ALPHA << 9)
916 };
917
918 return (swizzle == default_swizzles[nr_comp - 1]);
919 }
920
921 /* Maps MALI_RGBA32F to rgba32f, etc */
922
923 static void
924 pandecode_format_short(enum mali_format fmt, bool srgb)
925 {
926 /* We want a type-like format, so cut off the initial MALI_ */
927 char *format = pandecode_format(fmt);
928 format += strlen("MALI_");
929
930 unsigned len = strlen(format);
931 char *lower_format = calloc(1, len + 1);
932
933 for (unsigned i = 0; i < len; ++i)
934 lower_format[i] = tolower(format[i]);
935
936 /* Sanity check sRGB flag is applied to RGB, per the name */
937 if (srgb && lower_format[0] != 'r')
938 pandecode_msg("XXX: sRGB applied to non-colour format\n");
939
940 /* Just prefix with an s, so you get formats like srgba8_unorm */
941 if (srgb)
942 pandecode_log_cont("s");
943
944 pandecode_log_cont("%s", lower_format);
945 free(lower_format);
946 }
947
948 static void
949 pandecode_swizzle(unsigned swizzle, enum mali_format format)
950 {
951 /* First, do some validation */
952 bool trivial_swizzle = pandecode_validate_format_swizzle(
953 format, swizzle);
954
955 if (trivial_swizzle)
956 return;
957
958 /* Next, print the swizzle */
959 pandecode_log_cont(".");
960
961 static const char components[] = "rgba01";
962
963 for (unsigned c = 0; c < 4; ++c) {
964 enum mali_channel chan = (swizzle >> (3 * c)) & 0x7;
965
966 if (chan >= MALI_CHANNEL_RESERVED_0) {
967 pandecode_log("XXX: invalid swizzle channel %d\n", chan);
968 continue;
969 }
970 pandecode_log_cont("%c", components[chan]);
971 }
972 }
973
974 static void
975 pandecode_rt_format(struct mali_rt_format format)
976 {
977 pandecode_log(".format = {\n");
978 pandecode_indent++;
979
980 pandecode_prop("unk1 = 0x%" PRIx32, format.unk1);
981 pandecode_prop("unk2 = 0x%" PRIx32, format.unk2);
982 pandecode_prop("unk3 = 0x%" PRIx32, format.unk3);
983 pandecode_prop("unk4 = 0x%" PRIx32, format.unk4);
984
985 pandecode_prop("block = %s", mali_block_format_as_str(format.block));
986
987 /* TODO: Map formats so we can check swizzles and print nicely */
988 pandecode_log("swizzle");
989 pandecode_swizzle(format.swizzle, MALI_RGBA8_UNORM);
990 pandecode_log_cont(",\n");
991
992 pandecode_prop("nr_channels = MALI_POSITIVE(%d)",
993 (format.nr_channels + 1));
994
995 pandecode_log(".flags = ");
996 pandecode_log_decoded_flags(mfbd_fmt_flag_info, format.flags);
997 pandecode_log_cont(",\n");
998
999 pandecode_prop("msaa = %s", mali_msaa_as_str(format.msaa));
1000
1001 /* In theory, the no_preload bit can be cleared to enable MFBD preload,
1002 * which is a faster hardware-based alternative to the wallpaper method
1003 * to preserve framebuffer contents across frames. In practice, MFBD
1004 * preload is buggy on Midgard, and so this is a chicken bit. If this
1005 * bit isn't set, most likely something broke unrelated to preload */
1006
1007 if (!format.no_preload) {
1008 pandecode_msg("XXX: buggy MFBD preload enabled - chicken bit should be clear\n");
1009 pandecode_prop("no_preload = 0x%" PRIx32, format.no_preload);
1010 }
1011
1012 if (format.zero)
1013 pandecode_prop("zero = 0x%" PRIx32, format.zero);
1014
1015 pandecode_indent--;
1016 pandecode_log("},\n");
1017 }
1018
1019 static void
1020 pandecode_render_target(uint64_t gpu_va, unsigned job_no, const struct mali_framebuffer *fb)
1021 {
1022 pandecode_log("struct mali_render_target rts_list_%"PRIx64"_%d[] = {\n", gpu_va, job_no);
1023 pandecode_indent++;
1024
1025 for (int i = 0; i < (fb->rt_count_1 + 1); i++) {
1026 mali_ptr rt_va = gpu_va + i * sizeof(struct mali_render_target);
1027 struct pandecode_mapped_memory *mem =
1028 pandecode_find_mapped_gpu_mem_containing(rt_va);
1029 const struct mali_render_target *PANDECODE_PTR_VAR(rt, mem, (mali_ptr) rt_va);
1030
1031 pandecode_log("{\n");
1032 pandecode_indent++;
1033
1034 pandecode_rt_format(rt->format);
1035
1036 if (rt->format.block == MALI_BLOCK_FORMAT_AFBC) {
1037 pandecode_log(".afbc = {\n");
1038 pandecode_indent++;
1039
1040 char *a = pointer_as_memory_reference(rt->afbc.metadata);
1041 pandecode_prop("metadata = %s", a);
1042 free(a);
1043
1044 pandecode_prop("stride = %d", rt->afbc.stride);
1045
1046 pandecode_log(".flags = ");
1047 pandecode_log_decoded_flags(afbc_fmt_flag_info, rt->afbc.flags);
1048 pandecode_log_cont(",\n");
1049
1050 pandecode_indent--;
1051 pandecode_log("},\n");
1052 } else if (rt->afbc.metadata || rt->afbc.stride || rt->afbc.flags) {
1053 pandecode_msg("XXX: AFBC disabled but AFBC field set (0x%lX, 0x%x, 0x%x)\n",
1054 rt->afbc.metadata,
1055 rt->afbc.stride,
1056 rt->afbc.flags);
1057 }
1058
1059 MEMORY_PROP(rt, framebuffer);
1060 pandecode_prop("framebuffer_stride = %d", rt->framebuffer_stride);
1061
1062 if (rt->layer_stride)
1063 pandecode_prop("layer_stride = %d", rt->layer_stride);
1064
1065 if (rt->clear_color_1 | rt->clear_color_2 | rt->clear_color_3 | rt->clear_color_4) {
1066 pandecode_prop("clear_color_1 = 0x%" PRIx32, rt->clear_color_1);
1067 pandecode_prop("clear_color_2 = 0x%" PRIx32, rt->clear_color_2);
1068 pandecode_prop("clear_color_3 = 0x%" PRIx32, rt->clear_color_3);
1069 pandecode_prop("clear_color_4 = 0x%" PRIx32, rt->clear_color_4);
1070 }
1071
1072 if (rt->zero1 || rt->zero2) {
1073 pandecode_msg("XXX: render target zeros tripped\n");
1074 pandecode_prop("zero1 = 0x%" PRIx64, rt->zero1);
1075 pandecode_prop("zero2 = 0x%" PRIx32, rt->zero2);
1076 }
1077
1078 pandecode_indent--;
1079 pandecode_log("},\n");
1080 }
1081
1082 pandecode_indent--;
1083 pandecode_log("};\n");
1084 }
1085
1086 static struct pandecode_fbd
1087 pandecode_mfbd_bfr(uint64_t gpu_va, int job_no, bool is_fragment, bool is_compute, bool is_bifrost)
1088 {
1089 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
1090 const struct mali_framebuffer *PANDECODE_PTR_VAR(fb, mem, (mali_ptr) gpu_va);
1091
1092 struct pandecode_fbd info;
1093
1094 if (is_bifrost && fb->msaa.sample_locations) {
1095 /* The blob stores all possible sample locations in a single buffer
1096 * allocated on startup, and just switches the pointer when switching
1097 * MSAA state. For now, we just put the data into the cmdstream, but we
1098 * should do something like what the blob does with a real driver.
1099 *
1100 * There seem to be 32 slots for sample locations, followed by another
1101 * 16. The second 16 is just the center location followed by 15 zeros
1102 * in all the cases I've identified (maybe shader vs. depth/color
1103 * samples?).
1104 */
1105
1106 struct pandecode_mapped_memory *smem = pandecode_find_mapped_gpu_mem_containing(fb->msaa.sample_locations);
1107
1108 const u16 *PANDECODE_PTR_VAR(samples, smem, fb->msaa.sample_locations);
1109
1110 pandecode_log("uint16_t sample_locations_%d[] = {\n", job_no);
1111 pandecode_indent++;
1112
1113 for (int i = 0; i < 32 + 16; i++) {
1114 pandecode_log("%d, %d,\n", samples[2 * i], samples[2 * i + 1]);
1115 }
1116
1117 pandecode_indent--;
1118 pandecode_log("};\n");
1119 }
1120
1121 pandecode_log("struct mali_framebuffer framebuffer_%"PRIx64"_%d = {\n", gpu_va, job_no);
1122 pandecode_indent++;
1123
1124 if (is_bifrost) {
1125 pandecode_log(".msaa = {\n");
1126 pandecode_indent++;
1127
1128 if (fb->msaa.sample_locations)
1129 pandecode_prop("sample_locations = sample_locations_%d", job_no);
1130 else
1131 pandecode_msg("XXX: sample_locations missing\n");
1132
1133 if (fb->msaa.zero1 || fb->msaa.zero2 || fb->msaa.zero4) {
1134 pandecode_msg("XXX: multisampling zero tripped\n");
1135 pandecode_prop("zero1 = %" PRIx64, fb->msaa.zero1);
1136 pandecode_prop("zero2 = %" PRIx64, fb->msaa.zero2);
1137 pandecode_prop("zero4 = %" PRIx64, fb->msaa.zero4);
1138 }
1139
1140 pandecode_indent--;
1141 pandecode_log("},\n");
1142 } else {
1143 pandecode_log(".shared_memory = {\n");
1144 pandecode_indent++;
1145 pandecode_shared_memory(&fb->shared_memory, is_compute);
1146 pandecode_indent--;
1147 pandecode_log("},\n");
1148 }
1149
1150 info.width = fb->width1 + 1;
1151 info.height = fb->height1 + 1;
1152 info.rt_count = fb->rt_count_1 + 1;
1153
1154 pandecode_prop("width1 = MALI_POSITIVE(%d)", fb->width1 + 1);
1155 pandecode_prop("height1 = MALI_POSITIVE(%d)", fb->height1 + 1);
1156 pandecode_prop("width2 = MALI_POSITIVE(%d)", fb->width2 + 1);
1157 pandecode_prop("height2 = MALI_POSITIVE(%d)", fb->height2 + 1);
1158
1159 pandecode_prop("unk1 = 0x%x", fb->unk1);
1160 pandecode_prop("unk2 = 0x%x", fb->unk2);
1161 pandecode_prop("rt_count_1 = MALI_POSITIVE(%d)", fb->rt_count_1 + 1);
1162 pandecode_prop("rt_count_2 = %d", fb->rt_count_2);
1163
1164 pandecode_log(".mfbd_flags = ");
1165 pandecode_log_decoded_flags(mfbd_flag_info, fb->mfbd_flags);
1166 pandecode_log_cont(",\n");
1167
1168 if (fb->clear_stencil)
1169 pandecode_prop("clear_stencil = 0x%x", fb->clear_stencil);
1170
1171 if (fb->clear_depth)
1172 pandecode_prop("clear_depth = %f", fb->clear_depth);
1173
1174 if (!is_compute)
1175 if (is_bifrost)
1176 pandecode_bifrost_tiler_descriptor(fb);
1177 else {
1178 const struct midgard_tiler_descriptor t = fb->tiler;
1179 pandecode_midgard_tiler_descriptor(&t, fb->width1 + 1, fb->height1 + 1, is_fragment, true);
1180 }
1181 else
1182 pandecode_msg("XXX: skipping compute MFBD, fixme\n");
1183
1184 if (fb->zero3 || fb->zero4) {
1185 pandecode_msg("XXX: framebuffer zeros tripped\n");
1186 pandecode_prop("zero3 = 0x%" PRIx32, fb->zero3);
1187 pandecode_prop("zero4 = 0x%" PRIx32, fb->zero4);
1188 }
1189
1190 pandecode_indent--;
1191 pandecode_log("};\n");
1192
1193 gpu_va += sizeof(struct mali_framebuffer);
1194
1195 info.has_extra = (fb->mfbd_flags & MALI_MFBD_EXTRA) && is_fragment;
1196
1197 if (info.has_extra) {
1198 mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
1199 const struct mali_framebuffer_extra *PANDECODE_PTR_VAR(fbx, mem, (mali_ptr) gpu_va);
1200
1201 pandecode_log("struct mali_framebuffer_extra fb_extra_%"PRIx64"_%d = {\n", gpu_va, job_no);
1202 pandecode_indent++;
1203
1204 MEMORY_PROP(fbx, checksum);
1205
1206 if (fbx->checksum_stride)
1207 pandecode_prop("checksum_stride = %d", fbx->checksum_stride);
1208
1209 pandecode_log(".flags_hi = ");
1210 pandecode_log_decoded_flags(mfbd_extra_flag_hi_info, fbx->flags_hi);
1211 pandecode_log_cont(",\n");
1212
1213 pandecode_log(".flags_lo = ");
1214 pandecode_log_decoded_flags(mfbd_extra_flag_lo_info, fbx->flags_lo);
1215 pandecode_log_cont(",\n");
1216
1217 pandecode_prop("zs_block = %s", mali_block_format_as_str(fbx->zs_block));
1218 pandecode_prop("zs_samples = MALI_POSITIVE(%u)", fbx->zs_samples + 1);
1219
1220 if (fbx->zs_block == MALI_BLOCK_FORMAT_AFBC) {
1221 pandecode_log(".ds_afbc = {\n");
1222 pandecode_indent++;
1223
1224 MEMORY_PROP_DIR(fbx->ds_afbc, depth_stencil_afbc_metadata);
1225 pandecode_prop("depth_stencil_afbc_stride = %d",
1226 fbx->ds_afbc.depth_stencil_afbc_stride);
1227 MEMORY_PROP_DIR(fbx->ds_afbc, depth_stencil);
1228
1229 pandecode_log(".flags = ");
1230 pandecode_log_decoded_flags(afbc_fmt_flag_info, fbx->ds_afbc.flags);
1231 pandecode_log_cont(",\n");
1232
1233 if (fbx->ds_afbc.padding) {
1234 pandecode_msg("XXX: Depth/stencil AFBC zeros tripped\n");
1235 pandecode_prop("padding = 0x%" PRIx64, fbx->ds_afbc.padding);
1236 }
1237
1238 pandecode_indent--;
1239 pandecode_log("},\n");
1240 } else {
1241 pandecode_log(".ds_linear = {\n");
1242 pandecode_indent++;
1243
1244 if (fbx->ds_linear.depth) {
1245 MEMORY_PROP_DIR(fbx->ds_linear, depth);
1246 pandecode_prop("depth_stride = %d",
1247 fbx->ds_linear.depth_stride);
1248 pandecode_prop("depth_layer_stride = %d",
1249 fbx->ds_linear.depth_layer_stride);
1250 } else if (fbx->ds_linear.depth_stride || fbx->ds_linear.depth_layer_stride) {
1251 pandecode_msg("XXX: depth stride zero tripped %d %d\n", fbx->ds_linear.depth_stride, fbx->ds_linear.depth_layer_stride);
1252 }
1253
1254 if (fbx->ds_linear.stencil) {
1255 MEMORY_PROP_DIR(fbx->ds_linear, stencil);
1256 pandecode_prop("stencil_stride = %d",
1257 fbx->ds_linear.stencil_stride);
1258 pandecode_prop("stencil_layer_stride = %d",
1259 fbx->ds_linear.stencil_layer_stride);
1260 } else if (fbx->ds_linear.stencil_stride || fbx->ds_linear.stencil_layer_stride) {
1261 pandecode_msg("XXX: stencil stride zero tripped %d %d\n", fbx->ds_linear.stencil_stride, fbx->ds_linear.stencil_layer_stride);
1262 }
1263
1264 if (fbx->ds_linear.depth_stride_zero ||
1265 fbx->ds_linear.stencil_stride_zero) {
1266 pandecode_msg("XXX: Depth/stencil zeros tripped\n");
1267 pandecode_prop("depth_stride_zero = 0x%x",
1268 fbx->ds_linear.depth_stride_zero);
1269 pandecode_prop("stencil_stride_zero = 0x%x",
1270 fbx->ds_linear.stencil_stride_zero);
1271 }
1272
1273 pandecode_indent--;
1274 pandecode_log("},\n");
1275 }
1276
1277 if (fbx->clear_color_1 | fbx->clear_color_2) {
1278 pandecode_prop("clear_color_1 = 0x%" PRIx32, fbx->clear_color_1);
1279 pandecode_prop("clear_color_2 = 0x%" PRIx32, fbx->clear_color_2);
1280 }
1281
1282 if (fbx->zero3) {
1283 pandecode_msg("XXX: fb_extra zeros tripped\n");
1284 pandecode_prop("zero3 = 0x%" PRIx64, fbx->zero3);
1285 }
1286
1287 pandecode_indent--;
1288 pandecode_log("};\n");
1289
1290 gpu_va += sizeof(struct mali_framebuffer_extra);
1291 }
1292
1293 if (is_fragment)
1294 pandecode_render_target(gpu_va, job_no, fb);
1295
1296 return info;
1297 }
1298
1299 /* Just add a comment decoding the shift/odd fields forming the padded vertices
1300 * count */
1301
1302 static void
1303 pandecode_padded_vertices(unsigned shift, unsigned k)
1304 {
1305 unsigned odd = 2*k + 1;
1306 unsigned pot = 1 << shift;
1307 pandecode_msg("padded_num_vertices = %d\n", odd * pot);
1308 }
1309
1310 /* Given a magic divisor, recover what we were trying to divide by.
1311 *
1312 * Let m represent the magic divisor. By definition, m is an element on Z, whre
1313 * 0 <= m < 2^N, for N bits in m.
1314 *
1315 * Let q represent the number we would like to divide by.
1316 *
1317 * By definition of a magic divisor for N-bit unsigned integers (a number you
1318 * multiply by to magically get division), m is a number such that:
1319 *
1320 * (m * x) & (2^N - 1) = floor(x/q).
1321 * for all x on Z where 0 <= x < 2^N
1322 *
1323 * Ignore the case where any of the above values equals zero; it is irrelevant
1324 * for our purposes (instanced arrays).
1325 *
1326 * Choose x = q. Then:
1327 *
1328 * (m * x) & (2^N - 1) = floor(x/q).
1329 * (m * q) & (2^N - 1) = floor(q/q).
1330 *
1331 * floor(q/q) = floor(1) = 1, therefore:
1332 *
1333 * (m * q) & (2^N - 1) = 1
1334 *
1335 * Recall the identity that the bitwise AND of one less than a power-of-two
1336 * equals the modulo with that power of two, i.e. for all x:
1337 *
1338 * x & (2^N - 1) = x % N
1339 *
1340 * Therefore:
1341 *
1342 * mq % (2^N) = 1
1343 *
1344 * By definition, a modular multiplicative inverse of a number m is the number
1345 * q such that with respect to a modulos M:
1346 *
1347 * mq % M = 1
1348 *
1349 * Therefore, q is the modular multiplicative inverse of m with modulus 2^N.
1350 *
1351 */
1352
1353 static void
1354 pandecode_magic_divisor(uint32_t magic, unsigned shift, unsigned orig_divisor, unsigned extra)
1355 {
1356 #if 0
1357 /* Compute the modular inverse of `magic` with respect to 2^(32 -
1358 * shift) the most lame way possible... just repeatedly add.
1359 * Asymptoptically slow but nobody cares in practice, unless you have
1360 * massive numbers of vertices or high divisors. */
1361
1362 unsigned inverse = 0;
1363
1364 /* Magic implicitly has the highest bit set */
1365 magic |= (1 << 31);
1366
1367 /* Depending on rounding direction */
1368 if (extra)
1369 magic++;
1370
1371 for (;;) {
1372 uint32_t product = magic * inverse;
1373
1374 if (shift) {
1375 product >>= shift;
1376 }
1377
1378 if (product == 1)
1379 break;
1380
1381 ++inverse;
1382 }
1383
1384 pandecode_msg("dividing by %d (maybe off by two)\n", inverse);
1385
1386 /* Recall we're supposed to divide by (gl_level_divisor *
1387 * padded_num_vertices) */
1388
1389 unsigned padded_num_vertices = inverse / orig_divisor;
1390
1391 pandecode_msg("padded_num_vertices = %d\n", padded_num_vertices);
1392 #endif
1393 }
1394
1395 static void
1396 pandecode_attributes(const struct pandecode_mapped_memory *mem,
1397 mali_ptr addr, int job_no, char *suffix,
1398 int count, bool varying, enum mali_job_type job_type)
1399 {
1400 char *prefix = varying ? "varying" : "attribute";
1401 assert(addr);
1402
1403 if (!count) {
1404 pandecode_msg("warn: No %s records\n", prefix);
1405 return;
1406 }
1407
1408 union mali_attr *attr = pandecode_fetch_gpu_mem(mem, addr, sizeof(union mali_attr) * count);
1409
1410 for (int i = 0; i < count; ++i) {
1411 /* First, check for special records */
1412 if (attr[i].elements < MALI_RECORD_SPECIAL) {
1413 if (attr[i].size)
1414 pandecode_msg("XXX: tripped size=%d\n", attr[i].size);
1415
1416 if (attr[i].stride) {
1417 /* gl_InstanceID passes a magic divisor in the
1418 * stride field to divide by the padded vertex
1419 * count. No other records should do so, so
1420 * stride should otherwise be zero. Note that
1421 * stride in the usual attribute sense doesn't
1422 * apply to special records. */
1423
1424 bool has_divisor = attr[i].elements == MALI_ATTR_INSTANCEID;
1425
1426 pandecode_log_cont("/* %smagic divisor = %X */ ",
1427 has_divisor ? "" : "XXX: ", attr[i].stride);
1428 }
1429
1430 if (attr[i].shift || attr[i].extra_flags) {
1431 /* Attributes use these fields for
1432 * instancing/padding/etc type issues, but
1433 * varyings don't */
1434
1435 pandecode_log_cont("/* %sshift=%d, extra=%d */ ",
1436 varying ? "XXX: " : "",
1437 attr[i].shift, attr[i].extra_flags);
1438 }
1439
1440 /* Print the special record name */
1441 bool attribute = false;
1442 pandecode_log("%s_%d = %s;\n", prefix, i, pandecode_special_record(attr[i].elements, &attribute));
1443
1444 /* Sanity check */
1445 if (attribute == varying)
1446 pandecode_msg("XXX: mismatched special record\n");
1447
1448 continue;
1449 }
1450
1451 enum mali_attr_mode mode = attr[i].elements & 7;
1452
1453 if (mode == MALI_ATTR_UNUSED)
1454 pandecode_msg("XXX: unused attribute record\n");
1455
1456 /* For non-linear records, we need to print the type of record */
1457 if (mode != MALI_ATTR_LINEAR)
1458 pandecode_log_cont("%s ", pandecode_attr_mode_short(mode));
1459
1460 /* Print the name to link with attr_meta */
1461 pandecode_log_cont("%s_%d", prefix, i);
1462
1463 /* Print the stride and size */
1464 pandecode_log_cont("<%u>[%u]", attr[i].stride, attr[i].size);
1465
1466 /* TODO: Sanity check the quotient itself. It must be equal to
1467 * (or be greater than, if the driver added padding) the padded
1468 * vertex count. */
1469
1470 /* Finally, print the pointer */
1471 mali_ptr raw_elements = attr[i].elements & ~7;
1472 char *a = pointer_as_memory_reference(raw_elements);
1473 pandecode_log_cont(" = (%s);\n", a);
1474 free(a);
1475
1476 /* Check the pointer */
1477 pandecode_validate_buffer(raw_elements, attr[i].size);
1478
1479 /* shift/extra_flags exist only for instanced */
1480 if (attr[i].shift | attr[i].extra_flags) {
1481 /* These are set to random values by the blob for
1482 * varyings, most likely a symptom of uninitialized
1483 * memory where the hardware masked the bug. As such we
1484 * put this at a warning, not an error. */
1485
1486 if (mode == MALI_ATTR_LINEAR)
1487 pandecode_msg("warn: instancing fields set for linear\n");
1488
1489 pandecode_prop("shift = %d", attr[i].shift);
1490 pandecode_prop("extra_flags = %d", attr[i].extra_flags);
1491 }
1492
1493 /* Decode further where possible */
1494
1495 if (mode == MALI_ATTR_MODULO) {
1496 pandecode_padded_vertices(
1497 attr[i].shift,
1498 attr[i].extra_flags);
1499 }
1500
1501 if (mode == MALI_ATTR_NPOT_DIVIDE) {
1502 i++;
1503 pandecode_log("{\n");
1504 pandecode_indent++;
1505 pandecode_prop("unk = 0x%x", attr[i].unk);
1506 pandecode_prop("magic_divisor = 0x%08x", attr[i].magic_divisor);
1507 if (attr[i].zero != 0)
1508 pandecode_prop("XXX: zero tripped (0x%x)\n", attr[i].zero);
1509 pandecode_prop("divisor = %d", attr[i].divisor);
1510 pandecode_magic_divisor(attr[i].magic_divisor, attr[i - 1].shift, attr[i].divisor, attr[i - 1].extra_flags);
1511 pandecode_indent--;
1512 pandecode_log("}, \n");
1513 }
1514
1515 }
1516
1517 pandecode_log("\n");
1518 }
1519
1520 static mali_ptr
1521 pandecode_shader_address(const char *name, mali_ptr ptr)
1522 {
1523 /* TODO: Decode flags */
1524 mali_ptr shader_ptr = ptr & ~15;
1525
1526 char *a = pointer_as_memory_reference(shader_ptr);
1527 pandecode_prop("%s = (%s) | %d", name, a, (int) (ptr & 15));
1528 free(a);
1529
1530 return shader_ptr;
1531 }
1532
1533 static void
1534 pandecode_blend_equation(const struct mali_blend_equation *blend)
1535 {
1536 if (blend->zero1)
1537 pandecode_msg("XXX: blend zero tripped: %X\n", blend->zero1);
1538
1539 pandecode_log(".equation = {\n");
1540 pandecode_indent++;
1541
1542 pandecode_prop("rgb_mode = 0x%X", blend->rgb_mode);
1543 pandecode_prop("alpha_mode = 0x%X", blend->alpha_mode);
1544
1545 pandecode_log(".color_mask = ");
1546 pandecode_log_decoded_flags(mask_flag_info, blend->color_mask);
1547 pandecode_log_cont(",\n");
1548
1549 pandecode_indent--;
1550 pandecode_log("},\n");
1551 }
1552
1553 /* Decodes a Bifrost blend constant. See the notes in bifrost_blend_rt */
1554
1555 static unsigned
1556 decode_bifrost_constant(u16 constant)
1557 {
1558 float lo = (float) (constant & 0xFF);
1559 float hi = (float) (constant >> 8);
1560
1561 return (hi / 255.0) + (lo / 65535.0);
1562 }
1563
1564 static mali_ptr
1565 pandecode_bifrost_blend(void *descs, int job_no, int rt_no)
1566 {
1567 struct bifrost_blend_rt *b =
1568 ((struct bifrost_blend_rt *) descs) + rt_no;
1569
1570 pandecode_log("struct bifrost_blend_rt blend_rt_%d_%d = {\n", job_no, rt_no);
1571 pandecode_indent++;
1572
1573 pandecode_prop("flags = 0x%" PRIx16, b->flags);
1574 pandecode_prop("constant = 0x%" PRIx8 " /* %f */",
1575 b->constant, decode_bifrost_constant(b->constant));
1576
1577 /* TODO figure out blend shader enable bit */
1578 pandecode_blend_equation(&b->equation);
1579
1580 pandecode_prop("unk2 = 0x%" PRIx16, b->unk2);
1581 pandecode_prop("index = 0x%" PRIx16, b->index);
1582
1583 pandecode_log(".format = ");
1584 pandecode_format_short(b->format, false);
1585 pandecode_swizzle(b->swizzle, b->format);
1586 pandecode_log_cont(",\n");
1587
1588 pandecode_prop("swizzle = 0x%" PRIx32, b->swizzle);
1589 pandecode_prop("format = 0x%" PRIx32, b->format);
1590
1591 if (b->zero1) {
1592 pandecode_msg("XXX: pandecode_bifrost_blend zero1 tripped\n");
1593 pandecode_prop("zero1 = 0x%" PRIx32, b->zero1);
1594 }
1595
1596 pandecode_log(".shader_type = ");
1597 switch(b->shader_type) {
1598 case BIFROST_BLEND_F16:
1599 pandecode_log_cont("BIFROST_BLEND_F16");
1600 break;
1601 case BIFROST_BLEND_F32:
1602 pandecode_log_cont("BIFROST_BLEND_F32");
1603 break;
1604 case BIFROST_BLEND_I32:
1605 pandecode_log_cont("BIFROST_BLEND_I32");
1606 break;
1607 case BIFROST_BLEND_U32:
1608 pandecode_log_cont("BIFROST_BLEND_U32");
1609 break;
1610 case BIFROST_BLEND_I16:
1611 pandecode_log_cont("BIFROST_BLEND_I16");
1612 break;
1613 case BIFROST_BLEND_U16:
1614 pandecode_log_cont("BIFROST_BLEND_U16");
1615 break;
1616 }
1617 pandecode_log_cont(",\n");
1618
1619 if (b->zero2) {
1620 pandecode_msg("XXX: pandecode_bifrost_blend zero2 tripped\n");
1621 pandecode_prop("zero2 = 0x%" PRIx32, b->zero2);
1622 }
1623
1624 pandecode_prop("shader = 0x%" PRIx32, b->shader);
1625
1626 pandecode_indent--;
1627 pandecode_log("},\n");
1628
1629 return 0;
1630 }
1631
1632 static mali_ptr
1633 pandecode_midgard_blend(union midgard_blend *blend, bool is_shader)
1634 {
1635 /* constant/equation is in a union */
1636 if (!blend->shader)
1637 return 0;
1638
1639 pandecode_log(".blend = {\n");
1640 pandecode_indent++;
1641
1642 if (is_shader) {
1643 pandecode_shader_address("shader", blend->shader);
1644 } else {
1645 pandecode_blend_equation(&blend->equation);
1646 pandecode_prop("constant = %f", blend->constant);
1647 }
1648
1649 pandecode_indent--;
1650 pandecode_log("},\n");
1651
1652 /* Return blend shader to disassemble if present */
1653 return is_shader ? (blend->shader & ~0xF) : 0;
1654 }
1655
1656 static mali_ptr
1657 pandecode_midgard_blend_mrt(void *descs, int job_no, int rt_no)
1658 {
1659 struct midgard_blend_rt *b =
1660 ((struct midgard_blend_rt *) descs) + rt_no;
1661
1662 /* Flags determine presence of blend shader */
1663 bool is_shader = (b->flags & 0xF) >= 0x2;
1664
1665 pandecode_log("struct midgard_blend_rt blend_rt_%d_%d = {\n", job_no, rt_no);
1666 pandecode_indent++;
1667
1668 pandecode_prop("flags = 0x%" PRIx64, b->flags);
1669
1670 union midgard_blend blend = b->blend;
1671 mali_ptr shader = pandecode_midgard_blend(&blend, is_shader);
1672
1673 pandecode_indent--;
1674 pandecode_log("};\n");
1675
1676 return shader;
1677 }
1678
1679 /* Attributes and varyings have descriptor records, which contain information
1680 * about their format and ordering with the attribute/varying buffers. We'll
1681 * want to validate that the combinations specified are self-consistent.
1682 */
1683
1684 static int
1685 pandecode_attribute_meta(int job_no, int count, const struct mali_vertex_tiler_postfix *v, bool varying, char *suffix)
1686 {
1687 char base[128];
1688 char *prefix = varying ? "varying" : "attribute";
1689 unsigned max_index = 0;
1690 snprintf(base, sizeof(base), "%s_meta", prefix);
1691
1692 struct mali_attr_meta *attr_meta;
1693 mali_ptr p = varying ? v->varying_meta : v->attribute_meta;
1694
1695 struct pandecode_mapped_memory *attr_mem = pandecode_find_mapped_gpu_mem_containing(p);
1696
1697 for (int i = 0; i < count; ++i, p += sizeof(struct mali_attr_meta)) {
1698 attr_meta = pandecode_fetch_gpu_mem(attr_mem, p,
1699 sizeof(*attr_mem));
1700
1701 /* If the record is discard, it should be zero for everything else */
1702
1703 if (attr_meta->format == MALI_VARYING_DISCARD) {
1704 uint64_t zero =
1705 attr_meta->index |
1706 attr_meta->unknown1 |
1707 attr_meta->unknown3 |
1708 attr_meta->src_offset;
1709
1710 if (zero)
1711 pandecode_msg("XXX: expected empty record for varying discard\n");
1712
1713 /* We want to look for a literal 0000 swizzle -- this
1714 * is not encoded with all zeroes, however */
1715
1716 enum mali_channel z = MALI_CHANNEL_ZERO;
1717 unsigned zero_swizzle = z | (z << 3) | (z << 6) | (z << 9);
1718 bool good_swizzle = attr_meta->swizzle == zero_swizzle;
1719
1720 if (!good_swizzle)
1721 pandecode_msg("XXX: expected zero swizzle for discard\n");
1722
1723 if (!varying)
1724 pandecode_msg("XXX: cannot discard attribute\n");
1725
1726 /* If we're all good, omit the record */
1727 if (!zero && varying && good_swizzle) {
1728 pandecode_log("/* discarded varying */\n");
1729 continue;
1730 }
1731 }
1732
1733 if (attr_meta->index > max_index)
1734 max_index = attr_meta->index;
1735
1736 if (attr_meta->unknown1 != 0x2) {
1737 pandecode_msg("XXX: expected unknown1 = 0x2\n");
1738 pandecode_prop("unknown1 = 0x%" PRIx64, (u64) attr_meta->unknown1);
1739 }
1740
1741 if (attr_meta->unknown3) {
1742 pandecode_msg("XXX: unexpected unknown3 set\n");
1743 pandecode_prop("unknown3 = 0x%" PRIx64, (u64) attr_meta->unknown3);
1744 }
1745
1746 pandecode_format_short(attr_meta->format, false);
1747 pandecode_log_cont(" %s_%u", prefix, attr_meta->index);
1748
1749 if (attr_meta->src_offset)
1750 pandecode_log_cont("[%u]", attr_meta->src_offset);
1751
1752 pandecode_swizzle(attr_meta->swizzle, attr_meta->format);
1753
1754 pandecode_log_cont(";\n");
1755 }
1756
1757 pandecode_log("\n");
1758
1759 return count ? (max_index + 1) : 0;
1760 }
1761
1762 /* return bits [lo, hi) of word */
1763 static u32
1764 bits(u32 word, u32 lo, u32 hi)
1765 {
1766 if (hi - lo >= 32)
1767 return word; // avoid undefined behavior with the shift
1768
1769 return (word >> lo) & ((1 << (hi - lo)) - 1);
1770 }
1771
1772 static void
1773 pandecode_vertex_tiler_prefix(struct mali_vertex_tiler_prefix *p, int job_no, bool graphics)
1774 {
1775 pandecode_log(".prefix = {\n");
1776 pandecode_indent++;
1777
1778 /* Decode invocation_count. See the comment before the definition of
1779 * invocation_count for an explanation.
1780 */
1781
1782 unsigned size_y_shift = bits(p->invocation_shifts, 0, 5);
1783 unsigned size_z_shift = bits(p->invocation_shifts, 5, 10);
1784 unsigned workgroups_x_shift = bits(p->invocation_shifts, 10, 16);
1785 unsigned workgroups_y_shift = bits(p->invocation_shifts, 16, 22);
1786 unsigned workgroups_z_shift = bits(p->invocation_shifts, 22, 28);
1787 unsigned workgroups_x_shift_2 = bits(p->invocation_shifts, 28, 32);
1788
1789 unsigned size_x = bits(p->invocation_count, 0, size_y_shift) + 1;
1790 unsigned size_y = bits(p->invocation_count, size_y_shift, size_z_shift) + 1;
1791 unsigned size_z = bits(p->invocation_count, size_z_shift, workgroups_x_shift) + 1;
1792
1793 unsigned groups_x = bits(p->invocation_count, workgroups_x_shift, workgroups_y_shift) + 1;
1794 unsigned groups_y = bits(p->invocation_count, workgroups_y_shift, workgroups_z_shift) + 1;
1795 unsigned groups_z = bits(p->invocation_count, workgroups_z_shift, 32) + 1;
1796
1797 /* Even though we have this decoded, we want to ensure that the
1798 * representation is "unique" so we don't lose anything by printing only
1799 * the final result. More specifically, we need to check that we were
1800 * passed something in canonical form, since the definition per the
1801 * hardware is inherently not unique. How? Well, take the resulting
1802 * decode and pack it ourselves! If it is bit exact with what we
1803 * decoded, we're good to go. */
1804
1805 struct mali_vertex_tiler_prefix ref;
1806 panfrost_pack_work_groups_compute(&ref, groups_x, groups_y, groups_z, size_x, size_y, size_z, graphics);
1807
1808 bool canonical =
1809 (p->invocation_count == ref.invocation_count) &&
1810 (p->invocation_shifts == ref.invocation_shifts);
1811
1812 if (!canonical) {
1813 pandecode_msg("XXX: non-canonical workgroups packing\n");
1814 pandecode_msg("expected: %X, %X",
1815 ref.invocation_count,
1816 ref.invocation_shifts);
1817
1818 pandecode_prop("invocation_count = 0x%" PRIx32, p->invocation_count);
1819 pandecode_prop("size_y_shift = %d", size_y_shift);
1820 pandecode_prop("size_z_shift = %d", size_z_shift);
1821 pandecode_prop("workgroups_x_shift = %d", workgroups_x_shift);
1822 pandecode_prop("workgroups_y_shift = %d", workgroups_y_shift);
1823 pandecode_prop("workgroups_z_shift = %d", workgroups_z_shift);
1824 pandecode_prop("workgroups_x_shift_2 = %d", workgroups_x_shift_2);
1825 }
1826
1827 /* Regardless, print the decode */
1828 pandecode_msg("size (%d, %d, %d), count (%d, %d, %d)\n",
1829 size_x, size_y, size_z,
1830 groups_x, groups_y, groups_z);
1831
1832 /* TODO: Decode */
1833 if (p->unknown_draw)
1834 pandecode_prop("unknown_draw = 0x%" PRIx32, p->unknown_draw);
1835
1836 pandecode_prop("workgroups_x_shift_3 = 0x%" PRIx32, p->workgroups_x_shift_3);
1837
1838 if (p->draw_mode != MALI_DRAW_MODE_NONE)
1839 pandecode_prop("draw_mode = %s", mali_draw_mode_as_str(p->draw_mode));
1840
1841 /* Index count only exists for tiler jobs anyway */
1842
1843 if (p->index_count)
1844 pandecode_prop("index_count = MALI_POSITIVE(%" PRId32 ")", p->index_count + 1);
1845
1846
1847 unsigned index_raw_size = (p->unknown_draw & MALI_DRAW_INDEXED_SIZE);
1848 index_raw_size >>= MALI_DRAW_INDEXED_SHIFT;
1849
1850 /* Validate an index buffer is present if we need one. TODO: verify
1851 * relationship between invocation_count and index_count */
1852
1853 if (p->indices) {
1854 unsigned count = p->index_count;
1855
1856 /* Grab the size */
1857 unsigned size = (index_raw_size == 0x3) ? 4 : index_raw_size;
1858
1859 /* Ensure we got a size, and if so, validate the index buffer
1860 * is large enough to hold a full set of indices of the given
1861 * size */
1862
1863 if (!index_raw_size)
1864 pandecode_msg("XXX: index size missing\n");
1865 else
1866 pandecode_validate_buffer(p->indices, count * size);
1867 } else if (index_raw_size)
1868 pandecode_msg("XXX: unexpected index size %u\n", index_raw_size);
1869
1870 if (p->offset_bias_correction)
1871 pandecode_prop("offset_bias_correction = %d", p->offset_bias_correction);
1872
1873 /* TODO: Figure out what this is. It's not zero */
1874 pandecode_prop("zero1 = 0x%" PRIx32, p->zero1);
1875
1876 pandecode_indent--;
1877 pandecode_log("},\n");
1878 }
1879
1880 static void
1881 pandecode_uniform_buffers(mali_ptr pubufs, int ubufs_count, int job_no)
1882 {
1883 struct pandecode_mapped_memory *umem = pandecode_find_mapped_gpu_mem_containing(pubufs);
1884 uint64_t *PANDECODE_PTR_VAR(ubufs, umem, pubufs);
1885
1886 for (int i = 0; i < ubufs_count; i++) {
1887 unsigned size = (ubufs[i] & ((1 << 10) - 1)) * 16;
1888 mali_ptr addr = (ubufs[i] >> 10) << 2;
1889
1890 pandecode_validate_buffer(addr, size);
1891
1892 char *ptr = pointer_as_memory_reference(addr);
1893 pandecode_log("ubuf_%d[%u] = %s;\n", i, size, ptr);
1894 free(ptr);
1895 }
1896
1897 pandecode_log("\n");
1898 }
1899
1900 static void
1901 pandecode_uniforms(mali_ptr uniforms, unsigned uniform_count)
1902 {
1903 pandecode_validate_buffer(uniforms, uniform_count * 16);
1904
1905 char *ptr = pointer_as_memory_reference(uniforms);
1906 pandecode_log("vec4 uniforms[%u] = %s;\n", uniform_count, ptr);
1907 free(ptr);
1908 }
1909
1910 static const char *
1911 shader_type_for_job(unsigned type)
1912 {
1913 switch (type) {
1914 case MALI_JOB_TYPE_VERTEX: return "VERTEX";
1915 case MALI_JOB_TYPE_TILER: return "FRAGMENT";
1916 case MALI_JOB_TYPE_COMPUTE: return "COMPUTE";
1917 default:
1918 return "UNKNOWN";
1919 }
1920 }
1921
1922 static unsigned shader_id = 0;
1923
1924 static struct midgard_disasm_stats
1925 pandecode_shader_disassemble(mali_ptr shader_ptr, int shader_no, int type,
1926 bool is_bifrost, unsigned gpu_id)
1927 {
1928 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(shader_ptr);
1929 uint8_t *PANDECODE_PTR_VAR(code, mem, shader_ptr);
1930
1931 /* Compute maximum possible size */
1932 size_t sz = mem->length - (shader_ptr - mem->gpu_va);
1933
1934 /* Print some boilerplate to clearly denote the assembly (which doesn't
1935 * obey indentation rules), and actually do the disassembly! */
1936
1937 pandecode_log_cont("\n\n");
1938
1939 struct midgard_disasm_stats stats;
1940
1941 if (is_bifrost) {
1942 disassemble_bifrost(pandecode_dump_stream, code, sz, true);
1943
1944 /* TODO: Extend stats to Bifrost */
1945 stats.texture_count = -128;
1946 stats.sampler_count = -128;
1947 stats.attribute_count = -128;
1948 stats.varying_count = -128;
1949 stats.uniform_count = -128;
1950 stats.uniform_buffer_count = -128;
1951 stats.work_count = -128;
1952
1953 stats.instruction_count = 0;
1954 stats.bundle_count = 0;
1955 stats.quadword_count = 0;
1956 stats.helper_invocations = false;
1957 } else {
1958 stats = disassemble_midgard(pandecode_dump_stream,
1959 code, sz, gpu_id,
1960 type == MALI_JOB_TYPE_TILER ?
1961 MESA_SHADER_FRAGMENT : MESA_SHADER_VERTEX);
1962 }
1963
1964 /* Print shader-db stats. Skip COMPUTE jobs since they are used for
1965 * driver-internal purposes with the blob and interfere */
1966
1967 bool should_shaderdb = type != MALI_JOB_TYPE_COMPUTE;
1968
1969 if (should_shaderdb) {
1970 unsigned nr_threads =
1971 (stats.work_count <= 4) ? 4 :
1972 (stats.work_count <= 8) ? 2 :
1973 1;
1974
1975 pandecode_log_cont("shader%d - MESA_SHADER_%s shader: "
1976 "%u inst, %u bundles, %u quadwords, "
1977 "%u registers, %u threads, 0 loops, 0:0 spills:fills\n\n\n",
1978 shader_id++,
1979 shader_type_for_job(type),
1980 stats.instruction_count, stats.bundle_count, stats.quadword_count,
1981 stats.work_count, nr_threads);
1982 }
1983
1984
1985 return stats;
1986 }
1987
1988 static void
1989 pandecode_texture_payload(mali_ptr payload,
1990 enum mali_texture_dimension dim,
1991 enum mali_texture_layout layout,
1992 bool manual_stride,
1993 uint8_t levels,
1994 uint16_t depth,
1995 uint16_t array_size,
1996 struct pandecode_mapped_memory *tmem)
1997 {
1998 pandecode_log(".payload = {\n");
1999 pandecode_indent++;
2000
2001 /* A bunch of bitmap pointers follow.
2002 * We work out the correct number,
2003 * based on the mipmap/cubemap
2004 * properties, but dump extra
2005 * possibilities to futureproof */
2006
2007 int bitmap_count = levels + 1;
2008
2009 /* Miptree for each face */
2010 if (dim == MALI_TEXTURE_DIMENSION_CUBE)
2011 bitmap_count *= 6;
2012
2013 /* Array of layers */
2014 bitmap_count *= depth;
2015
2016 /* Array of textures */
2017 bitmap_count *= array_size;
2018
2019 /* Stride for each element */
2020 if (manual_stride)
2021 bitmap_count *= 2;
2022
2023 mali_ptr *pointers_and_strides = pandecode_fetch_gpu_mem(tmem,
2024 payload, sizeof(mali_ptr) * bitmap_count);
2025 for (int i = 0; i < bitmap_count; ++i) {
2026 /* How we dump depends if this is a stride or a pointer */
2027
2028 if (manual_stride && (i & 1)) {
2029 /* signed 32-bit snuck in as a 64-bit pointer */
2030 uint64_t stride_set = pointers_and_strides[i];
2031 uint32_t clamped_stride = stride_set;
2032 int32_t stride = clamped_stride;
2033 assert(stride_set == clamped_stride);
2034 pandecode_log("(mali_ptr) %d /* stride */, \n", stride);
2035 } else {
2036 char *a = pointer_as_memory_reference(pointers_and_strides[i]);
2037 pandecode_log("%s, \n", a);
2038 free(a);
2039 }
2040 }
2041
2042 pandecode_indent--;
2043 pandecode_log("},\n");
2044 }
2045
2046 static void
2047 pandecode_texture(mali_ptr u,
2048 struct pandecode_mapped_memory *tmem,
2049 unsigned job_no, unsigned tex)
2050 {
2051 struct pandecode_mapped_memory *mapped_mem = pandecode_find_mapped_gpu_mem_containing(u);
2052 const uint8_t *cl = pandecode_fetch_gpu_mem(mapped_mem, u, MALI_MIDGARD_TEXTURE_LENGTH);
2053
2054 struct MALI_MIDGARD_TEXTURE temp;
2055 MALI_MIDGARD_TEXTURE_unpack(cl, &temp);
2056 MALI_MIDGARD_TEXTURE_print(pandecode_dump_stream, &temp, 2);
2057
2058 pandecode_texture_payload(u + MALI_MIDGARD_TEXTURE_LENGTH,
2059 temp.dimension, temp.texel_ordering, temp.manual_stride,
2060 temp.levels, temp.depth, temp.array_size, mapped_mem);
2061 }
2062
2063 static void
2064 pandecode_bifrost_texture(
2065 const void *cl,
2066 unsigned job_no,
2067 unsigned tex)
2068 {
2069 struct MALI_BIFROST_TEXTURE temp;
2070 MALI_BIFROST_TEXTURE_unpack(cl, &temp);
2071 MALI_BIFROST_TEXTURE_print(pandecode_dump_stream, &temp, 2);
2072
2073 struct pandecode_mapped_memory *tmem = pandecode_find_mapped_gpu_mem_containing(temp.surfaces);
2074 pandecode_texture_payload(temp.surfaces, temp.dimension, temp.texel_ordering,
2075 true, temp.levels, 1, 1, tmem);
2076 }
2077
2078 /* For shader properties like texture_count, we have a claimed property in the shader_meta, and the actual Truth from static analysis (this may just be an upper limit). We validate accordingly */
2079
2080 static void
2081 pandecode_shader_prop(const char *name, unsigned claim, signed truth, bool fuzzy)
2082 {
2083 /* Nothing to do */
2084 if (claim == truth)
2085 return;
2086
2087 if (fuzzy && (truth < 0))
2088 pandecode_msg("XXX: fuzzy %s, claimed %d, expected %d\n", name, claim, truth);
2089
2090 if ((truth >= 0) && !fuzzy) {
2091 pandecode_msg("%s: expected %s = %d, claimed %u\n",
2092 (truth < claim) ? "warn" : "XXX",
2093 name, truth, claim);
2094 } else if ((claim > -truth) && !fuzzy) {
2095 pandecode_msg("XXX: expected %s <= %u, claimed %u\n",
2096 name, -truth, claim);
2097 } else if (fuzzy && (claim < truth))
2098 pandecode_msg("XXX: expected %s >= %u, claimed %u\n",
2099 name, truth, claim);
2100
2101 pandecode_log(".%s = %" PRId16, name, claim);
2102
2103 if (fuzzy)
2104 pandecode_log_cont(" /* %u used */", truth);
2105
2106 pandecode_log_cont(",\n");
2107 }
2108
2109 static void
2110 pandecode_blend_shader_disassemble(mali_ptr shader, int job_no, int job_type,
2111 bool is_bifrost, unsigned gpu_id)
2112 {
2113 struct midgard_disasm_stats stats =
2114 pandecode_shader_disassemble(shader, job_no, job_type, is_bifrost, gpu_id);
2115
2116 bool has_texture = (stats.texture_count > 0);
2117 bool has_sampler = (stats.sampler_count > 0);
2118 bool has_attribute = (stats.attribute_count > 0);
2119 bool has_varying = (stats.varying_count > 0);
2120 bool has_uniform = (stats.uniform_count > 0);
2121 bool has_ubo = (stats.uniform_buffer_count > 0);
2122
2123 if (has_texture || has_sampler)
2124 pandecode_msg("XXX: blend shader accessing textures\n");
2125
2126 if (has_attribute || has_varying)
2127 pandecode_msg("XXX: blend shader accessing interstage\n");
2128
2129 if (has_uniform || has_ubo)
2130 pandecode_msg("XXX: blend shader accessing uniforms\n");
2131 }
2132
2133 static void
2134 pandecode_textures(mali_ptr textures, unsigned texture_count, int job_no, bool is_bifrost)
2135 {
2136 struct pandecode_mapped_memory *mmem = pandecode_find_mapped_gpu_mem_containing(textures);
2137
2138 if (!mmem)
2139 return;
2140
2141 pandecode_log("Textures (%"PRIx64"):\n", textures);
2142
2143 if (is_bifrost) {
2144 const void *cl = pandecode_fetch_gpu_mem(mmem,
2145 textures, MALI_BIFROST_TEXTURE_LENGTH *
2146 texture_count);
2147
2148 for (unsigned tex = 0; tex < texture_count; ++tex) {
2149 pandecode_bifrost_texture(cl +
2150 MALI_BIFROST_TEXTURE_LENGTH * tex,
2151 job_no, tex);
2152 }
2153 } else {
2154 mali_ptr *PANDECODE_PTR_VAR(u, mmem, textures);
2155
2156 for (int tex = 0; tex < texture_count; ++tex) {
2157 mali_ptr *PANDECODE_PTR_VAR(u, mmem, textures + tex * sizeof(mali_ptr));
2158 char *a = pointer_as_memory_reference(*u);
2159 pandecode_log("%s,\n", a);
2160 free(a);
2161 }
2162
2163 /* Now, finally, descend down into the texture descriptor */
2164 for (unsigned tex = 0; tex < texture_count; ++tex) {
2165 mali_ptr *PANDECODE_PTR_VAR(u, mmem, textures + tex * sizeof(mali_ptr));
2166 struct pandecode_mapped_memory *tmem = pandecode_find_mapped_gpu_mem_containing(*u);
2167 if (tmem)
2168 pandecode_texture(*u, tmem, job_no, tex);
2169 }
2170 }
2171 }
2172
2173 static void
2174 pandecode_samplers(mali_ptr samplers, unsigned sampler_count, int job_no, bool is_bifrost)
2175 {
2176 for (int i = 0; i < sampler_count; ++i) {
2177 if (is_bifrost) {
2178 DUMP_ADDR("Sampler", BIFROST_SAMPLER, samplers + (MALI_BIFROST_SAMPLER_LENGTH * i), 1);
2179 } else {
2180 DUMP_ADDR("Sampler", MIDGARD_SAMPLER, samplers + (MALI_MIDGARD_SAMPLER_LENGTH * i), 1);
2181 }
2182 }
2183 }
2184
2185 static void
2186 pandecode_vertex_tiler_postfix_pre(
2187 const struct mali_vertex_tiler_postfix *p,
2188 int job_no, enum mali_job_type job_type,
2189 char *suffix, bool is_bifrost, unsigned gpu_id)
2190 {
2191 struct pandecode_mapped_memory *attr_mem;
2192
2193 /* On Bifrost, since the tiler heap (for tiler jobs) and the scratchpad
2194 * are the only things actually needed from the FBD, vertex/tiler jobs
2195 * no longer reference the FBD -- instead, this field points to some
2196 * info about the scratchpad.
2197 */
2198
2199 struct pandecode_fbd fbd_info = {
2200 /* Default for Bifrost */
2201 .rt_count = 1
2202 };
2203
2204 if (is_bifrost) {
2205 pandecode_log_cont("\t/* %X %/\n", p->shared_memory & 1);
2206 pandecode_compute_fbd(p->shared_memory & ~1, job_no);
2207 } else if (p->shared_memory & MALI_MFBD)
2208 fbd_info = pandecode_mfbd_bfr((u64) ((uintptr_t) p->shared_memory) & FBD_MASK, job_no, false, job_type == MALI_JOB_TYPE_COMPUTE, false);
2209 else if (job_type == MALI_JOB_TYPE_COMPUTE)
2210 pandecode_compute_fbd((u64) (uintptr_t) p->shared_memory, job_no);
2211 else
2212 fbd_info = pandecode_sfbd((u64) (uintptr_t) p->shared_memory, job_no, false, gpu_id);
2213
2214 int varying_count = 0, attribute_count = 0, uniform_count = 0, uniform_buffer_count = 0;
2215 int texture_count = 0, sampler_count = 0;
2216
2217 if (p->shader) {
2218 struct pandecode_mapped_memory *smem = pandecode_find_mapped_gpu_mem_containing(p->shader);
2219 struct mali_shader_meta *PANDECODE_PTR_VAR(s, smem, p->shader);
2220
2221 /* Disassemble ahead-of-time to get stats. Initialize with
2222 * stats for the missing-shader case so we get validation
2223 * there, too */
2224
2225 struct midgard_disasm_stats info = {
2226 .texture_count = 0,
2227 .sampler_count = 0,
2228 .attribute_count = 0,
2229 .varying_count = 0,
2230 .work_count = 1,
2231
2232 .uniform_count = -128,
2233 .uniform_buffer_count = 0
2234 };
2235
2236 if (s->shader & ~0xF)
2237 info = pandecode_shader_disassemble(s->shader & ~0xF, job_no, job_type, is_bifrost, gpu_id);
2238
2239 pandecode_log("struct mali_shader_meta shader_meta_%"PRIx64"_%d%s = {\n", p->shader, job_no, suffix);
2240 pandecode_indent++;
2241
2242 /* Save for dumps */
2243 attribute_count = s->attribute_count;
2244 varying_count = s->varying_count;
2245 texture_count = s->texture_count;
2246 sampler_count = s->sampler_count;
2247
2248 if (is_bifrost) {
2249 uniform_count = s->bifrost2.uniform_count;
2250 uniform_buffer_count = s->bifrost1.uniform_buffer_count;
2251 } else {
2252 uniform_count = s->midgard1.uniform_count;
2253 uniform_buffer_count = s->midgard1.uniform_buffer_count;
2254 }
2255
2256 pandecode_shader_address("shader", s->shader);
2257
2258 pandecode_shader_prop("texture_count", s->texture_count, info.texture_count, false);
2259 pandecode_shader_prop("sampler_count", s->sampler_count, info.sampler_count, false);
2260 pandecode_shader_prop("attribute_count", s->attribute_count, info.attribute_count, false);
2261 pandecode_shader_prop("varying_count", s->varying_count, info.varying_count, false);
2262 pandecode_shader_prop("uniform_buffer_count",
2263 uniform_buffer_count,
2264 info.uniform_buffer_count, true);
2265
2266 if (!is_bifrost) {
2267 pandecode_shader_prop("uniform_count",
2268 uniform_count,
2269 info.uniform_count, false);
2270
2271 pandecode_shader_prop("work_count",
2272 s->midgard1.work_count, info.work_count, false);
2273 }
2274
2275 if (is_bifrost) {
2276 pandecode_log("bifrost1.unk1 = ");
2277 pandecode_log_decoded_flags(shader_bifrost_info, s->bifrost1.unk1);
2278 pandecode_log_cont(",\n");
2279 } else {
2280 bool helpers = s->midgard1.flags_lo & MALI_HELPER_INVOCATIONS;
2281
2282 if (helpers != info.helper_invocations) {
2283 pandecode_msg("XXX: expected helpers %u but got %u\n",
2284 info.helper_invocations, helpers);
2285 }
2286
2287 pandecode_log(".midgard1.flags_lo = ");
2288 pandecode_log_decoded_flags(shader_midgard1_flag_lo_info,
2289 s->midgard1.flags_lo & ~MALI_HELPER_INVOCATIONS);
2290 pandecode_log_cont(",\n");
2291
2292 pandecode_log(".midgard1.flags_hi = ");
2293 pandecode_log_decoded_flags(shader_midgard1_flag_hi_info, s->midgard1.flags_hi);
2294 pandecode_log_cont(",\n");
2295 }
2296
2297 if (s->depth_units || s->depth_factor) {
2298 pandecode_prop("depth_factor = %f", s->depth_factor);
2299 pandecode_prop("depth_units = %f", s->depth_units);
2300 }
2301
2302 if (s->coverage_mask)
2303 pandecode_prop("coverage_mask = 0x%X", s->coverage_mask);
2304
2305 if (s->unknown2_2)
2306 pandecode_prop(".unknown2_2 = %X", s->unknown2_2);
2307
2308 if (s->unknown2_3 || s->unknown2_4) {
2309 pandecode_log(".unknown2_3 = ");
2310
2311 int unknown2_3 = s->unknown2_3;
2312 int unknown2_4 = s->unknown2_4;
2313
2314 /* We're not quite sure what these flags mean without the depth test, if anything */
2315
2316 if (unknown2_3 & (MALI_DEPTH_WRITEMASK | MALI_DEPTH_FUNC_MASK)) {
2317 const char *func = mali_func_as_str(MALI_GET_DEPTH_FUNC(unknown2_3));
2318 unknown2_3 &= ~MALI_DEPTH_FUNC_MASK;
2319
2320 pandecode_log_cont("MALI_DEPTH_FUNC(%s) | ", func);
2321 }
2322
2323 pandecode_log_decoded_flags(u3_flag_info, unknown2_3);
2324 pandecode_log_cont(",\n");
2325
2326 pandecode_log(".unknown2_4 = ");
2327 pandecode_log_decoded_flags(u4_flag_info, unknown2_4);
2328 pandecode_log_cont(",\n");
2329 }
2330
2331 if (s->stencil_mask_front || s->stencil_mask_back) {
2332 pandecode_prop("stencil_mask_front = 0x%02X", s->stencil_mask_front);
2333 pandecode_prop("stencil_mask_back = 0x%02X", s->stencil_mask_back);
2334 }
2335
2336 DUMP_CL("Stencil front", STENCIL, &s->stencil_front, 1);
2337 DUMP_CL("Stencil back", STENCIL, &s->stencil_back, 1);
2338
2339 if (is_bifrost) {
2340 pandecode_log(".bifrost2 = {\n");
2341 pandecode_indent++;
2342
2343 pandecode_prop("unk3 = 0x%" PRIx32, s->bifrost2.unk3);
2344 pandecode_prop("preload_regs = 0x%" PRIx32, s->bifrost2.preload_regs);
2345 pandecode_prop("uniform_count = %" PRId32, s->bifrost2.uniform_count);
2346 pandecode_prop("unk4 = 0x%" PRIx32, s->bifrost2.unk4);
2347
2348 pandecode_indent--;
2349 pandecode_log("},\n");
2350 } else if (s->midgard2.unknown2_7) {
2351 pandecode_log(".midgard2 = {\n");
2352 pandecode_indent++;
2353
2354 pandecode_prop("unknown2_7 = 0x%" PRIx32, s->midgard2.unknown2_7);
2355 pandecode_indent--;
2356 pandecode_log("},\n");
2357 }
2358
2359 if (s->padding) {
2360 pandecode_msg("XXX: shader padding tripped\n");
2361 pandecode_prop("padding = 0x%" PRIx32, s->padding);
2362 }
2363
2364 if (!is_bifrost) {
2365 /* TODO: Blend shaders routing/disasm */
2366 union midgard_blend blend = s->blend;
2367 mali_ptr shader = pandecode_midgard_blend(&blend, s->unknown2_3 & MALI_HAS_BLEND_SHADER);
2368 if (shader & ~0xF)
2369 pandecode_blend_shader_disassemble(shader, job_no, job_type, false, gpu_id);
2370 } else {
2371 pandecode_msg("mdg_blend = %" PRIx64 "\n", s->blend.shader);
2372 }
2373
2374 pandecode_indent--;
2375 pandecode_log("};\n");
2376
2377 /* MRT blend fields are used whenever MFBD is used, with
2378 * per-RT descriptors */
2379
2380 if (job_type == MALI_JOB_TYPE_TILER && (is_bifrost || p->shared_memory & MALI_MFBD)) {
2381 void* blend_base = (void *) (s + 1);
2382
2383 for (unsigned i = 0; i < fbd_info.rt_count; i++) {
2384 mali_ptr shader = 0;
2385
2386 if (is_bifrost)
2387 shader = pandecode_bifrost_blend(blend_base, job_no, i);
2388 else
2389 shader = pandecode_midgard_blend_mrt(blend_base, job_no, i);
2390
2391 if (shader & ~0xF)
2392 pandecode_blend_shader_disassemble(shader, job_no, job_type, false, gpu_id);
2393
2394 }
2395 }
2396 } else
2397 pandecode_msg("XXX: missing shader descriptor\n");
2398
2399 if (p->viewport)
2400 DUMP_ADDR("Viewport", VIEWPORT, p->viewport, 1);
2401
2402 unsigned max_attr_index = 0;
2403
2404 if (p->attribute_meta)
2405 max_attr_index = pandecode_attribute_meta(job_no, attribute_count, p, false, suffix);
2406
2407 if (p->attributes) {
2408 attr_mem = pandecode_find_mapped_gpu_mem_containing(p->attributes);
2409 pandecode_attributes(attr_mem, p->attributes, job_no, suffix, max_attr_index, false, job_type);
2410 }
2411
2412 /* Varyings are encoded like attributes but not actually sent; we just
2413 * pass a zero buffer with the right stride/size set, (or whatever)
2414 * since the GPU will write to it itself */
2415
2416 if (p->varying_meta) {
2417 varying_count = pandecode_attribute_meta(job_no, varying_count, p, true, suffix);
2418 }
2419
2420 if (p->varyings) {
2421 attr_mem = pandecode_find_mapped_gpu_mem_containing(p->varyings);
2422
2423 /* Number of descriptors depends on whether there are
2424 * non-internal varyings */
2425
2426 pandecode_attributes(attr_mem, p->varyings, job_no, suffix, varying_count, true, job_type);
2427 }
2428
2429 if (p->uniform_buffers) {
2430 if (uniform_buffer_count)
2431 pandecode_uniform_buffers(p->uniform_buffers, uniform_buffer_count, job_no);
2432 else
2433 pandecode_msg("warn: UBOs specified but not referenced\n");
2434 } else if (uniform_buffer_count)
2435 pandecode_msg("XXX: UBOs referenced but not specified\n");
2436
2437 /* We don't want to actually dump uniforms, but we do need to validate
2438 * that the counts we were given are sane */
2439
2440 if (p->uniforms) {
2441 if (uniform_count)
2442 pandecode_uniforms(p->uniforms, uniform_count);
2443 else
2444 pandecode_msg("warn: Uniforms specified but not referenced\n");
2445 } else if (uniform_count)
2446 pandecode_msg("XXX: Uniforms referenced but not specified\n");
2447
2448 if (p->textures)
2449 pandecode_textures(p->textures, texture_count, job_no, is_bifrost);
2450
2451 if (p->sampler_descriptor)
2452 pandecode_samplers(p->sampler_descriptor, sampler_count, job_no, is_bifrost);
2453 }
2454
2455 static void
2456 pandecode_gl_enables(uint32_t gl_enables, int job_type)
2457 {
2458 pandecode_log(".gl_enables = ");
2459
2460 pandecode_log_decoded_flags(gl_enable_flag_info, gl_enables);
2461
2462 pandecode_log_cont(",\n");
2463 }
2464
2465 static void
2466 pandecode_vertex_tiler_postfix(const struct mali_vertex_tiler_postfix *p, int job_no, bool is_bifrost)
2467 {
2468 if (p->shader & 0xF)
2469 pandecode_msg("warn: shader tagged %X\n", (unsigned) (p->shader & 0xF));
2470
2471 pandecode_log(".postfix = {\n");
2472 pandecode_indent++;
2473
2474 pandecode_gl_enables(p->gl_enables, MALI_JOB_TYPE_TILER);
2475 pandecode_prop("instance_shift = 0x%x", p->instance_shift);
2476 pandecode_prop("instance_odd = 0x%x", p->instance_odd);
2477
2478 if (p->zero4) {
2479 pandecode_msg("XXX: vertex only zero tripped");
2480 pandecode_prop("zero4 = 0x%" PRIx32, p->zero4);
2481 }
2482
2483 pandecode_prop("offset_start = 0x%x", p->offset_start);
2484
2485 if (p->zero5) {
2486 pandecode_msg("XXX: vertex only zero tripped");
2487 pandecode_prop("zero5 = 0x%" PRIx64, p->zero5);
2488 }
2489
2490 MEMORY_PROP(p, position_varying);
2491 MEMORY_PROP(p, occlusion_counter);
2492
2493 pandecode_indent--;
2494 pandecode_log("},\n");
2495 }
2496
2497 static void
2498 pandecode_tiler_heap_meta(mali_ptr gpu_va, int job_no)
2499 {
2500 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
2501 const struct bifrost_tiler_heap_meta *PANDECODE_PTR_VAR(h, mem, gpu_va);
2502
2503 pandecode_log("struct bifrost_tiler_heap_meta tiler_heap_meta_%"PRIx64"_%d = {\n", gpu_va, job_no);
2504 pandecode_indent++;
2505
2506 if (h->zero) {
2507 pandecode_msg("XXX: tiler heap zero tripped\n");
2508 pandecode_prop("zero = 0x%x", h->zero);
2509 }
2510
2511 pandecode_prop("heap_size = 0x%x", h->heap_size);
2512 MEMORY_PROP(h, tiler_heap_start);
2513 MEMORY_PROP(h, tiler_heap_free);
2514
2515 /* this might point to the beginning of another buffer, when it's
2516 * really the end of the tiler heap buffer, so we have to be careful
2517 * here. but for zero length, we need the same pointer.
2518 */
2519
2520 if (h->tiler_heap_end == h->tiler_heap_start) {
2521 MEMORY_PROP(h, tiler_heap_start);
2522 } else {
2523 char *a = pointer_as_memory_reference(h->tiler_heap_end - 1);
2524 pandecode_prop("tiler_heap_end = %s + 1", a);
2525 free(a);
2526 }
2527
2528 for (int i = 0; i < 10; i++) {
2529 if (h->zeros[i] != 0) {
2530 pandecode_msg("XXX: tiler heap zero %d tripped, value %x\n",
2531 i, h->zeros[i]);
2532 }
2533 }
2534
2535 if (h->unk1 != 0x1) {
2536 pandecode_msg("XXX: tiler heap unk1 tripped\n");
2537 pandecode_prop("unk1 = 0x%x", h->unk1);
2538 }
2539
2540 if (h->unk7e007e != 0x7e007e) {
2541 pandecode_msg("XXX: tiler heap unk7e007e tripped\n");
2542 pandecode_prop("unk7e007e = 0x%x", h->unk7e007e);
2543 }
2544
2545 pandecode_indent--;
2546 pandecode_log("};\n");
2547 }
2548
2549 static void
2550 pandecode_tiler_meta(mali_ptr gpu_va, int job_no)
2551 {
2552 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
2553 const struct bifrost_tiler_meta *PANDECODE_PTR_VAR(t, mem, gpu_va);
2554
2555 pandecode_tiler_heap_meta(t->tiler_heap_meta, job_no);
2556
2557 pandecode_log("struct bifrost_tiler_meta tiler_meta_%"PRIx64"_%d = {\n", gpu_va, job_no);
2558 pandecode_indent++;
2559
2560 pandecode_prop("tiler_heap_next_start = 0x%" PRIx32, t->tiler_heap_next_start);
2561 pandecode_prop("used_hierarchy_mask = 0x%" PRIx32, t->used_hierarchy_mask);
2562
2563 if (t->hierarchy_mask != 0xa &&
2564 t->hierarchy_mask != 0x14 &&
2565 t->hierarchy_mask != 0x28 &&
2566 t->hierarchy_mask != 0x50 &&
2567 t->hierarchy_mask != 0xa0)
2568 pandecode_prop("XXX: Unexpected hierarchy_mask (not 0xa, 0x14, 0x28, 0x50 or 0xa0)!");
2569
2570 pandecode_prop("hierarchy_mask = 0x%" PRIx16, t->hierarchy_mask);
2571
2572 pandecode_prop("flags = 0x%" PRIx16, t->flags);
2573
2574 pandecode_prop("width = MALI_POSITIVE(%d)", t->width + 1);
2575 pandecode_prop("height = MALI_POSITIVE(%d)", t->height + 1);
2576
2577 if (t->zero0) {
2578 pandecode_msg("XXX: tiler meta zero tripped\n");
2579 pandecode_prop("zero0 = 0x%" PRIx64, t->zero0);
2580 }
2581
2582 for (int i = 0; i < 12; i++) {
2583 if (t->zeros[i] != 0) {
2584 pandecode_msg("XXX: tiler heap zero %d tripped, value %" PRIx64 "\n",
2585 i, t->zeros[i]);
2586 }
2587 }
2588
2589 pandecode_indent--;
2590 pandecode_log("};\n");
2591 }
2592
2593 static void
2594 pandecode_primitive_size(union midgard_primitive_size u, bool constant)
2595 {
2596 if (u.pointer == 0x0)
2597 return;
2598
2599 pandecode_log(".primitive_size = {\n");
2600 pandecode_indent++;
2601
2602 if (constant) {
2603 pandecode_prop("constant = %f", u.constant);
2604 } else {
2605 MEMORY_PROP((&u), pointer);
2606 }
2607
2608 pandecode_indent--;
2609 pandecode_log("},\n");
2610 }
2611
2612 static void
2613 pandecode_tiler_only_bfr(const struct bifrost_tiler_only *t, int job_no)
2614 {
2615 pandecode_log_cont("{\n");
2616 pandecode_indent++;
2617
2618 /* TODO: gl_PointSize on Bifrost */
2619 pandecode_primitive_size(t->primitive_size, true);
2620
2621 if (t->zero1 || t->zero2 || t->zero3 || t->zero4 || t->zero5
2622 || t->zero6) {
2623 pandecode_msg("XXX: tiler only zero tripped\n");
2624 pandecode_prop("zero1 = 0x%" PRIx64, t->zero1);
2625 pandecode_prop("zero2 = 0x%" PRIx64, t->zero2);
2626 pandecode_prop("zero3 = 0x%" PRIx64, t->zero3);
2627 pandecode_prop("zero4 = 0x%" PRIx64, t->zero4);
2628 pandecode_prop("zero5 = 0x%" PRIx64, t->zero5);
2629 pandecode_prop("zero6 = 0x%" PRIx64, t->zero6);
2630 }
2631
2632 pandecode_indent--;
2633 pandecode_log("},\n");
2634 }
2635
2636 static int
2637 pandecode_vertex_job_bfr(const struct mali_job_descriptor_header *h,
2638 const struct pandecode_mapped_memory *mem,
2639 mali_ptr payload, int job_no, unsigned gpu_id)
2640 {
2641 struct bifrost_payload_vertex *PANDECODE_PTR_VAR(v, mem, payload);
2642
2643 pandecode_vertex_tiler_postfix_pre(&v->postfix, job_no, h->job_type, "", true, gpu_id);
2644
2645 pandecode_log("struct bifrost_payload_vertex payload_%"PRIx64"_%d = {\n", payload, job_no);
2646 pandecode_indent++;
2647
2648 pandecode_vertex_tiler_prefix(&v->prefix, job_no, false);
2649 pandecode_vertex_tiler_postfix(&v->postfix, job_no, true);
2650
2651 pandecode_indent--;
2652 pandecode_log("};\n");
2653
2654 return sizeof(*v);
2655 }
2656
2657 static int
2658 pandecode_tiler_job_bfr(const struct mali_job_descriptor_header *h,
2659 const struct pandecode_mapped_memory *mem,
2660 mali_ptr payload, int job_no, unsigned gpu_id)
2661 {
2662 struct bifrost_payload_tiler *PANDECODE_PTR_VAR(t, mem, payload);
2663
2664 pandecode_vertex_tiler_postfix_pre(&t->postfix, job_no, h->job_type, "", true, gpu_id);
2665 pandecode_tiler_meta(t->tiler.tiler_meta, job_no);
2666
2667 pandecode_log("struct bifrost_payload_tiler payload_%"PRIx64"_%d = {\n", payload, job_no);
2668 pandecode_indent++;
2669
2670 pandecode_vertex_tiler_prefix(&t->prefix, job_no, false);
2671
2672 pandecode_log(".tiler = ");
2673 pandecode_tiler_only_bfr(&t->tiler, job_no);
2674
2675 pandecode_vertex_tiler_postfix(&t->postfix, job_no, true);
2676
2677 pandecode_indent--;
2678 pandecode_log("};\n");
2679
2680 return sizeof(*t);
2681 }
2682
2683 static int
2684 pandecode_vertex_or_tiler_job_mdg(const struct mali_job_descriptor_header *h,
2685 const struct pandecode_mapped_memory *mem,
2686 mali_ptr payload, int job_no, unsigned gpu_id)
2687 {
2688 struct midgard_payload_vertex_tiler *PANDECODE_PTR_VAR(v, mem, payload);
2689 bool is_graphics = (h->job_type == MALI_JOB_TYPE_VERTEX) || (h->job_type == MALI_JOB_TYPE_TILER);
2690
2691 pandecode_vertex_tiler_postfix_pre(&v->postfix, job_no, h->job_type, "", false, gpu_id);
2692
2693 pandecode_log("struct midgard_payload_vertex_tiler payload_%d = {\n", job_no);
2694 pandecode_indent++;
2695
2696 pandecode_vertex_tiler_prefix(&v->prefix, job_no, is_graphics);
2697 pandecode_vertex_tiler_postfix(&v->postfix, job_no, false);
2698
2699 bool has_primitive_pointer = v->prefix.unknown_draw & MALI_DRAW_VARYING_SIZE;
2700 pandecode_primitive_size(v->primitive_size, !has_primitive_pointer);
2701
2702 pandecode_indent--;
2703 pandecode_log("};\n");
2704
2705 return sizeof(*v);
2706 }
2707
2708 static int
2709 pandecode_fragment_job(const struct pandecode_mapped_memory *mem,
2710 mali_ptr payload, int job_no,
2711 bool is_bifrost, unsigned gpu_id)
2712 {
2713 const struct mali_payload_fragment *PANDECODE_PTR_VAR(s, mem, payload);
2714
2715 bool is_mfbd = s->framebuffer & MALI_MFBD;
2716
2717 if (!is_mfbd && is_bifrost)
2718 pandecode_msg("XXX: Bifrost fragment must use MFBD\n");
2719
2720 struct pandecode_fbd info;
2721
2722 if (is_mfbd)
2723 info = pandecode_mfbd_bfr(s->framebuffer & FBD_MASK, job_no, true, false, is_bifrost);
2724 else
2725 info = pandecode_sfbd(s->framebuffer & FBD_MASK, job_no, true, gpu_id);
2726
2727 /* Compute the tag for the tagged pointer. This contains the type of
2728 * FBD (MFBD/SFBD), and in the case of an MFBD, information about which
2729 * additional structures follow the MFBD header (an extra payload or
2730 * not, as well as a count of render targets) */
2731
2732 unsigned expected_tag = is_mfbd ? MALI_MFBD : 0;
2733
2734 if (is_mfbd) {
2735 if (info.has_extra)
2736 expected_tag |= MALI_MFBD_TAG_EXTRA;
2737
2738 expected_tag |= (MALI_POSITIVE(info.rt_count) << 2);
2739 }
2740
2741 if ((s->min_tile_coord | s->max_tile_coord) & ~(MALI_X_COORD_MASK | MALI_Y_COORD_MASK)) {
2742 pandecode_msg("XXX: unexpected tile coordinate bits\n");
2743 pandecode_prop("min_tile_coord = 0x%X\n", s->min_tile_coord);
2744 pandecode_prop("max_tile_coord = 0x%X\n", s->max_tile_coord);
2745 }
2746
2747 /* Extract tile coordinates */
2748
2749 unsigned min_x = MALI_TILE_COORD_X(s->min_tile_coord) << MALI_TILE_SHIFT;
2750 unsigned min_y = MALI_TILE_COORD_Y(s->min_tile_coord) << MALI_TILE_SHIFT;
2751
2752 unsigned max_x = (MALI_TILE_COORD_X(s->max_tile_coord) + 1) << MALI_TILE_SHIFT;
2753 unsigned max_y = (MALI_TILE_COORD_Y(s->max_tile_coord) + 1) << MALI_TILE_SHIFT;
2754
2755 /* For the max, we also want the floored (rather than ceiled) version for checking */
2756
2757 unsigned max_x_f = (MALI_TILE_COORD_X(s->max_tile_coord)) << MALI_TILE_SHIFT;
2758 unsigned max_y_f = (MALI_TILE_COORD_Y(s->max_tile_coord)) << MALI_TILE_SHIFT;
2759
2760 /* Validate the coordinates are well-ordered */
2761
2762 if (min_x == max_x)
2763 pandecode_msg("XXX: empty X coordinates (%u = %u)\n", min_x, max_x);
2764 else if (min_x > max_x)
2765 pandecode_msg("XXX: misordered X coordinates (%u > %u)\n", min_x, max_x);
2766
2767 if (min_y == max_y)
2768 pandecode_msg("XXX: empty X coordinates (%u = %u)\n", min_x, max_x);
2769 else if (min_y > max_y)
2770 pandecode_msg("XXX: misordered X coordinates (%u > %u)\n", min_x, max_x);
2771
2772 /* Validate the coordinates fit inside the framebuffer. We use floor,
2773 * rather than ceil, for the max coordinates, since the tile
2774 * coordinates for something like an 800x600 framebuffer will actually
2775 * resolve to 800x608, which would otherwise trigger a Y-overflow */
2776
2777 if ((min_x > info.width) || (max_x_f > info.width))
2778 pandecode_msg("XXX: tile coordinates overflow in X direction\n");
2779
2780 if ((min_y > info.height) || (max_y_f > info.height))
2781 pandecode_msg("XXX: tile coordinates overflow in Y direction\n");
2782
2783 /* After validation, we print */
2784
2785 pandecode_log("fragment (%u, %u) ... (%u, %u)\n\n", min_x, min_y, max_x, max_y);
2786
2787 /* The FBD is a tagged pointer */
2788
2789 unsigned tag = (s->framebuffer & ~FBD_MASK);
2790
2791 if (tag != expected_tag)
2792 pandecode_msg("XXX: expected FBD tag %X but got %X\n", expected_tag, tag);
2793
2794 return sizeof(*s);
2795 }
2796
2797 /* Entrypoint to start tracing. jc_gpu_va is the GPU address for the first job
2798 * in the chain; later jobs are found by walking the chain. Bifrost is, well,
2799 * if it's bifrost or not. GPU ID is the more finegrained ID (at some point, we
2800 * might wish to combine this with the bifrost parameter) because some details
2801 * are model-specific even within a particular architecture. Minimal traces
2802 * *only* examine the job descriptors, skipping printing entirely if there is
2803 * no faults, and only descends into the payload if there are faults. This is
2804 * useful for looking for faults without the overhead of invasive traces. */
2805
2806 void
2807 pandecode_jc(mali_ptr jc_gpu_va, bool bifrost, unsigned gpu_id, bool minimal)
2808 {
2809 pandecode_dump_file_open();
2810
2811 struct mali_job_descriptor_header *h;
2812 unsigned job_descriptor_number = 0;
2813
2814 do {
2815 struct pandecode_mapped_memory *mem =
2816 pandecode_find_mapped_gpu_mem_containing(jc_gpu_va);
2817
2818 void *payload;
2819
2820 h = PANDECODE_PTR(mem, jc_gpu_va, struct mali_job_descriptor_header);
2821
2822 /* On Midgard, for 32-bit jobs except for fragment jobs, the
2823 * high 32-bits of the 64-bit pointer are reused to store
2824 * something else.
2825 */
2826 int offset = h->job_descriptor_size == MALI_JOB_32 &&
2827 h->job_type != MALI_JOB_TYPE_FRAGMENT ? 4 : 0;
2828 mali_ptr payload_ptr = jc_gpu_va + sizeof(*h) - offset;
2829
2830 payload = pandecode_fetch_gpu_mem(mem, payload_ptr, 256);
2831
2832 int job_no = job_descriptor_number++;
2833
2834 /* If the job is good to go, skip it in minimal mode */
2835 if (minimal && (h->exception_status == 0x0 || h->exception_status == 0x1))
2836 continue;
2837
2838 pandecode_log("struct mali_job_descriptor_header job_%"PRIx64"_%d = {\n", jc_gpu_va, job_no);
2839 pandecode_indent++;
2840
2841 pandecode_prop("job_type = %s", mali_job_type_as_str(h->job_type));
2842
2843 if (h->job_descriptor_size)
2844 pandecode_prop("job_descriptor_size = %d", h->job_descriptor_size);
2845
2846 if (h->exception_status && h->exception_status != 0x1)
2847 pandecode_prop("exception_status = %x (source ID: 0x%x access: %s exception: 0x%x)",
2848 h->exception_status,
2849 (h->exception_status >> 16) & 0xFFFF,
2850 mali_exception_access_as_str((h->exception_status >> 8) & 0x3),
2851 h->exception_status & 0xFF);
2852
2853 if (h->first_incomplete_task)
2854 pandecode_prop("first_incomplete_task = %d", h->first_incomplete_task);
2855
2856 if (h->fault_pointer)
2857 pandecode_prop("fault_pointer = 0x%" PRIx64, h->fault_pointer);
2858
2859 if (h->job_barrier)
2860 pandecode_prop("job_barrier = %d", h->job_barrier);
2861
2862 pandecode_prop("job_index = %d", h->job_index);
2863
2864 if (h->unknown_flags)
2865 pandecode_prop("unknown_flags = %d", h->unknown_flags);
2866
2867 if (h->job_dependency_index_1)
2868 pandecode_prop("job_dependency_index_1 = %d", h->job_dependency_index_1);
2869
2870 if (h->job_dependency_index_2)
2871 pandecode_prop("job_dependency_index_2 = %d", h->job_dependency_index_2);
2872
2873 pandecode_indent--;
2874 pandecode_log("};\n");
2875
2876 switch (h->job_type) {
2877 case MALI_JOB_TYPE_WRITE_VALUE: {
2878 struct mali_payload_write_value *s = payload;
2879 pandecode_log("struct mali_payload_write_value payload_%"PRIx64"_%d = {\n", payload_ptr, job_no);
2880 pandecode_indent++;
2881 MEMORY_PROP(s, address);
2882
2883 if (s->value_descriptor != MALI_WRITE_VALUE_ZERO) {
2884 pandecode_msg("XXX: unknown value descriptor\n");
2885 pandecode_prop("value_descriptor = 0x%" PRIX32, s->value_descriptor);
2886 }
2887
2888 if (s->reserved) {
2889 pandecode_msg("XXX: set value tripped\n");
2890 pandecode_prop("reserved = 0x%" PRIX32, s->reserved);
2891 }
2892
2893 pandecode_prop("immediate = 0x%" PRIX64, s->immediate);
2894 pandecode_indent--;
2895 pandecode_log("};\n");
2896
2897 break;
2898 }
2899
2900 case MALI_JOB_TYPE_TILER:
2901 case MALI_JOB_TYPE_VERTEX:
2902 case MALI_JOB_TYPE_COMPUTE:
2903 if (bifrost) {
2904 if (h->job_type == MALI_JOB_TYPE_TILER)
2905 pandecode_tiler_job_bfr(h, mem, payload_ptr, job_no, gpu_id);
2906 else
2907 pandecode_vertex_job_bfr(h, mem, payload_ptr, job_no, gpu_id);
2908 } else
2909 pandecode_vertex_or_tiler_job_mdg(h, mem, payload_ptr, job_no, gpu_id);
2910
2911 break;
2912
2913 case MALI_JOB_TYPE_FRAGMENT:
2914 pandecode_fragment_job(mem, payload_ptr, job_no, bifrost, gpu_id);
2915 break;
2916
2917 default:
2918 break;
2919 }
2920 } while ((jc_gpu_va = h->next_job));
2921
2922 pandecode_map_read_write();
2923 }