pan/decode: Add helper to dump GPU structures
[mesa.git] / src / panfrost / lib / decode.c
1 /*
2 * Copyright (C) 2017-2019 Alyssa Rosenzweig
3 * Copyright (C) 2017-2019 Connor Abbott
4 * Copyright (C) 2019 Collabora, Ltd.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 */
25
26 #include <midgard_pack.h>
27 #include <stdio.h>
28 #include <stdlib.h>
29 #include <memory.h>
30 #include <stdbool.h>
31 #include <stdarg.h>
32 #include <ctype.h>
33 #include "decode.h"
34 #include "util/macros.h"
35 #include "util/u_math.h"
36
37 #include "midgard/disassemble.h"
38 #include "bifrost/disassemble.h"
39
40 #include "pan_encoder.h"
41
42 static void pandecode_swizzle(unsigned swizzle, enum mali_format format);
43
44 #define MEMORY_PROP(obj, p) {\
45 if (obj->p) { \
46 char *a = pointer_as_memory_reference(obj->p); \
47 pandecode_prop("%s = %s", #p, a); \
48 free(a); \
49 } \
50 }
51
52 #define MEMORY_PROP_DIR(obj, p) {\
53 if (obj.p) { \
54 char *a = pointer_as_memory_reference(obj.p); \
55 pandecode_prop("%s = %s", #p, a); \
56 free(a); \
57 } \
58 }
59
60 #define DUMP_CL(title, T, cl, indent) {\
61 fprintf(pandecode_dump_stream, "%s\n", title); \
62 struct MALI_ ## T temp; \
63 MALI_ ## T ## _unpack((const uint8_t *) cl, &temp); \
64 MALI_ ## T ## _print(pandecode_dump_stream, &temp, 0); \
65 }
66
67 #define DUMP_ADDR(title, T, addr, indent) {\
68 struct pandecode_mapped_memory *mapped_mem = pandecode_find_mapped_gpu_mem_containing(addr); \
69 const uint8_t *cl = pandecode_fetch_gpu_mem(mapped_mem, addr, MALI_ ## T ## _LENGTH); \
70 DUMP_CL(title, T, cl, indent); \
71 }
72
73 FILE *pandecode_dump_stream;
74
75 /* Semantic logging type.
76 *
77 * Raw: for raw messages to be printed as is.
78 * Message: for helpful information to be commented out in replays.
79 * Property: for properties of a struct
80 *
81 * Use one of pandecode_log, pandecode_msg, or pandecode_prop as syntax sugar.
82 */
83
84 enum pandecode_log_type {
85 PANDECODE_RAW,
86 PANDECODE_MESSAGE,
87 PANDECODE_PROPERTY
88 };
89
90 #define pandecode_log(...) pandecode_log_typed(PANDECODE_RAW, __VA_ARGS__)
91 #define pandecode_msg(...) pandecode_log_typed(PANDECODE_MESSAGE, __VA_ARGS__)
92 #define pandecode_prop(...) pandecode_log_typed(PANDECODE_PROPERTY, __VA_ARGS__)
93
94 unsigned pandecode_indent = 0;
95
96 static void
97 pandecode_make_indent(void)
98 {
99 for (unsigned i = 0; i < pandecode_indent; ++i)
100 fprintf(pandecode_dump_stream, " ");
101 }
102
103 static void
104 pandecode_log_typed(enum pandecode_log_type type, const char *format, ...)
105 {
106 va_list ap;
107
108 pandecode_make_indent();
109
110 if (type == PANDECODE_MESSAGE)
111 fprintf(pandecode_dump_stream, "// ");
112 else if (type == PANDECODE_PROPERTY)
113 fprintf(pandecode_dump_stream, ".");
114
115 va_start(ap, format);
116 vfprintf(pandecode_dump_stream, format, ap);
117 va_end(ap);
118
119 if (type == PANDECODE_PROPERTY)
120 fprintf(pandecode_dump_stream, ",\n");
121 }
122
123 static void
124 pandecode_log_cont(const char *format, ...)
125 {
126 va_list ap;
127
128 va_start(ap, format);
129 vfprintf(pandecode_dump_stream, format, ap);
130 va_end(ap);
131 }
132
133 /* To check for memory safety issues, validates that the given pointer in GPU
134 * memory is valid, containing at least sz bytes. The goal is to eliminate
135 * GPU-side memory bugs (NULL pointer dereferences, buffer overflows, or buffer
136 * overruns) by statically validating pointers.
137 */
138
139 static void
140 pandecode_validate_buffer(mali_ptr addr, size_t sz)
141 {
142 if (!addr) {
143 pandecode_msg("XXX: null pointer deref");
144 return;
145 }
146
147 /* Find a BO */
148
149 struct pandecode_mapped_memory *bo =
150 pandecode_find_mapped_gpu_mem_containing(addr);
151
152 if (!bo) {
153 pandecode_msg("XXX: invalid memory dereference\n");
154 return;
155 }
156
157 /* Bounds check */
158
159 unsigned offset = addr - bo->gpu_va;
160 unsigned total = offset + sz;
161
162 if (total > bo->length) {
163 pandecode_msg("XXX: buffer overrun. "
164 "Chunk of size %zu at offset %d in buffer of size %zu. "
165 "Overrun by %zu bytes. \n",
166 sz, offset, bo->length, total - bo->length);
167 return;
168 }
169 }
170
171 struct pandecode_flag_info {
172 u64 flag;
173 const char *name;
174 };
175
176 static void
177 pandecode_log_decoded_flags(const struct pandecode_flag_info *flag_info,
178 u64 flags)
179 {
180 bool decodable_flags_found = false;
181
182 for (int i = 0; flag_info[i].name; i++) {
183 if ((flags & flag_info[i].flag) != flag_info[i].flag)
184 continue;
185
186 if (!decodable_flags_found) {
187 decodable_flags_found = true;
188 } else {
189 pandecode_log_cont(" | ");
190 }
191
192 pandecode_log_cont("%s", flag_info[i].name);
193
194 flags &= ~flag_info[i].flag;
195 }
196
197 if (decodable_flags_found) {
198 if (flags)
199 pandecode_log_cont(" | 0x%" PRIx64, flags);
200 } else {
201 pandecode_log_cont("0x%" PRIx64, flags);
202 }
203 }
204
205 #define FLAG_INFO(flag) { MALI_##flag, "MALI_" #flag }
206 static const struct pandecode_flag_info gl_enable_flag_info[] = {
207 FLAG_INFO(OCCLUSION_QUERY),
208 FLAG_INFO(OCCLUSION_PRECISE),
209 FLAG_INFO(FRONT_CCW_TOP),
210 FLAG_INFO(CULL_FACE_FRONT),
211 FLAG_INFO(CULL_FACE_BACK),
212 {}
213 };
214 #undef FLAG_INFO
215
216 #define FLAG_INFO(flag) { MALI_CLEAR_##flag, "MALI_CLEAR_" #flag }
217 static const struct pandecode_flag_info clear_flag_info[] = {
218 FLAG_INFO(FAST),
219 FLAG_INFO(SLOW),
220 FLAG_INFO(SLOW_STENCIL),
221 {}
222 };
223 #undef FLAG_INFO
224
225 #define FLAG_INFO(flag) { MALI_MASK_##flag, "MALI_MASK_" #flag }
226 static const struct pandecode_flag_info mask_flag_info[] = {
227 FLAG_INFO(R),
228 FLAG_INFO(G),
229 FLAG_INFO(B),
230 FLAG_INFO(A),
231 {}
232 };
233 #undef FLAG_INFO
234
235 #define FLAG_INFO(flag) { MALI_##flag, "MALI_" #flag }
236 static const struct pandecode_flag_info u3_flag_info[] = {
237 FLAG_INFO(HAS_MSAA),
238 FLAG_INFO(PER_SAMPLE),
239 FLAG_INFO(CAN_DISCARD),
240 FLAG_INFO(HAS_BLEND_SHADER),
241 FLAG_INFO(DEPTH_WRITEMASK),
242 FLAG_INFO(DEPTH_CLIP_NEAR),
243 FLAG_INFO(DEPTH_CLIP_FAR),
244 {}
245 };
246
247 static const struct pandecode_flag_info u4_flag_info[] = {
248 FLAG_INFO(NO_MSAA),
249 FLAG_INFO(NO_DITHER),
250 FLAG_INFO(DEPTH_RANGE_A),
251 FLAG_INFO(DEPTH_RANGE_B),
252 FLAG_INFO(STENCIL_TEST),
253 FLAG_INFO(ALPHA_TO_COVERAGE),
254 {}
255 };
256 #undef FLAG_INFO
257
258 #define FLAG_INFO(flag) { MALI_MFBD_FORMAT_##flag, "MALI_MFBD_FORMAT_" #flag }
259 static const struct pandecode_flag_info mfbd_fmt_flag_info[] = {
260 FLAG_INFO(SRGB),
261 {}
262 };
263 #undef FLAG_INFO
264
265 #define FLAG_INFO(flag) { MALI_AFBC_##flag, "MALI_AFBC_" #flag }
266 static const struct pandecode_flag_info afbc_fmt_flag_info[] = {
267 FLAG_INFO(YTR),
268 {}
269 };
270 #undef FLAG_INFO
271
272 #define FLAG_INFO(flag) { MALI_EXTRA_##flag, "MALI_EXTRA_" #flag }
273 static const struct pandecode_flag_info mfbd_extra_flag_hi_info[] = {
274 FLAG_INFO(PRESENT),
275 {}
276 };
277 #undef FLAG_INFO
278
279 #define FLAG_INFO(flag) { MALI_EXTRA_##flag, "MALI_EXTRA_" #flag }
280 static const struct pandecode_flag_info mfbd_extra_flag_lo_info[] = {
281 FLAG_INFO(ZS),
282 {}
283 };
284 #undef FLAG_INFO
285
286 #define FLAG_INFO(flag) { MALI_##flag, "MALI_" #flag }
287 static const struct pandecode_flag_info shader_midgard1_flag_lo_info [] = {
288 FLAG_INFO(WRITES_Z),
289 FLAG_INFO(EARLY_Z),
290 FLAG_INFO(READS_TILEBUFFER),
291 FLAG_INFO(WRITES_GLOBAL),
292 FLAG_INFO(READS_ZS),
293 {}
294 };
295
296 static const struct pandecode_flag_info shader_midgard1_flag_hi_info [] = {
297 FLAG_INFO(WRITES_S),
298 FLAG_INFO(SUPPRESS_INF_NAN),
299 {}
300 };
301 #undef FLAG_INFO
302
303 #define FLAG_INFO(flag) { MALI_BIFROST_##flag, "MALI_BIFROST_" #flag }
304 static const struct pandecode_flag_info shader_bifrost_info [] = {
305 FLAG_INFO(FULL_THREAD),
306 FLAG_INFO(EARLY_Z),
307 FLAG_INFO(FIRST_ATEST),
308 {}
309 };
310
311 #undef FLAG_INFO
312
313 #define FLAG_INFO(flag) { MALI_MFBD_##flag, "MALI_MFBD_" #flag }
314 static const struct pandecode_flag_info mfbd_flag_info [] = {
315 FLAG_INFO(DEPTH_WRITE),
316 FLAG_INFO(EXTRA),
317 {}
318 };
319 #undef FLAG_INFO
320
321 #define FLAG_INFO(flag) { MALI_SAMP_##flag, "MALI_SAMP_" #flag }
322 static const struct pandecode_flag_info sampler_flag_info [] = {
323 FLAG_INFO(MAG_NEAREST),
324 FLAG_INFO(MIN_NEAREST),
325 FLAG_INFO(MIP_LINEAR_1),
326 FLAG_INFO(MIP_LINEAR_2),
327 FLAG_INFO(NORM_COORDS),
328 {}
329 };
330 #undef FLAG_INFO
331
332 #define FLAG_INFO(flag) { MALI_SFBD_FORMAT_##flag, "MALI_SFBD_FORMAT_" #flag }
333 static const struct pandecode_flag_info sfbd_unk1_info [] = {
334 FLAG_INFO(MSAA_8),
335 FLAG_INFO(MSAA_A),
336 {}
337 };
338 #undef FLAG_INFO
339
340 #define FLAG_INFO(flag) { MALI_SFBD_FORMAT_##flag, "MALI_SFBD_FORMAT_" #flag }
341 static const struct pandecode_flag_info sfbd_unk2_info [] = {
342 FLAG_INFO(MSAA_B),
343 FLAG_INFO(SRGB),
344 {}
345 };
346 #undef FLAG_INFO
347
348 #define DEFINE_CASE(name) case MALI_## name: return "MALI_" #name
349 static char *pandecode_format(enum mali_format format)
350 {
351 static char unk_format_str[10];
352
353 switch (format) {
354 DEFINE_CASE(ETC2_RGB8);
355 DEFINE_CASE(ETC2_R11_UNORM);
356 DEFINE_CASE(ETC2_RGBA8);
357 DEFINE_CASE(ETC2_RG11_UNORM);
358 DEFINE_CASE(ETC2_R11_SNORM);
359 DEFINE_CASE(ETC2_RG11_SNORM);
360 DEFINE_CASE(ETC2_RGB8A1);
361 DEFINE_CASE(NXR);
362 DEFINE_CASE(BC1_UNORM);
363 DEFINE_CASE(BC2_UNORM);
364 DEFINE_CASE(BC3_UNORM);
365 DEFINE_CASE(BC4_UNORM);
366 DEFINE_CASE(BC4_SNORM);
367 DEFINE_CASE(BC5_UNORM);
368 DEFINE_CASE(BC5_SNORM);
369 DEFINE_CASE(BC6H_UF16);
370 DEFINE_CASE(BC6H_SF16);
371 DEFINE_CASE(BC7_UNORM);
372 DEFINE_CASE(ASTC_3D_LDR);
373 DEFINE_CASE(ASTC_3D_HDR);
374 DEFINE_CASE(ASTC_2D_LDR);
375 DEFINE_CASE(ASTC_2D_HDR);
376 DEFINE_CASE(RGB565);
377 DEFINE_CASE(RGB5_X1_UNORM);
378 DEFINE_CASE(RGB5_A1_UNORM);
379 DEFINE_CASE(RGB10_A2_UNORM);
380 DEFINE_CASE(RGB10_A2_SNORM);
381 DEFINE_CASE(RGB10_A2UI);
382 DEFINE_CASE(RGB10_A2I);
383 DEFINE_CASE(RGB332_UNORM);
384 DEFINE_CASE(RGB233_UNORM);
385 DEFINE_CASE(Z24X8_UNORM);
386 DEFINE_CASE(R32_FIXED);
387 DEFINE_CASE(RG32_FIXED);
388 DEFINE_CASE(RGB32_FIXED);
389 DEFINE_CASE(RGBA32_FIXED);
390 DEFINE_CASE(R11F_G11F_B10F);
391 DEFINE_CASE(R9F_G9F_B9F_E5F);
392 DEFINE_CASE(VARYING_POS);
393 DEFINE_CASE(VARYING_DISCARD);
394
395 DEFINE_CASE(R8_SNORM);
396 DEFINE_CASE(R16_SNORM);
397 DEFINE_CASE(R32_SNORM);
398 DEFINE_CASE(RG8_SNORM);
399 DEFINE_CASE(RG16_SNORM);
400 DEFINE_CASE(RG32_SNORM);
401 DEFINE_CASE(RGB8_SNORM);
402 DEFINE_CASE(RGB16_SNORM);
403 DEFINE_CASE(RGB32_SNORM);
404 DEFINE_CASE(RGBA8_SNORM);
405 DEFINE_CASE(RGBA16_SNORM);
406 DEFINE_CASE(RGBA32_SNORM);
407
408 DEFINE_CASE(R8UI);
409 DEFINE_CASE(R16UI);
410 DEFINE_CASE(R32UI);
411 DEFINE_CASE(RG8UI);
412 DEFINE_CASE(RG16UI);
413 DEFINE_CASE(RG32UI);
414 DEFINE_CASE(RGB8UI);
415 DEFINE_CASE(RGB16UI);
416 DEFINE_CASE(RGB32UI);
417 DEFINE_CASE(RGBA8UI);
418 DEFINE_CASE(RGBA16UI);
419 DEFINE_CASE(RGBA32UI);
420
421 DEFINE_CASE(R8_UNORM);
422 DEFINE_CASE(R16_UNORM);
423 DEFINE_CASE(R32_UNORM);
424 DEFINE_CASE(R32F);
425 DEFINE_CASE(RG8_UNORM);
426 DEFINE_CASE(RG16_UNORM);
427 DEFINE_CASE(RG32_UNORM);
428 DEFINE_CASE(RG32F);
429 DEFINE_CASE(RGB8_UNORM);
430 DEFINE_CASE(RGB16_UNORM);
431 DEFINE_CASE(RGB32_UNORM);
432 DEFINE_CASE(RGB32F);
433 DEFINE_CASE(RGBA4_UNORM);
434 DEFINE_CASE(RGBA8_UNORM);
435 DEFINE_CASE(RGBA16_UNORM);
436 DEFINE_CASE(RGBA32_UNORM);
437 DEFINE_CASE(RGBA32F);
438
439 DEFINE_CASE(R8I);
440 DEFINE_CASE(R16I);
441 DEFINE_CASE(R32I);
442 DEFINE_CASE(RG8I);
443 DEFINE_CASE(R16F);
444 DEFINE_CASE(RG16I);
445 DEFINE_CASE(RG32I);
446 DEFINE_CASE(RG16F);
447 DEFINE_CASE(RGB8I);
448 DEFINE_CASE(RGB16I);
449 DEFINE_CASE(RGB32I);
450 DEFINE_CASE(RGB16F);
451 DEFINE_CASE(RGBA8I);
452 DEFINE_CASE(RGBA16I);
453 DEFINE_CASE(RGBA32I);
454 DEFINE_CASE(RGBA16F);
455
456 DEFINE_CASE(RGBA4);
457 DEFINE_CASE(RGBA8_2);
458 DEFINE_CASE(RGB10_A2_2);
459 default:
460 snprintf(unk_format_str, sizeof(unk_format_str), "MALI_0x%02x", format);
461 return unk_format_str;
462 }
463 }
464
465 #undef DEFINE_CASE
466
467 static char *
468 pandecode_job_type(enum mali_job_type type)
469 {
470 #define DEFINE_CASE(name) case JOB_TYPE_ ## name: return "JOB_TYPE_" #name
471
472 switch (type) {
473 DEFINE_CASE(NULL);
474 DEFINE_CASE(WRITE_VALUE);
475 DEFINE_CASE(CACHE_FLUSH);
476 DEFINE_CASE(COMPUTE);
477 DEFINE_CASE(VERTEX);
478 DEFINE_CASE(TILER);
479 DEFINE_CASE(FUSED);
480 DEFINE_CASE(FRAGMENT);
481
482 case JOB_NOT_STARTED:
483 return "NOT_STARTED";
484
485 default:
486 pandecode_log("Warning! Unknown job type %x\n", type);
487 return "!?!?!?";
488 }
489
490 #undef DEFINE_CASE
491 }
492
493 static char *
494 pandecode_draw_mode(enum mali_draw_mode mode)
495 {
496 #define DEFINE_CASE(name) case MALI_ ## name: return "MALI_" #name
497
498 switch (mode) {
499 DEFINE_CASE(DRAW_NONE);
500 DEFINE_CASE(POINTS);
501 DEFINE_CASE(LINES);
502 DEFINE_CASE(TRIANGLES);
503 DEFINE_CASE(TRIANGLE_STRIP);
504 DEFINE_CASE(TRIANGLE_FAN);
505 DEFINE_CASE(LINE_STRIP);
506 DEFINE_CASE(LINE_LOOP);
507 DEFINE_CASE(POLYGON);
508 DEFINE_CASE(QUADS);
509 DEFINE_CASE(QUAD_STRIP);
510
511 default:
512 pandecode_msg("XXX: invalid draw mode %X\n", mode);
513 return "";
514 }
515
516 #undef DEFINE_CASE
517 }
518
519 #define DEFINE_CASE(name) case MALI_FUNC_ ## name: return "MALI_FUNC_" #name
520 static char *
521 pandecode_func(enum mali_func mode)
522 {
523 switch (mode) {
524 DEFINE_CASE(NEVER);
525 DEFINE_CASE(LESS);
526 DEFINE_CASE(EQUAL);
527 DEFINE_CASE(LEQUAL);
528 DEFINE_CASE(GREATER);
529 DEFINE_CASE(NOTEQUAL);
530 DEFINE_CASE(GEQUAL);
531 DEFINE_CASE(ALWAYS);
532
533 default:
534 pandecode_msg("XXX: invalid func %X\n", mode);
535 return "";
536 }
537 }
538 #undef DEFINE_CASE
539
540 #define DEFINE_CASE(name) case MALI_MSAA_ ## name: return "MALI_MSAA_" #name
541 static char *
542 pandecode_msaa_mode(enum mali_msaa_mode mode)
543 {
544 switch (mode) {
545 DEFINE_CASE(SINGLE);
546 DEFINE_CASE(AVERAGE);
547 DEFINE_CASE(MULTIPLE);
548 DEFINE_CASE(LAYERED);
549 default:
550 unreachable("Impossible");
551 return "";
552 }
553 }
554 #undef DEFINE_CASE
555
556 #define DEFINE_CASE(name) case MALI_STENCIL_ ## name: return "MALI_STENCIL_" #name
557 static char *
558 pandecode_stencil_op(enum mali_stencil_op op)
559 {
560 switch (op) {
561 DEFINE_CASE(KEEP);
562 DEFINE_CASE(REPLACE);
563 DEFINE_CASE(ZERO);
564 DEFINE_CASE(INVERT);
565 DEFINE_CASE(INCR_WRAP);
566 DEFINE_CASE(DECR_WRAP);
567 DEFINE_CASE(INCR);
568 DEFINE_CASE(DECR);
569
570 default:
571 pandecode_msg("XXX: invalid stencil op %X\n", op);
572 return "";
573 }
574 }
575
576 #undef DEFINE_CASE
577
578 static char *pandecode_attr_mode_short(enum mali_attr_mode mode)
579 {
580 switch(mode) {
581 /* TODO: Combine to just "instanced" once this can be done
582 * unambiguously in all known cases */
583 case MALI_ATTR_POT_DIVIDE:
584 return "instanced_pot";
585 case MALI_ATTR_MODULO:
586 return "instanced_mod";
587 case MALI_ATTR_NPOT_DIVIDE:
588 return "instanced_npot";
589 case MALI_ATTR_IMAGE:
590 return "image";
591 default:
592 pandecode_msg("XXX: invalid attribute mode %X\n", mode);
593 return "";
594 }
595 }
596
597 static const char *
598 pandecode_special_record(uint64_t v, bool* attribute)
599 {
600 switch(v) {
601 case MALI_ATTR_VERTEXID:
602 *attribute = true;
603 return "gl_VertexID";
604 case MALI_ATTR_INSTANCEID:
605 *attribute = true;
606 return "gl_InstanceID";
607 case MALI_VARYING_FRAG_COORD:
608 return "gl_FragCoord";
609 case MALI_VARYING_FRONT_FACING:
610 return "gl_FrontFacing";
611 case MALI_VARYING_POINT_COORD:
612 return "gl_PointCoord";
613 default:
614 pandecode_msg("XXX: invalid special record %" PRIx64 "\n", v);
615 return "";
616 }
617 }
618
619 #define DEFINE_CASE(name) case MALI_WRAP_## name: return "MALI_WRAP_" #name
620 static char *
621 pandecode_wrap_mode(enum mali_wrap_mode op)
622 {
623 switch (op) {
624 DEFINE_CASE(REPEAT);
625 DEFINE_CASE(CLAMP_TO_EDGE);
626 DEFINE_CASE(CLAMP);
627 DEFINE_CASE(CLAMP_TO_BORDER);
628 DEFINE_CASE(MIRRORED_REPEAT);
629 DEFINE_CASE(MIRRORED_CLAMP_TO_EDGE);
630 DEFINE_CASE(MIRRORED_CLAMP);
631 DEFINE_CASE(MIRRORED_CLAMP_TO_BORDER);
632
633 default:
634 pandecode_msg("XXX: invalid wrap mode %X\n", op);
635 return "";
636 }
637 }
638 #undef DEFINE_CASE
639
640 #define DEFINE_CASE(name) case MALI_BLOCK_## name: return "MALI_BLOCK_" #name
641 static char *
642 pandecode_block_format(enum mali_block_format fmt)
643 {
644 switch (fmt) {
645 DEFINE_CASE(TILED);
646 DEFINE_CASE(UNKNOWN);
647 DEFINE_CASE(LINEAR);
648 DEFINE_CASE(AFBC);
649
650 default:
651 unreachable("Invalid case");
652 }
653 }
654 #undef DEFINE_CASE
655
656 #define DEFINE_CASE(name) case MALI_EXCEPTION_ACCESS_## name: return ""#name
657 static char *
658 pandecode_exception_access(unsigned access)
659 {
660 switch (access) {
661 DEFINE_CASE(NONE);
662 DEFINE_CASE(EXECUTE);
663 DEFINE_CASE(READ);
664 DEFINE_CASE(WRITE);
665
666 default:
667 unreachable("Invalid case");
668 }
669 }
670 #undef DEFINE_CASE
671
672 /* Midgard's tiler descriptor is embedded within the
673 * larger FBD */
674
675 static void
676 pandecode_midgard_tiler_descriptor(
677 const struct midgard_tiler_descriptor *t,
678 unsigned width,
679 unsigned height,
680 bool is_fragment,
681 bool has_hierarchy)
682 {
683 pandecode_log(".tiler = {\n");
684 pandecode_indent++;
685
686 if (t->hierarchy_mask == MALI_TILER_DISABLED)
687 pandecode_prop("hierarchy_mask = MALI_TILER_DISABLED");
688 else
689 pandecode_prop("hierarchy_mask = 0x%" PRIx16, t->hierarchy_mask);
690
691 /* We know this name from the kernel, but we never see it nonzero */
692
693 if (t->flags)
694 pandecode_msg("XXX: unexpected tiler flags 0x%" PRIx16, t->flags);
695
696 MEMORY_PROP(t, polygon_list);
697
698 /* The body is offset from the base of the polygon list */
699 //assert(t->polygon_list_body > t->polygon_list);
700 unsigned body_offset = t->polygon_list_body - t->polygon_list;
701
702 /* It needs to fit inside the reported size */
703 //assert(t->polygon_list_size >= body_offset);
704
705 /* Now that we've sanity checked, we'll try to calculate the sizes
706 * ourselves for comparison */
707
708 unsigned ref_header = panfrost_tiler_header_size(width, height, t->hierarchy_mask, has_hierarchy);
709 unsigned ref_size = panfrost_tiler_full_size(width, height, t->hierarchy_mask, has_hierarchy);
710
711 if (!((ref_header == body_offset) && (ref_size == t->polygon_list_size))) {
712 pandecode_msg("XXX: bad polygon list size (expected %d / 0x%x)\n",
713 ref_header, ref_size);
714 pandecode_prop("polygon_list_size = 0x%x", t->polygon_list_size);
715 pandecode_msg("body offset %d\n", body_offset);
716 }
717
718 /* The tiler heap has a start and end specified -- it should be
719 * identical to what we have in the BO. The exception is if tiling is
720 * disabled. */
721
722 MEMORY_PROP(t, heap_start);
723 assert(t->heap_end >= t->heap_start);
724
725 struct pandecode_mapped_memory *heap =
726 pandecode_find_mapped_gpu_mem_containing(t->heap_start);
727
728 unsigned heap_size = t->heap_end - t->heap_start;
729
730 /* Tiling is enabled with a special flag */
731 unsigned hierarchy_mask = t->hierarchy_mask & MALI_HIERARCHY_MASK;
732 unsigned tiler_flags = t->hierarchy_mask ^ hierarchy_mask;
733
734 bool tiling_enabled = hierarchy_mask;
735
736 if (tiling_enabled) {
737 /* When tiling is enabled, the heap should be a tight fit */
738 unsigned heap_offset = t->heap_start - heap->gpu_va;
739 if ((heap_offset + heap_size) != heap->length) {
740 pandecode_msg("XXX: heap size %u (expected %zu)\n",
741 heap_size, heap->length - heap_offset);
742 }
743
744 /* We should also have no other flags */
745 if (tiler_flags)
746 pandecode_msg("XXX: unexpected tiler %X\n", tiler_flags);
747 } else {
748 /* When tiling is disabled, we should have that flag and no others */
749
750 if (tiler_flags != MALI_TILER_DISABLED) {
751 pandecode_msg("XXX: unexpected tiler flag %X, expected MALI_TILER_DISABLED\n",
752 tiler_flags);
753 }
754
755 /* We should also have an empty heap */
756 if (heap_size) {
757 pandecode_msg("XXX: tiler heap size %d given, expected empty\n",
758 heap_size);
759 }
760
761 /* Disabled tiling is used only for clear-only jobs, which are
762 * purely FRAGMENT, so we should never see this for
763 * non-FRAGMENT descriptors. */
764
765 if (!is_fragment)
766 pandecode_msg("XXX: tiler disabled for non-FRAGMENT job\n");
767 }
768
769 /* We've never seen weights used in practice, but we know from the
770 * kernel these fields is there */
771
772 bool nonzero_weights = false;
773
774 for (unsigned w = 0; w < ARRAY_SIZE(t->weights); ++w) {
775 nonzero_weights |= t->weights[w] != 0x0;
776 }
777
778 if (nonzero_weights) {
779 pandecode_log(".weights = { ");
780
781 for (unsigned w = 0; w < ARRAY_SIZE(t->weights); ++w) {
782 pandecode_log_cont("%d, ", t->weights[w]);
783 }
784
785 pandecode_log("},");
786 }
787
788 pandecode_indent--;
789 pandecode_log("}\n");
790 }
791
792 /* TODO: The Bifrost tiler is not understood at all yet */
793
794 static void
795 pandecode_bifrost_tiler_descriptor(const struct mali_framebuffer *fb)
796 {
797 pandecode_log(".tiler = {\n");
798 pandecode_indent++;
799
800 MEMORY_PROP(fb, tiler_meta);
801
802 for (int i = 0; i < 16; i++) {
803 if (fb->zeros[i] != 0) {
804 pandecode_msg("XXX: tiler descriptor zero %d tripped, value %x\n",
805 i, fb->zeros[i]);
806 }
807 }
808
809 pandecode_log("},\n");
810
811 pandecode_indent--;
812 pandecode_log("}\n");
813
814 }
815
816 /* Information about the framebuffer passed back for
817 * additional analysis */
818
819 struct pandecode_fbd {
820 unsigned width;
821 unsigned height;
822 unsigned rt_count;
823 bool has_extra;
824 };
825
826 static void
827 pandecode_sfbd_format(struct mali_sfbd_format format)
828 {
829 pandecode_log(".format = {\n");
830 pandecode_indent++;
831
832 pandecode_log(".unk1 = ");
833 pandecode_log_decoded_flags(sfbd_unk1_info, format.unk1);
834 pandecode_log_cont(",\n");
835
836 /* TODO: Map formats so we can check swizzles and print nicely */
837 pandecode_log("swizzle");
838 pandecode_swizzle(format.swizzle, MALI_RGBA8_UNORM);
839 pandecode_log_cont(",\n");
840
841 pandecode_prop("nr_channels = MALI_POSITIVE(%d)",
842 (format.nr_channels + 1));
843
844 pandecode_log(".unk2 = ");
845 pandecode_log_decoded_flags(sfbd_unk2_info, format.unk2);
846 pandecode_log_cont(",\n");
847
848 pandecode_prop("block = %s", pandecode_block_format(format.block));
849
850 pandecode_prop("unk3 = 0x%" PRIx32, format.unk3);
851
852 pandecode_indent--;
853 pandecode_log("},\n");
854 }
855
856 static void
857 pandecode_shared_memory(const struct mali_shared_memory *desc, bool is_compute)
858 {
859 pandecode_prop("stack_shift = 0x%x", desc->stack_shift);
860
861 if (desc->unk0)
862 pandecode_prop("unk0 = 0x%x", desc->unk0);
863
864 if (desc->shared_workgroup_count != 0x1F) {
865 pandecode_prop("shared_workgroup_count = %d", desc->shared_workgroup_count);
866 if (!is_compute)
867 pandecode_msg("XXX: wrong workgroup count for noncompute\n");
868 }
869
870 if (desc->shared_unk1 || desc->shared_shift) {
871 pandecode_prop("shared_unk1 = %X", desc->shared_unk1);
872 pandecode_prop("shared_shift = %X", desc->shared_shift);
873
874 if (!is_compute)
875 pandecode_msg("XXX: shared memory configured in noncompute shader");
876 }
877
878 if (desc->shared_zero) {
879 pandecode_msg("XXX: shared memory zero tripped\n");
880 pandecode_prop("shared_zero = 0x%" PRIx32, desc->shared_zero);
881 }
882
883 if (desc->shared_memory && !is_compute)
884 pandecode_msg("XXX: shared memory used in noncompute shader\n");
885
886 MEMORY_PROP(desc, scratchpad);
887 MEMORY_PROP(desc, shared_memory);
888 MEMORY_PROP(desc, unknown1);
889
890 if (desc->scratchpad) {
891 struct pandecode_mapped_memory *smem =
892 pandecode_find_mapped_gpu_mem_containing(desc->scratchpad);
893
894 pandecode_msg("scratchpad size %u\n", smem->length);
895 }
896
897 }
898
899 static struct pandecode_fbd
900 pandecode_sfbd(uint64_t gpu_va, int job_no, bool is_fragment, unsigned gpu_id)
901 {
902 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
903 const struct mali_single_framebuffer *PANDECODE_PTR_VAR(s, mem, (mali_ptr) gpu_va);
904
905 struct pandecode_fbd info = {
906 .has_extra = false,
907 .rt_count = 1
908 };
909
910 pandecode_log("struct mali_single_framebuffer framebuffer_%"PRIx64"_%d = {\n", gpu_va, job_no);
911 pandecode_indent++;
912
913 pandecode_log(".shared_memory = {\n");
914 pandecode_indent++;
915 pandecode_shared_memory(&s->shared_memory, false);
916 pandecode_indent--;
917 pandecode_log("},\n");
918
919 pandecode_sfbd_format(s->format);
920
921 info.width = s->width + 1;
922 info.height = s->height + 1;
923
924 pandecode_prop("width = MALI_POSITIVE(%" PRId16 ")", info.width);
925 pandecode_prop("height = MALI_POSITIVE(%" PRId16 ")", info.height);
926
927 MEMORY_PROP(s, checksum);
928
929 if (s->checksum_stride)
930 pandecode_prop("checksum_stride = %d", s->checksum_stride);
931
932 MEMORY_PROP(s, framebuffer);
933 pandecode_prop("stride = %d", s->stride);
934
935 /* Earlier in the actual commandstream -- right before width -- but we
936 * delay to flow nicer */
937
938 pandecode_log(".clear_flags = ");
939 pandecode_log_decoded_flags(clear_flag_info, s->clear_flags);
940 pandecode_log_cont(",\n");
941
942 if (s->depth_buffer) {
943 MEMORY_PROP(s, depth_buffer);
944 pandecode_prop("depth_stride = %d", s->depth_stride);
945 }
946
947 if (s->stencil_buffer) {
948 MEMORY_PROP(s, stencil_buffer);
949 pandecode_prop("stencil_stride = %d", s->stencil_stride);
950 }
951
952 if (s->depth_stride_zero ||
953 s->stencil_stride_zero ||
954 s->zero7 || s->zero8) {
955 pandecode_msg("XXX: Depth/stencil zeros tripped\n");
956 pandecode_prop("depth_stride_zero = 0x%x",
957 s->depth_stride_zero);
958 pandecode_prop("stencil_stride_zero = 0x%x",
959 s->stencil_stride_zero);
960 pandecode_prop("zero7 = 0x%" PRIx32,
961 s->zero7);
962 pandecode_prop("zero8 = 0x%" PRIx32,
963 s->zero8);
964 }
965
966 if (s->clear_color_1 | s->clear_color_2 | s->clear_color_3 | s->clear_color_4) {
967 pandecode_prop("clear_color_1 = 0x%" PRIx32, s->clear_color_1);
968 pandecode_prop("clear_color_2 = 0x%" PRIx32, s->clear_color_2);
969 pandecode_prop("clear_color_3 = 0x%" PRIx32, s->clear_color_3);
970 pandecode_prop("clear_color_4 = 0x%" PRIx32, s->clear_color_4);
971 }
972
973 if (s->clear_depth_1 != 0 || s->clear_depth_2 != 0 || s->clear_depth_3 != 0 || s->clear_depth_4 != 0) {
974 pandecode_prop("clear_depth_1 = %f", s->clear_depth_1);
975 pandecode_prop("clear_depth_2 = %f", s->clear_depth_2);
976 pandecode_prop("clear_depth_3 = %f", s->clear_depth_3);
977 pandecode_prop("clear_depth_4 = %f", s->clear_depth_4);
978 }
979
980 if (s->clear_stencil) {
981 pandecode_prop("clear_stencil = 0x%x", s->clear_stencil);
982 }
983
984 const struct midgard_tiler_descriptor t = s->tiler;
985
986 bool has_hierarchy = !(gpu_id == 0x0720 || gpu_id == 0x0820 || gpu_id == 0x0830);
987 pandecode_midgard_tiler_descriptor(&t, s->width + 1, s->height + 1, is_fragment, has_hierarchy);
988
989 pandecode_indent--;
990 pandecode_log("};\n");
991
992 pandecode_prop("zero2 = 0x%" PRIx32, s->zero2);
993 pandecode_prop("zero4 = 0x%" PRIx32, s->zero4);
994 pandecode_prop("zero5 = 0x%" PRIx32, s->zero5);
995
996 pandecode_log_cont(".zero3 = {");
997
998 for (int i = 0; i < sizeof(s->zero3) / sizeof(s->zero3[0]); ++i)
999 pandecode_log_cont("%X, ", s->zero3[i]);
1000
1001 pandecode_log_cont("},\n");
1002
1003 pandecode_log_cont(".zero6 = {");
1004
1005 for (int i = 0; i < sizeof(s->zero6) / sizeof(s->zero6[0]); ++i)
1006 pandecode_log_cont("%X, ", s->zero6[i]);
1007
1008 pandecode_log_cont("},\n");
1009
1010 return info;
1011 }
1012
1013 static void
1014 pandecode_compute_fbd(uint64_t gpu_va, int job_no)
1015 {
1016 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
1017 const struct mali_shared_memory *PANDECODE_PTR_VAR(s, mem, (mali_ptr) gpu_va);
1018
1019 pandecode_log("struct mali_shared_memory shared_%"PRIx64"_%d = {\n", gpu_va, job_no);
1020 pandecode_indent++;
1021 pandecode_shared_memory(s, true);
1022 pandecode_indent--;
1023 pandecode_log("},\n");
1024 }
1025
1026 /* Extracts the number of components associated with a Mali format */
1027
1028 static unsigned
1029 pandecode_format_component_count(enum mali_format fmt)
1030 {
1031 /* Mask out the format class */
1032 unsigned top = fmt & 0b11100000;
1033
1034 switch (top) {
1035 case MALI_FORMAT_SNORM:
1036 case MALI_FORMAT_UINT:
1037 case MALI_FORMAT_UNORM:
1038 case MALI_FORMAT_SINT:
1039 return ((fmt >> 3) & 3) + 1;
1040 default:
1041 /* TODO: Validate */
1042 return 4;
1043 }
1044 }
1045
1046 /* Extracts a mask of accessed components from a 12-bit Mali swizzle */
1047
1048 static unsigned
1049 pandecode_access_mask_from_channel_swizzle(unsigned swizzle)
1050 {
1051 unsigned mask = 0;
1052 assert(MALI_CHANNEL_RED == 0);
1053
1054 for (unsigned c = 0; c < 4; ++c) {
1055 enum mali_channel chan = (swizzle >> (3*c)) & 0x7;
1056
1057 if (chan <= MALI_CHANNEL_ALPHA)
1058 mask |= (1 << chan);
1059 }
1060
1061 return mask;
1062 }
1063
1064 /* Validates that a (format, swizzle) pair is valid, in the sense that the
1065 * swizzle doesn't access any components that are undefined in the format.
1066 * Returns whether the swizzle is trivial (doesn't do any swizzling) and can be
1067 * omitted */
1068
1069 static bool
1070 pandecode_validate_format_swizzle(enum mali_format fmt, unsigned swizzle)
1071 {
1072 unsigned nr_comp = pandecode_format_component_count(fmt);
1073 unsigned access_mask = pandecode_access_mask_from_channel_swizzle(swizzle);
1074 unsigned valid_mask = (1 << nr_comp) - 1;
1075 unsigned invalid_mask = ~valid_mask;
1076
1077 if (access_mask & invalid_mask) {
1078 pandecode_msg("XXX: invalid components accessed\n");
1079 return false;
1080 }
1081
1082 /* Check for the default non-swizzling swizzle so we can suppress
1083 * useless printing for the defaults */
1084
1085 unsigned default_swizzles[4] = {
1086 MALI_CHANNEL_RED | (MALI_CHANNEL_ZERO << 3) | (MALI_CHANNEL_ZERO << 6) | (MALI_CHANNEL_ONE << 9),
1087 MALI_CHANNEL_RED | (MALI_CHANNEL_GREEN << 3) | (MALI_CHANNEL_ZERO << 6) | (MALI_CHANNEL_ONE << 9),
1088 MALI_CHANNEL_RED | (MALI_CHANNEL_GREEN << 3) | (MALI_CHANNEL_BLUE << 6) | (MALI_CHANNEL_ONE << 9),
1089 MALI_CHANNEL_RED | (MALI_CHANNEL_GREEN << 3) | (MALI_CHANNEL_BLUE << 6) | (MALI_CHANNEL_ALPHA << 9)
1090 };
1091
1092 return (swizzle == default_swizzles[nr_comp - 1]);
1093 }
1094
1095 /* Maps MALI_RGBA32F to rgba32f, etc */
1096
1097 static void
1098 pandecode_format_short(enum mali_format fmt, bool srgb)
1099 {
1100 /* We want a type-like format, so cut off the initial MALI_ */
1101 char *format = pandecode_format(fmt);
1102 format += strlen("MALI_");
1103
1104 unsigned len = strlen(format);
1105 char *lower_format = calloc(1, len + 1);
1106
1107 for (unsigned i = 0; i < len; ++i)
1108 lower_format[i] = tolower(format[i]);
1109
1110 /* Sanity check sRGB flag is applied to RGB, per the name */
1111 if (srgb && lower_format[0] != 'r')
1112 pandecode_msg("XXX: sRGB applied to non-colour format\n");
1113
1114 /* Just prefix with an s, so you get formats like srgba8_unorm */
1115 if (srgb)
1116 pandecode_log_cont("s");
1117
1118 pandecode_log_cont("%s", lower_format);
1119 free(lower_format);
1120 }
1121
1122 static void
1123 pandecode_swizzle(unsigned swizzle, enum mali_format format)
1124 {
1125 /* First, do some validation */
1126 bool trivial_swizzle = pandecode_validate_format_swizzle(
1127 format, swizzle);
1128
1129 if (trivial_swizzle)
1130 return;
1131
1132 /* Next, print the swizzle */
1133 pandecode_log_cont(".");
1134
1135 static const char components[] = "rgba01";
1136
1137 for (unsigned c = 0; c < 4; ++c) {
1138 enum mali_channel chan = (swizzle >> (3 * c)) & 0x7;
1139
1140 if (chan >= MALI_CHANNEL_RESERVED_0) {
1141 pandecode_log("XXX: invalid swizzle channel %d\n", chan);
1142 continue;
1143 }
1144 pandecode_log_cont("%c", components[chan]);
1145 }
1146 }
1147
1148 static void
1149 pandecode_rt_format(struct mali_rt_format format)
1150 {
1151 pandecode_log(".format = {\n");
1152 pandecode_indent++;
1153
1154 pandecode_prop("unk1 = 0x%" PRIx32, format.unk1);
1155 pandecode_prop("unk2 = 0x%" PRIx32, format.unk2);
1156 pandecode_prop("unk3 = 0x%" PRIx32, format.unk3);
1157 pandecode_prop("unk4 = 0x%" PRIx32, format.unk4);
1158
1159 pandecode_prop("block = %s", pandecode_block_format(format.block));
1160
1161 /* TODO: Map formats so we can check swizzles and print nicely */
1162 pandecode_log("swizzle");
1163 pandecode_swizzle(format.swizzle, MALI_RGBA8_UNORM);
1164 pandecode_log_cont(",\n");
1165
1166 pandecode_prop("nr_channels = MALI_POSITIVE(%d)",
1167 (format.nr_channels + 1));
1168
1169 pandecode_log(".flags = ");
1170 pandecode_log_decoded_flags(mfbd_fmt_flag_info, format.flags);
1171 pandecode_log_cont(",\n");
1172
1173 pandecode_prop("msaa = %s", pandecode_msaa_mode(format.msaa));
1174
1175 /* In theory, the no_preload bit can be cleared to enable MFBD preload,
1176 * which is a faster hardware-based alternative to the wallpaper method
1177 * to preserve framebuffer contents across frames. In practice, MFBD
1178 * preload is buggy on Midgard, and so this is a chicken bit. If this
1179 * bit isn't set, most likely something broke unrelated to preload */
1180
1181 if (!format.no_preload) {
1182 pandecode_msg("XXX: buggy MFBD preload enabled - chicken bit should be clear\n");
1183 pandecode_prop("no_preload = 0x%" PRIx32, format.no_preload);
1184 }
1185
1186 if (format.zero)
1187 pandecode_prop("zero = 0x%" PRIx32, format.zero);
1188
1189 pandecode_indent--;
1190 pandecode_log("},\n");
1191 }
1192
1193 static void
1194 pandecode_render_target(uint64_t gpu_va, unsigned job_no, const struct mali_framebuffer *fb)
1195 {
1196 pandecode_log("struct mali_render_target rts_list_%"PRIx64"_%d[] = {\n", gpu_va, job_no);
1197 pandecode_indent++;
1198
1199 for (int i = 0; i < (fb->rt_count_1 + 1); i++) {
1200 mali_ptr rt_va = gpu_va + i * sizeof(struct mali_render_target);
1201 struct pandecode_mapped_memory *mem =
1202 pandecode_find_mapped_gpu_mem_containing(rt_va);
1203 const struct mali_render_target *PANDECODE_PTR_VAR(rt, mem, (mali_ptr) rt_va);
1204
1205 pandecode_log("{\n");
1206 pandecode_indent++;
1207
1208 pandecode_rt_format(rt->format);
1209
1210 if (rt->format.block == MALI_BLOCK_AFBC) {
1211 pandecode_log(".afbc = {\n");
1212 pandecode_indent++;
1213
1214 char *a = pointer_as_memory_reference(rt->afbc.metadata);
1215 pandecode_prop("metadata = %s", a);
1216 free(a);
1217
1218 pandecode_prop("stride = %d", rt->afbc.stride);
1219
1220 pandecode_log(".flags = ");
1221 pandecode_log_decoded_flags(afbc_fmt_flag_info, rt->afbc.flags);
1222 pandecode_log_cont(",\n");
1223
1224 pandecode_indent--;
1225 pandecode_log("},\n");
1226 } else if (rt->afbc.metadata || rt->afbc.stride || rt->afbc.flags) {
1227 pandecode_msg("XXX: AFBC disabled but AFBC field set (0x%lX, 0x%x, 0x%x)\n",
1228 rt->afbc.metadata,
1229 rt->afbc.stride,
1230 rt->afbc.flags);
1231 }
1232
1233 MEMORY_PROP(rt, framebuffer);
1234 pandecode_prop("framebuffer_stride = %d", rt->framebuffer_stride);
1235
1236 if (rt->layer_stride)
1237 pandecode_prop("layer_stride = %d", rt->layer_stride);
1238
1239 if (rt->clear_color_1 | rt->clear_color_2 | rt->clear_color_3 | rt->clear_color_4) {
1240 pandecode_prop("clear_color_1 = 0x%" PRIx32, rt->clear_color_1);
1241 pandecode_prop("clear_color_2 = 0x%" PRIx32, rt->clear_color_2);
1242 pandecode_prop("clear_color_3 = 0x%" PRIx32, rt->clear_color_3);
1243 pandecode_prop("clear_color_4 = 0x%" PRIx32, rt->clear_color_4);
1244 }
1245
1246 if (rt->zero1 || rt->zero2) {
1247 pandecode_msg("XXX: render target zeros tripped\n");
1248 pandecode_prop("zero1 = 0x%" PRIx64, rt->zero1);
1249 pandecode_prop("zero2 = 0x%" PRIx32, rt->zero2);
1250 }
1251
1252 pandecode_indent--;
1253 pandecode_log("},\n");
1254 }
1255
1256 pandecode_indent--;
1257 pandecode_log("};\n");
1258 }
1259
1260 static struct pandecode_fbd
1261 pandecode_mfbd_bfr(uint64_t gpu_va, int job_no, bool is_fragment, bool is_compute, bool is_bifrost)
1262 {
1263 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
1264 const struct mali_framebuffer *PANDECODE_PTR_VAR(fb, mem, (mali_ptr) gpu_va);
1265
1266 struct pandecode_fbd info;
1267
1268 if (is_bifrost && fb->msaa.sample_locations) {
1269 /* The blob stores all possible sample locations in a single buffer
1270 * allocated on startup, and just switches the pointer when switching
1271 * MSAA state. For now, we just put the data into the cmdstream, but we
1272 * should do something like what the blob does with a real driver.
1273 *
1274 * There seem to be 32 slots for sample locations, followed by another
1275 * 16. The second 16 is just the center location followed by 15 zeros
1276 * in all the cases I've identified (maybe shader vs. depth/color
1277 * samples?).
1278 */
1279
1280 struct pandecode_mapped_memory *smem = pandecode_find_mapped_gpu_mem_containing(fb->msaa.sample_locations);
1281
1282 const u16 *PANDECODE_PTR_VAR(samples, smem, fb->msaa.sample_locations);
1283
1284 pandecode_log("uint16_t sample_locations_%d[] = {\n", job_no);
1285 pandecode_indent++;
1286
1287 for (int i = 0; i < 32 + 16; i++) {
1288 pandecode_log("%d, %d,\n", samples[2 * i], samples[2 * i + 1]);
1289 }
1290
1291 pandecode_indent--;
1292 pandecode_log("};\n");
1293 }
1294
1295 pandecode_log("struct mali_framebuffer framebuffer_%"PRIx64"_%d = {\n", gpu_va, job_no);
1296 pandecode_indent++;
1297
1298 if (is_bifrost) {
1299 pandecode_log(".msaa = {\n");
1300 pandecode_indent++;
1301
1302 if (fb->msaa.sample_locations)
1303 pandecode_prop("sample_locations = sample_locations_%d", job_no);
1304 else
1305 pandecode_msg("XXX: sample_locations missing\n");
1306
1307 if (fb->msaa.zero1 || fb->msaa.zero2 || fb->msaa.zero4) {
1308 pandecode_msg("XXX: multisampling zero tripped\n");
1309 pandecode_prop("zero1 = %" PRIx64, fb->msaa.zero1);
1310 pandecode_prop("zero2 = %" PRIx64, fb->msaa.zero2);
1311 pandecode_prop("zero4 = %" PRIx64, fb->msaa.zero4);
1312 }
1313
1314 pandecode_indent--;
1315 pandecode_log("},\n");
1316 } else {
1317 pandecode_log(".shared_memory = {\n");
1318 pandecode_indent++;
1319 pandecode_shared_memory(&fb->shared_memory, is_compute);
1320 pandecode_indent--;
1321 pandecode_log("},\n");
1322 }
1323
1324 info.width = fb->width1 + 1;
1325 info.height = fb->height1 + 1;
1326 info.rt_count = fb->rt_count_1 + 1;
1327
1328 pandecode_prop("width1 = MALI_POSITIVE(%d)", fb->width1 + 1);
1329 pandecode_prop("height1 = MALI_POSITIVE(%d)", fb->height1 + 1);
1330 pandecode_prop("width2 = MALI_POSITIVE(%d)", fb->width2 + 1);
1331 pandecode_prop("height2 = MALI_POSITIVE(%d)", fb->height2 + 1);
1332
1333 pandecode_prop("unk1 = 0x%x", fb->unk1);
1334 pandecode_prop("unk2 = 0x%x", fb->unk2);
1335 pandecode_prop("rt_count_1 = MALI_POSITIVE(%d)", fb->rt_count_1 + 1);
1336 pandecode_prop("rt_count_2 = %d", fb->rt_count_2);
1337
1338 pandecode_log(".mfbd_flags = ");
1339 pandecode_log_decoded_flags(mfbd_flag_info, fb->mfbd_flags);
1340 pandecode_log_cont(",\n");
1341
1342 if (fb->clear_stencil)
1343 pandecode_prop("clear_stencil = 0x%x", fb->clear_stencil);
1344
1345 if (fb->clear_depth)
1346 pandecode_prop("clear_depth = %f", fb->clear_depth);
1347
1348 if (!is_compute)
1349 if (is_bifrost)
1350 pandecode_bifrost_tiler_descriptor(fb);
1351 else {
1352 const struct midgard_tiler_descriptor t = fb->tiler;
1353 pandecode_midgard_tiler_descriptor(&t, fb->width1 + 1, fb->height1 + 1, is_fragment, true);
1354 }
1355 else
1356 pandecode_msg("XXX: skipping compute MFBD, fixme\n");
1357
1358 if (fb->zero3 || fb->zero4) {
1359 pandecode_msg("XXX: framebuffer zeros tripped\n");
1360 pandecode_prop("zero3 = 0x%" PRIx32, fb->zero3);
1361 pandecode_prop("zero4 = 0x%" PRIx32, fb->zero4);
1362 }
1363
1364 pandecode_indent--;
1365 pandecode_log("};\n");
1366
1367 gpu_va += sizeof(struct mali_framebuffer);
1368
1369 info.has_extra = (fb->mfbd_flags & MALI_MFBD_EXTRA) && is_fragment;
1370
1371 if (info.has_extra) {
1372 mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
1373 const struct mali_framebuffer_extra *PANDECODE_PTR_VAR(fbx, mem, (mali_ptr) gpu_va);
1374
1375 pandecode_log("struct mali_framebuffer_extra fb_extra_%"PRIx64"_%d = {\n", gpu_va, job_no);
1376 pandecode_indent++;
1377
1378 MEMORY_PROP(fbx, checksum);
1379
1380 if (fbx->checksum_stride)
1381 pandecode_prop("checksum_stride = %d", fbx->checksum_stride);
1382
1383 pandecode_log(".flags_hi = ");
1384 pandecode_log_decoded_flags(mfbd_extra_flag_hi_info, fbx->flags_hi);
1385 pandecode_log_cont(",\n");
1386
1387 pandecode_log(".flags_lo = ");
1388 pandecode_log_decoded_flags(mfbd_extra_flag_lo_info, fbx->flags_lo);
1389 pandecode_log_cont(",\n");
1390
1391 pandecode_prop("zs_block = %s", pandecode_block_format(fbx->zs_block));
1392 pandecode_prop("zs_samples = MALI_POSITIVE(%u)", fbx->zs_samples + 1);
1393
1394 if (fbx->zs_block == MALI_BLOCK_AFBC) {
1395 pandecode_log(".ds_afbc = {\n");
1396 pandecode_indent++;
1397
1398 MEMORY_PROP_DIR(fbx->ds_afbc, depth_stencil_afbc_metadata);
1399 pandecode_prop("depth_stencil_afbc_stride = %d",
1400 fbx->ds_afbc.depth_stencil_afbc_stride);
1401 MEMORY_PROP_DIR(fbx->ds_afbc, depth_stencil);
1402
1403 pandecode_log(".flags = ");
1404 pandecode_log_decoded_flags(afbc_fmt_flag_info, fbx->ds_afbc.flags);
1405 pandecode_log_cont(",\n");
1406
1407 if (fbx->ds_afbc.padding) {
1408 pandecode_msg("XXX: Depth/stencil AFBC zeros tripped\n");
1409 pandecode_prop("padding = 0x%" PRIx64, fbx->ds_afbc.padding);
1410 }
1411
1412 pandecode_indent--;
1413 pandecode_log("},\n");
1414 } else {
1415 pandecode_log(".ds_linear = {\n");
1416 pandecode_indent++;
1417
1418 if (fbx->ds_linear.depth) {
1419 MEMORY_PROP_DIR(fbx->ds_linear, depth);
1420 pandecode_prop("depth_stride = %d",
1421 fbx->ds_linear.depth_stride);
1422 pandecode_prop("depth_layer_stride = %d",
1423 fbx->ds_linear.depth_layer_stride);
1424 } else if (fbx->ds_linear.depth_stride || fbx->ds_linear.depth_layer_stride) {
1425 pandecode_msg("XXX: depth stride zero tripped %d %d\n", fbx->ds_linear.depth_stride, fbx->ds_linear.depth_layer_stride);
1426 }
1427
1428 if (fbx->ds_linear.stencil) {
1429 MEMORY_PROP_DIR(fbx->ds_linear, stencil);
1430 pandecode_prop("stencil_stride = %d",
1431 fbx->ds_linear.stencil_stride);
1432 pandecode_prop("stencil_layer_stride = %d",
1433 fbx->ds_linear.stencil_layer_stride);
1434 } else if (fbx->ds_linear.stencil_stride || fbx->ds_linear.stencil_layer_stride) {
1435 pandecode_msg("XXX: stencil stride zero tripped %d %d\n", fbx->ds_linear.stencil_stride, fbx->ds_linear.stencil_layer_stride);
1436 }
1437
1438 if (fbx->ds_linear.depth_stride_zero ||
1439 fbx->ds_linear.stencil_stride_zero) {
1440 pandecode_msg("XXX: Depth/stencil zeros tripped\n");
1441 pandecode_prop("depth_stride_zero = 0x%x",
1442 fbx->ds_linear.depth_stride_zero);
1443 pandecode_prop("stencil_stride_zero = 0x%x",
1444 fbx->ds_linear.stencil_stride_zero);
1445 }
1446
1447 pandecode_indent--;
1448 pandecode_log("},\n");
1449 }
1450
1451 if (fbx->clear_color_1 | fbx->clear_color_2) {
1452 pandecode_prop("clear_color_1 = 0x%" PRIx32, fbx->clear_color_1);
1453 pandecode_prop("clear_color_2 = 0x%" PRIx32, fbx->clear_color_2);
1454 }
1455
1456 if (fbx->zero3) {
1457 pandecode_msg("XXX: fb_extra zeros tripped\n");
1458 pandecode_prop("zero3 = 0x%" PRIx64, fbx->zero3);
1459 }
1460
1461 pandecode_indent--;
1462 pandecode_log("};\n");
1463
1464 gpu_va += sizeof(struct mali_framebuffer_extra);
1465 }
1466
1467 if (is_fragment)
1468 pandecode_render_target(gpu_va, job_no, fb);
1469
1470 return info;
1471 }
1472
1473 /* Just add a comment decoding the shift/odd fields forming the padded vertices
1474 * count */
1475
1476 static void
1477 pandecode_padded_vertices(unsigned shift, unsigned k)
1478 {
1479 unsigned odd = 2*k + 1;
1480 unsigned pot = 1 << shift;
1481 pandecode_msg("padded_num_vertices = %d\n", odd * pot);
1482 }
1483
1484 /* Given a magic divisor, recover what we were trying to divide by.
1485 *
1486 * Let m represent the magic divisor. By definition, m is an element on Z, whre
1487 * 0 <= m < 2^N, for N bits in m.
1488 *
1489 * Let q represent the number we would like to divide by.
1490 *
1491 * By definition of a magic divisor for N-bit unsigned integers (a number you
1492 * multiply by to magically get division), m is a number such that:
1493 *
1494 * (m * x) & (2^N - 1) = floor(x/q).
1495 * for all x on Z where 0 <= x < 2^N
1496 *
1497 * Ignore the case where any of the above values equals zero; it is irrelevant
1498 * for our purposes (instanced arrays).
1499 *
1500 * Choose x = q. Then:
1501 *
1502 * (m * x) & (2^N - 1) = floor(x/q).
1503 * (m * q) & (2^N - 1) = floor(q/q).
1504 *
1505 * floor(q/q) = floor(1) = 1, therefore:
1506 *
1507 * (m * q) & (2^N - 1) = 1
1508 *
1509 * Recall the identity that the bitwise AND of one less than a power-of-two
1510 * equals the modulo with that power of two, i.e. for all x:
1511 *
1512 * x & (2^N - 1) = x % N
1513 *
1514 * Therefore:
1515 *
1516 * mq % (2^N) = 1
1517 *
1518 * By definition, a modular multiplicative inverse of a number m is the number
1519 * q such that with respect to a modulos M:
1520 *
1521 * mq % M = 1
1522 *
1523 * Therefore, q is the modular multiplicative inverse of m with modulus 2^N.
1524 *
1525 */
1526
1527 static void
1528 pandecode_magic_divisor(uint32_t magic, unsigned shift, unsigned orig_divisor, unsigned extra)
1529 {
1530 #if 0
1531 /* Compute the modular inverse of `magic` with respect to 2^(32 -
1532 * shift) the most lame way possible... just repeatedly add.
1533 * Asymptoptically slow but nobody cares in practice, unless you have
1534 * massive numbers of vertices or high divisors. */
1535
1536 unsigned inverse = 0;
1537
1538 /* Magic implicitly has the highest bit set */
1539 magic |= (1 << 31);
1540
1541 /* Depending on rounding direction */
1542 if (extra)
1543 magic++;
1544
1545 for (;;) {
1546 uint32_t product = magic * inverse;
1547
1548 if (shift) {
1549 product >>= shift;
1550 }
1551
1552 if (product == 1)
1553 break;
1554
1555 ++inverse;
1556 }
1557
1558 pandecode_msg("dividing by %d (maybe off by two)\n", inverse);
1559
1560 /* Recall we're supposed to divide by (gl_level_divisor *
1561 * padded_num_vertices) */
1562
1563 unsigned padded_num_vertices = inverse / orig_divisor;
1564
1565 pandecode_msg("padded_num_vertices = %d\n", padded_num_vertices);
1566 #endif
1567 }
1568
1569 static void
1570 pandecode_attributes(const struct pandecode_mapped_memory *mem,
1571 mali_ptr addr, int job_no, char *suffix,
1572 int count, bool varying, enum mali_job_type job_type)
1573 {
1574 char *prefix = varying ? "varying" : "attribute";
1575 assert(addr);
1576
1577 if (!count) {
1578 pandecode_msg("warn: No %s records\n", prefix);
1579 return;
1580 }
1581
1582 union mali_attr *attr = pandecode_fetch_gpu_mem(mem, addr, sizeof(union mali_attr) * count);
1583
1584 for (int i = 0; i < count; ++i) {
1585 /* First, check for special records */
1586 if (attr[i].elements < MALI_RECORD_SPECIAL) {
1587 if (attr[i].size)
1588 pandecode_msg("XXX: tripped size=%d\n", attr[i].size);
1589
1590 if (attr[i].stride) {
1591 /* gl_InstanceID passes a magic divisor in the
1592 * stride field to divide by the padded vertex
1593 * count. No other records should do so, so
1594 * stride should otherwise be zero. Note that
1595 * stride in the usual attribute sense doesn't
1596 * apply to special records. */
1597
1598 bool has_divisor = attr[i].elements == MALI_ATTR_INSTANCEID;
1599
1600 pandecode_log_cont("/* %smagic divisor = %X */ ",
1601 has_divisor ? "" : "XXX: ", attr[i].stride);
1602 }
1603
1604 if (attr[i].shift || attr[i].extra_flags) {
1605 /* Attributes use these fields for
1606 * instancing/padding/etc type issues, but
1607 * varyings don't */
1608
1609 pandecode_log_cont("/* %sshift=%d, extra=%d */ ",
1610 varying ? "XXX: " : "",
1611 attr[i].shift, attr[i].extra_flags);
1612 }
1613
1614 /* Print the special record name */
1615 bool attribute = false;
1616 pandecode_log("%s_%d = %s;\n", prefix, i, pandecode_special_record(attr[i].elements, &attribute));
1617
1618 /* Sanity check */
1619 if (attribute == varying)
1620 pandecode_msg("XXX: mismatched special record\n");
1621
1622 continue;
1623 }
1624
1625 enum mali_attr_mode mode = attr[i].elements & 7;
1626
1627 if (mode == MALI_ATTR_UNUSED)
1628 pandecode_msg("XXX: unused attribute record\n");
1629
1630 /* For non-linear records, we need to print the type of record */
1631 if (mode != MALI_ATTR_LINEAR)
1632 pandecode_log_cont("%s ", pandecode_attr_mode_short(mode));
1633
1634 /* Print the name to link with attr_meta */
1635 pandecode_log_cont("%s_%d", prefix, i);
1636
1637 /* Print the stride and size */
1638 pandecode_log_cont("<%u>[%u]", attr[i].stride, attr[i].size);
1639
1640 /* TODO: Sanity check the quotient itself. It must be equal to
1641 * (or be greater than, if the driver added padding) the padded
1642 * vertex count. */
1643
1644 /* Finally, print the pointer */
1645 mali_ptr raw_elements = attr[i].elements & ~7;
1646 char *a = pointer_as_memory_reference(raw_elements);
1647 pandecode_log_cont(" = (%s);\n", a);
1648 free(a);
1649
1650 /* Check the pointer */
1651 pandecode_validate_buffer(raw_elements, attr[i].size);
1652
1653 /* shift/extra_flags exist only for instanced */
1654 if (attr[i].shift | attr[i].extra_flags) {
1655 /* These are set to random values by the blob for
1656 * varyings, most likely a symptom of uninitialized
1657 * memory where the hardware masked the bug. As such we
1658 * put this at a warning, not an error. */
1659
1660 if (mode == MALI_ATTR_LINEAR)
1661 pandecode_msg("warn: instancing fields set for linear\n");
1662
1663 pandecode_prop("shift = %d", attr[i].shift);
1664 pandecode_prop("extra_flags = %d", attr[i].extra_flags);
1665 }
1666
1667 /* Decode further where possible */
1668
1669 if (mode == MALI_ATTR_MODULO) {
1670 pandecode_padded_vertices(
1671 attr[i].shift,
1672 attr[i].extra_flags);
1673 }
1674
1675 if (mode == MALI_ATTR_NPOT_DIVIDE) {
1676 i++;
1677 pandecode_log("{\n");
1678 pandecode_indent++;
1679 pandecode_prop("unk = 0x%x", attr[i].unk);
1680 pandecode_prop("magic_divisor = 0x%08x", attr[i].magic_divisor);
1681 if (attr[i].zero != 0)
1682 pandecode_prop("XXX: zero tripped (0x%x)\n", attr[i].zero);
1683 pandecode_prop("divisor = %d", attr[i].divisor);
1684 pandecode_magic_divisor(attr[i].magic_divisor, attr[i - 1].shift, attr[i].divisor, attr[i - 1].extra_flags);
1685 pandecode_indent--;
1686 pandecode_log("}, \n");
1687 }
1688
1689 }
1690
1691 pandecode_log("\n");
1692 }
1693
1694 static mali_ptr
1695 pandecode_shader_address(const char *name, mali_ptr ptr)
1696 {
1697 /* TODO: Decode flags */
1698 mali_ptr shader_ptr = ptr & ~15;
1699
1700 char *a = pointer_as_memory_reference(shader_ptr);
1701 pandecode_prop("%s = (%s) | %d", name, a, (int) (ptr & 15));
1702 free(a);
1703
1704 return shader_ptr;
1705 }
1706
1707 static void
1708 pandecode_stencil(const char *name, const struct mali_stencil_test *stencil)
1709 {
1710 unsigned any_nonzero =
1711 stencil->ref | stencil->mask | stencil->func |
1712 stencil->sfail | stencil->dpfail | stencil->dppass;
1713
1714 if (any_nonzero == 0)
1715 return;
1716
1717 const char *func = pandecode_func(stencil->func);
1718 const char *sfail = pandecode_stencil_op(stencil->sfail);
1719 const char *dpfail = pandecode_stencil_op(stencil->dpfail);
1720 const char *dppass = pandecode_stencil_op(stencil->dppass);
1721
1722 if (stencil->zero)
1723 pandecode_msg("XXX: stencil zero tripped: %X\n", stencil->zero);
1724
1725 pandecode_log(".stencil_%s = {\n", name);
1726 pandecode_indent++;
1727 pandecode_prop("ref = %d", stencil->ref);
1728 pandecode_prop("mask = 0x%02X", stencil->mask);
1729 pandecode_prop("func = %s", func);
1730 pandecode_prop("sfail = %s", sfail);
1731 pandecode_prop("dpfail = %s", dpfail);
1732 pandecode_prop("dppass = %s", dppass);
1733 pandecode_indent--;
1734 pandecode_log("},\n");
1735 }
1736
1737 static void
1738 pandecode_blend_equation(const struct mali_blend_equation *blend)
1739 {
1740 if (blend->zero1)
1741 pandecode_msg("XXX: blend zero tripped: %X\n", blend->zero1);
1742
1743 pandecode_log(".equation = {\n");
1744 pandecode_indent++;
1745
1746 pandecode_prop("rgb_mode = 0x%X", blend->rgb_mode);
1747 pandecode_prop("alpha_mode = 0x%X", blend->alpha_mode);
1748
1749 pandecode_log(".color_mask = ");
1750 pandecode_log_decoded_flags(mask_flag_info, blend->color_mask);
1751 pandecode_log_cont(",\n");
1752
1753 pandecode_indent--;
1754 pandecode_log("},\n");
1755 }
1756
1757 /* Decodes a Bifrost blend constant. See the notes in bifrost_blend_rt */
1758
1759 static unsigned
1760 decode_bifrost_constant(u16 constant)
1761 {
1762 float lo = (float) (constant & 0xFF);
1763 float hi = (float) (constant >> 8);
1764
1765 return (hi / 255.0) + (lo / 65535.0);
1766 }
1767
1768 static mali_ptr
1769 pandecode_bifrost_blend(void *descs, int job_no, int rt_no)
1770 {
1771 struct bifrost_blend_rt *b =
1772 ((struct bifrost_blend_rt *) descs) + rt_no;
1773
1774 pandecode_log("struct bifrost_blend_rt blend_rt_%d_%d = {\n", job_no, rt_no);
1775 pandecode_indent++;
1776
1777 pandecode_prop("flags = 0x%" PRIx16, b->flags);
1778 pandecode_prop("constant = 0x%" PRIx8 " /* %f */",
1779 b->constant, decode_bifrost_constant(b->constant));
1780
1781 /* TODO figure out blend shader enable bit */
1782 pandecode_blend_equation(&b->equation);
1783
1784 pandecode_prop("unk2 = 0x%" PRIx16, b->unk2);
1785 pandecode_prop("index = 0x%" PRIx16, b->index);
1786
1787 pandecode_log(".format = ");
1788 pandecode_format_short(b->format, false);
1789 pandecode_swizzle(b->swizzle, b->format);
1790 pandecode_log_cont(",\n");
1791
1792 pandecode_prop("swizzle = 0x%" PRIx32, b->swizzle);
1793 pandecode_prop("format = 0x%" PRIx32, b->format);
1794
1795 if (b->zero1) {
1796 pandecode_msg("XXX: pandecode_bifrost_blend zero1 tripped\n");
1797 pandecode_prop("zero1 = 0x%" PRIx32, b->zero1);
1798 }
1799
1800 pandecode_log(".shader_type = ");
1801 switch(b->shader_type) {
1802 case BIFROST_BLEND_F16:
1803 pandecode_log_cont("BIFROST_BLEND_F16");
1804 break;
1805 case BIFROST_BLEND_F32:
1806 pandecode_log_cont("BIFROST_BLEND_F32");
1807 break;
1808 case BIFROST_BLEND_I32:
1809 pandecode_log_cont("BIFROST_BLEND_I32");
1810 break;
1811 case BIFROST_BLEND_U32:
1812 pandecode_log_cont("BIFROST_BLEND_U32");
1813 break;
1814 case BIFROST_BLEND_I16:
1815 pandecode_log_cont("BIFROST_BLEND_I16");
1816 break;
1817 case BIFROST_BLEND_U16:
1818 pandecode_log_cont("BIFROST_BLEND_U16");
1819 break;
1820 }
1821 pandecode_log_cont(",\n");
1822
1823 if (b->zero2) {
1824 pandecode_msg("XXX: pandecode_bifrost_blend zero2 tripped\n");
1825 pandecode_prop("zero2 = 0x%" PRIx32, b->zero2);
1826 }
1827
1828 pandecode_prop("shader = 0x%" PRIx32, b->shader);
1829
1830 pandecode_indent--;
1831 pandecode_log("},\n");
1832
1833 return 0;
1834 }
1835
1836 static mali_ptr
1837 pandecode_midgard_blend(union midgard_blend *blend, bool is_shader)
1838 {
1839 /* constant/equation is in a union */
1840 if (!blend->shader)
1841 return 0;
1842
1843 pandecode_log(".blend = {\n");
1844 pandecode_indent++;
1845
1846 if (is_shader) {
1847 pandecode_shader_address("shader", blend->shader);
1848 } else {
1849 pandecode_blend_equation(&blend->equation);
1850 pandecode_prop("constant = %f", blend->constant);
1851 }
1852
1853 pandecode_indent--;
1854 pandecode_log("},\n");
1855
1856 /* Return blend shader to disassemble if present */
1857 return is_shader ? (blend->shader & ~0xF) : 0;
1858 }
1859
1860 static mali_ptr
1861 pandecode_midgard_blend_mrt(void *descs, int job_no, int rt_no)
1862 {
1863 struct midgard_blend_rt *b =
1864 ((struct midgard_blend_rt *) descs) + rt_no;
1865
1866 /* Flags determine presence of blend shader */
1867 bool is_shader = (b->flags & 0xF) >= 0x2;
1868
1869 pandecode_log("struct midgard_blend_rt blend_rt_%d_%d = {\n", job_no, rt_no);
1870 pandecode_indent++;
1871
1872 pandecode_prop("flags = 0x%" PRIx64, b->flags);
1873
1874 union midgard_blend blend = b->blend;
1875 mali_ptr shader = pandecode_midgard_blend(&blend, is_shader);
1876
1877 pandecode_indent--;
1878 pandecode_log("};\n");
1879
1880 return shader;
1881 }
1882
1883 /* Attributes and varyings have descriptor records, which contain information
1884 * about their format and ordering with the attribute/varying buffers. We'll
1885 * want to validate that the combinations specified are self-consistent.
1886 */
1887
1888 static int
1889 pandecode_attribute_meta(int job_no, int count, const struct mali_vertex_tiler_postfix *v, bool varying, char *suffix)
1890 {
1891 char base[128];
1892 char *prefix = varying ? "varying" : "attribute";
1893 unsigned max_index = 0;
1894 snprintf(base, sizeof(base), "%s_meta", prefix);
1895
1896 struct mali_attr_meta *attr_meta;
1897 mali_ptr p = varying ? v->varying_meta : v->attribute_meta;
1898
1899 struct pandecode_mapped_memory *attr_mem = pandecode_find_mapped_gpu_mem_containing(p);
1900
1901 for (int i = 0; i < count; ++i, p += sizeof(struct mali_attr_meta)) {
1902 attr_meta = pandecode_fetch_gpu_mem(attr_mem, p,
1903 sizeof(*attr_mem));
1904
1905 /* If the record is discard, it should be zero for everything else */
1906
1907 if (attr_meta->format == MALI_VARYING_DISCARD) {
1908 uint64_t zero =
1909 attr_meta->index |
1910 attr_meta->unknown1 |
1911 attr_meta->unknown3 |
1912 attr_meta->src_offset;
1913
1914 if (zero)
1915 pandecode_msg("XXX: expected empty record for varying discard\n");
1916
1917 /* We want to look for a literal 0000 swizzle -- this
1918 * is not encoded with all zeroes, however */
1919
1920 enum mali_channel z = MALI_CHANNEL_ZERO;
1921 unsigned zero_swizzle = z | (z << 3) | (z << 6) | (z << 9);
1922 bool good_swizzle = attr_meta->swizzle == zero_swizzle;
1923
1924 if (!good_swizzle)
1925 pandecode_msg("XXX: expected zero swizzle for discard\n");
1926
1927 if (!varying)
1928 pandecode_msg("XXX: cannot discard attribute\n");
1929
1930 /* If we're all good, omit the record */
1931 if (!zero && varying && good_swizzle) {
1932 pandecode_log("/* discarded varying */\n");
1933 continue;
1934 }
1935 }
1936
1937 if (attr_meta->index > max_index)
1938 max_index = attr_meta->index;
1939
1940 if (attr_meta->unknown1 != 0x2) {
1941 pandecode_msg("XXX: expected unknown1 = 0x2\n");
1942 pandecode_prop("unknown1 = 0x%" PRIx64, (u64) attr_meta->unknown1);
1943 }
1944
1945 if (attr_meta->unknown3) {
1946 pandecode_msg("XXX: unexpected unknown3 set\n");
1947 pandecode_prop("unknown3 = 0x%" PRIx64, (u64) attr_meta->unknown3);
1948 }
1949
1950 pandecode_format_short(attr_meta->format, false);
1951 pandecode_log_cont(" %s_%u", prefix, attr_meta->index);
1952
1953 if (attr_meta->src_offset)
1954 pandecode_log_cont("[%u]", attr_meta->src_offset);
1955
1956 pandecode_swizzle(attr_meta->swizzle, attr_meta->format);
1957
1958 pandecode_log_cont(";\n");
1959 }
1960
1961 pandecode_log("\n");
1962
1963 return count ? (max_index + 1) : 0;
1964 }
1965
1966 /* return bits [lo, hi) of word */
1967 static u32
1968 bits(u32 word, u32 lo, u32 hi)
1969 {
1970 if (hi - lo >= 32)
1971 return word; // avoid undefined behavior with the shift
1972
1973 return (word >> lo) & ((1 << (hi - lo)) - 1);
1974 }
1975
1976 static void
1977 pandecode_vertex_tiler_prefix(struct mali_vertex_tiler_prefix *p, int job_no, bool graphics)
1978 {
1979 pandecode_log(".prefix = {\n");
1980 pandecode_indent++;
1981
1982 /* Decode invocation_count. See the comment before the definition of
1983 * invocation_count for an explanation.
1984 */
1985
1986 unsigned size_y_shift = bits(p->invocation_shifts, 0, 5);
1987 unsigned size_z_shift = bits(p->invocation_shifts, 5, 10);
1988 unsigned workgroups_x_shift = bits(p->invocation_shifts, 10, 16);
1989 unsigned workgroups_y_shift = bits(p->invocation_shifts, 16, 22);
1990 unsigned workgroups_z_shift = bits(p->invocation_shifts, 22, 28);
1991 unsigned workgroups_x_shift_2 = bits(p->invocation_shifts, 28, 32);
1992
1993 unsigned size_x = bits(p->invocation_count, 0, size_y_shift) + 1;
1994 unsigned size_y = bits(p->invocation_count, size_y_shift, size_z_shift) + 1;
1995 unsigned size_z = bits(p->invocation_count, size_z_shift, workgroups_x_shift) + 1;
1996
1997 unsigned groups_x = bits(p->invocation_count, workgroups_x_shift, workgroups_y_shift) + 1;
1998 unsigned groups_y = bits(p->invocation_count, workgroups_y_shift, workgroups_z_shift) + 1;
1999 unsigned groups_z = bits(p->invocation_count, workgroups_z_shift, 32) + 1;
2000
2001 /* Even though we have this decoded, we want to ensure that the
2002 * representation is "unique" so we don't lose anything by printing only
2003 * the final result. More specifically, we need to check that we were
2004 * passed something in canonical form, since the definition per the
2005 * hardware is inherently not unique. How? Well, take the resulting
2006 * decode and pack it ourselves! If it is bit exact with what we
2007 * decoded, we're good to go. */
2008
2009 struct mali_vertex_tiler_prefix ref;
2010 panfrost_pack_work_groups_compute(&ref, groups_x, groups_y, groups_z, size_x, size_y, size_z, graphics);
2011
2012 bool canonical =
2013 (p->invocation_count == ref.invocation_count) &&
2014 (p->invocation_shifts == ref.invocation_shifts);
2015
2016 if (!canonical) {
2017 pandecode_msg("XXX: non-canonical workgroups packing\n");
2018 pandecode_msg("expected: %X, %X",
2019 ref.invocation_count,
2020 ref.invocation_shifts);
2021
2022 pandecode_prop("invocation_count = 0x%" PRIx32, p->invocation_count);
2023 pandecode_prop("size_y_shift = %d", size_y_shift);
2024 pandecode_prop("size_z_shift = %d", size_z_shift);
2025 pandecode_prop("workgroups_x_shift = %d", workgroups_x_shift);
2026 pandecode_prop("workgroups_y_shift = %d", workgroups_y_shift);
2027 pandecode_prop("workgroups_z_shift = %d", workgroups_z_shift);
2028 pandecode_prop("workgroups_x_shift_2 = %d", workgroups_x_shift_2);
2029 }
2030
2031 /* Regardless, print the decode */
2032 pandecode_msg("size (%d, %d, %d), count (%d, %d, %d)\n",
2033 size_x, size_y, size_z,
2034 groups_x, groups_y, groups_z);
2035
2036 /* TODO: Decode */
2037 if (p->unknown_draw)
2038 pandecode_prop("unknown_draw = 0x%" PRIx32, p->unknown_draw);
2039
2040 pandecode_prop("workgroups_x_shift_3 = 0x%" PRIx32, p->workgroups_x_shift_3);
2041
2042 if (p->draw_mode != MALI_DRAW_NONE)
2043 pandecode_prop("draw_mode = %s", pandecode_draw_mode(p->draw_mode));
2044
2045 /* Index count only exists for tiler jobs anyway */
2046
2047 if (p->index_count)
2048 pandecode_prop("index_count = MALI_POSITIVE(%" PRId32 ")", p->index_count + 1);
2049
2050
2051 unsigned index_raw_size = (p->unknown_draw & MALI_DRAW_INDEXED_SIZE);
2052 index_raw_size >>= MALI_DRAW_INDEXED_SHIFT;
2053
2054 /* Validate an index buffer is present if we need one. TODO: verify
2055 * relationship between invocation_count and index_count */
2056
2057 if (p->indices) {
2058 unsigned count = p->index_count;
2059
2060 /* Grab the size */
2061 unsigned size = (index_raw_size == 0x3) ? 4 : index_raw_size;
2062
2063 /* Ensure we got a size, and if so, validate the index buffer
2064 * is large enough to hold a full set of indices of the given
2065 * size */
2066
2067 if (!index_raw_size)
2068 pandecode_msg("XXX: index size missing\n");
2069 else
2070 pandecode_validate_buffer(p->indices, count * size);
2071 } else if (index_raw_size)
2072 pandecode_msg("XXX: unexpected index size %u\n", index_raw_size);
2073
2074 if (p->offset_bias_correction)
2075 pandecode_prop("offset_bias_correction = %d", p->offset_bias_correction);
2076
2077 /* TODO: Figure out what this is. It's not zero */
2078 pandecode_prop("zero1 = 0x%" PRIx32, p->zero1);
2079
2080 pandecode_indent--;
2081 pandecode_log("},\n");
2082 }
2083
2084 static void
2085 pandecode_uniform_buffers(mali_ptr pubufs, int ubufs_count, int job_no)
2086 {
2087 struct pandecode_mapped_memory *umem = pandecode_find_mapped_gpu_mem_containing(pubufs);
2088 uint64_t *PANDECODE_PTR_VAR(ubufs, umem, pubufs);
2089
2090 for (int i = 0; i < ubufs_count; i++) {
2091 unsigned size = (ubufs[i] & ((1 << 10) - 1)) * 16;
2092 mali_ptr addr = (ubufs[i] >> 10) << 2;
2093
2094 pandecode_validate_buffer(addr, size);
2095
2096 char *ptr = pointer_as_memory_reference(addr);
2097 pandecode_log("ubuf_%d[%u] = %s;\n", i, size, ptr);
2098 free(ptr);
2099 }
2100
2101 pandecode_log("\n");
2102 }
2103
2104 static void
2105 pandecode_uniforms(mali_ptr uniforms, unsigned uniform_count)
2106 {
2107 pandecode_validate_buffer(uniforms, uniform_count * 16);
2108
2109 char *ptr = pointer_as_memory_reference(uniforms);
2110 pandecode_log("vec4 uniforms[%u] = %s;\n", uniform_count, ptr);
2111 free(ptr);
2112 }
2113
2114 static const char *
2115 shader_type_for_job(unsigned type)
2116 {
2117 switch (type) {
2118 case JOB_TYPE_VERTEX: return "VERTEX";
2119 case JOB_TYPE_TILER: return "FRAGMENT";
2120 case JOB_TYPE_COMPUTE: return "COMPUTE";
2121 default:
2122 return "UNKNOWN";
2123 }
2124 }
2125
2126 static unsigned shader_id = 0;
2127
2128 static struct midgard_disasm_stats
2129 pandecode_shader_disassemble(mali_ptr shader_ptr, int shader_no, int type,
2130 bool is_bifrost, unsigned gpu_id)
2131 {
2132 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(shader_ptr);
2133 uint8_t *PANDECODE_PTR_VAR(code, mem, shader_ptr);
2134
2135 /* Compute maximum possible size */
2136 size_t sz = mem->length - (shader_ptr - mem->gpu_va);
2137
2138 /* Print some boilerplate to clearly denote the assembly (which doesn't
2139 * obey indentation rules), and actually do the disassembly! */
2140
2141 pandecode_log_cont("\n\n");
2142
2143 struct midgard_disasm_stats stats;
2144
2145 if (is_bifrost) {
2146 disassemble_bifrost(pandecode_dump_stream, code, sz, true);
2147
2148 /* TODO: Extend stats to Bifrost */
2149 stats.texture_count = -128;
2150 stats.sampler_count = -128;
2151 stats.attribute_count = -128;
2152 stats.varying_count = -128;
2153 stats.uniform_count = -128;
2154 stats.uniform_buffer_count = -128;
2155 stats.work_count = -128;
2156
2157 stats.instruction_count = 0;
2158 stats.bundle_count = 0;
2159 stats.quadword_count = 0;
2160 stats.helper_invocations = false;
2161 } else {
2162 stats = disassemble_midgard(pandecode_dump_stream,
2163 code, sz, gpu_id,
2164 type == JOB_TYPE_TILER ?
2165 MESA_SHADER_FRAGMENT : MESA_SHADER_VERTEX);
2166 }
2167
2168 /* Print shader-db stats. Skip COMPUTE jobs since they are used for
2169 * driver-internal purposes with the blob and interfere */
2170
2171 bool should_shaderdb = type != JOB_TYPE_COMPUTE;
2172
2173 if (should_shaderdb) {
2174 unsigned nr_threads =
2175 (stats.work_count <= 4) ? 4 :
2176 (stats.work_count <= 8) ? 2 :
2177 1;
2178
2179 pandecode_log_cont("shader%d - MESA_SHADER_%s shader: "
2180 "%u inst, %u bundles, %u quadwords, "
2181 "%u registers, %u threads, 0 loops, 0:0 spills:fills\n\n\n",
2182 shader_id++,
2183 shader_type_for_job(type),
2184 stats.instruction_count, stats.bundle_count, stats.quadword_count,
2185 stats.work_count, nr_threads);
2186 }
2187
2188
2189 return stats;
2190 }
2191
2192 static void
2193 pandecode_texture_payload(mali_ptr payload,
2194 enum mali_texture_type type,
2195 enum mali_texture_layout layout,
2196 bool manual_stride,
2197 uint8_t levels,
2198 uint16_t depth,
2199 uint16_t array_size,
2200 struct pandecode_mapped_memory *tmem)
2201 {
2202 pandecode_log(".payload = {\n");
2203 pandecode_indent++;
2204
2205 /* A bunch of bitmap pointers follow.
2206 * We work out the correct number,
2207 * based on the mipmap/cubemap
2208 * properties, but dump extra
2209 * possibilities to futureproof */
2210
2211 int bitmap_count = levels + 1;
2212
2213 /* Miptree for each face */
2214 if (type == MALI_TEX_CUBE)
2215 bitmap_count *= 6;
2216
2217 /* Array of layers */
2218 bitmap_count *= (depth + 1);
2219
2220 /* Array of textures */
2221 bitmap_count *= (array_size + 1);
2222
2223 /* Stride for each element */
2224 if (manual_stride)
2225 bitmap_count *= 2;
2226
2227 mali_ptr *pointers_and_strides = pandecode_fetch_gpu_mem(tmem,
2228 payload, sizeof(mali_ptr) * bitmap_count);
2229 for (int i = 0; i < bitmap_count; ++i) {
2230 /* How we dump depends if this is a stride or a pointer */
2231
2232 if (manual_stride && (i & 1)) {
2233 /* signed 32-bit snuck in as a 64-bit pointer */
2234 uint64_t stride_set = pointers_and_strides[i];
2235 uint32_t clamped_stride = stride_set;
2236 int32_t stride = clamped_stride;
2237 assert(stride_set == clamped_stride);
2238 pandecode_log("(mali_ptr) %d /* stride */, \n", stride);
2239 } else {
2240 char *a = pointer_as_memory_reference(pointers_and_strides[i]);
2241 pandecode_log("%s, \n", a);
2242 free(a);
2243 }
2244 }
2245
2246 pandecode_indent--;
2247 pandecode_log("},\n");
2248 }
2249
2250 static void
2251 pandecode_texture(mali_ptr u,
2252 struct pandecode_mapped_memory *tmem,
2253 unsigned job_no, unsigned tex)
2254 {
2255 struct mali_texture_descriptor *PANDECODE_PTR_VAR(t, tmem, u);
2256
2257 pandecode_log("struct mali_texture_descriptor texture_descriptor_%"PRIx64"_%d_%d = {\n", u, job_no, tex);
2258 pandecode_indent++;
2259
2260 pandecode_prop("width = %" PRId32, t->width);
2261 pandecode_prop("height = %" PRId32, t->height);
2262 pandecode_prop("depth = %" PRId32, t->depth);
2263 pandecode_prop("array_size = %" PRId32, t->array_size);
2264
2265 pandecode_log("\n");
2266 pandecode_prop("f.swizzle = 0x%" PRIx32, t->format.swizzle);
2267 pandecode_prop("f.format = 0x%" PRIx32, t->format.format);
2268 pandecode_prop("f.srgb = 0x%" PRIx32, t->format.srgb);
2269 pandecode_prop("f.unknown1 = 0x%" PRIx32, t->format.unknown1);
2270 pandecode_prop("f.type = %" PRId32, t->format.type);
2271 pandecode_prop("f.layout = %" PRId32, t->format.layout);
2272 pandecode_prop("f.unknown2 = 0x%" PRIx32, t->format.unknown2);
2273 pandecode_prop("f.manual_stride = %" PRId32, t->format.manual_stride);
2274 pandecode_prop("f.zero = 0x%" PRIx32, t->format.zero);
2275 pandecode_log("\n");
2276
2277 pandecode_prop("unknown3 = 0x%" PRIx32, t->unknown3);
2278 pandecode_prop("unknown3A = 0x%" PRIx32, t->unknown3A);
2279 pandecode_prop("levels = %" PRId32, t->levels);
2280 pandecode_prop("swizzle = 0x%" PRIx32, t->swizzle);
2281 pandecode_prop("swizzle_zero = 0x%" PRIx32, t->swizzle_zero);
2282
2283 pandecode_prop("unknown5 = 0x%" PRIx32, t->unknown5);
2284 pandecode_prop("unknown6 = 0x%" PRIx32, t->unknown6);
2285 pandecode_prop("unknown7 = 0x%" PRIx32, t->unknown7);
2286 pandecode_log("\n");
2287
2288 struct mali_texture_format f = t->format;
2289
2290 /* See the definiton of enum mali_texture_type */
2291
2292 bool is_cube = f.type == MALI_TEX_CUBE;
2293 unsigned dimension = is_cube ? 2 : f.type;
2294
2295 pandecode_make_indent();
2296
2297 /* Print the layout. Default is linear; a modifier can denote AFBC or
2298 * u-interleaved/tiled modes */
2299
2300 if (f.layout == MALI_TEXTURE_AFBC)
2301 pandecode_log_cont("afbc");
2302 else if (f.layout == MALI_TEXTURE_TILED)
2303 pandecode_log_cont("tiled");
2304 else if (f.layout == MALI_TEXTURE_LINEAR)
2305 pandecode_log_cont("linear");
2306 else
2307 pandecode_msg("XXX: invalid texture layout 0x%X\n", f.layout);
2308
2309 pandecode_swizzle(t->swizzle, f.format);
2310 pandecode_log_cont(" ");
2311
2312 /* Distinguish cube/2D with modifier */
2313
2314 if (is_cube)
2315 pandecode_log_cont("cube ");
2316
2317 pandecode_format_short(f.format, f.srgb);
2318 pandecode_swizzle(f.swizzle, f.format);
2319
2320 /* All four width/height/depth/array_size dimensions are present
2321 * regardless of the type of texture, but it is an error to have
2322 * non-zero dimensions for unused dimensions. Verify this. array_size
2323 * can always be set, as can width. Depth used for MSAA. */
2324
2325 if (t->height && dimension < 2)
2326 pandecode_msg("XXX: nonzero height for <2D texture\n");
2327
2328 /* Print only the dimensions that are actually there */
2329
2330 pandecode_log_cont(": %d", t->width + 1);
2331
2332 if (t->height || t->depth)
2333 pandecode_log_cont("x%u", t->height + 1);
2334
2335 if (t->depth)
2336 pandecode_log_cont("x%u", t->depth + 1);
2337
2338 if (t->array_size)
2339 pandecode_log_cont("[%u]", t->array_size + 1);
2340
2341 if (t->levels)
2342 pandecode_log_cont(" mip %u", t->levels);
2343
2344 pandecode_log_cont("\n");
2345
2346 if (f.unknown1 | f.zero) {
2347 pandecode_msg("XXX: texture format zero tripped\n");
2348 pandecode_prop("unknown1 = %" PRId32, f.unknown1);
2349 pandecode_prop("zero = %" PRId32, f.zero);
2350 }
2351
2352 if (!f.unknown2) {
2353 pandecode_msg("XXX: expected unknown texture bit set\n");
2354 pandecode_prop("unknown2 = %" PRId32, f.unknown2);
2355 }
2356
2357 if (t->swizzle_zero) {
2358 pandecode_msg("XXX: swizzle zero tripped\n");
2359 pandecode_prop("swizzle_zero = %d", t->swizzle_zero);
2360 }
2361
2362 if (t->unknown3 | t->unknown3A | t->unknown5 | t->unknown6 | t->unknown7) {
2363 pandecode_msg("XXX: texture zero tripped\n");
2364 pandecode_prop("unknown3 = %" PRId16, t->unknown3);
2365 pandecode_prop("unknown3A = %" PRId8, t->unknown3A);
2366 pandecode_prop("unknown5 = 0x%" PRIx32, t->unknown5);
2367 pandecode_prop("unknown6 = 0x%" PRIx32, t->unknown6);
2368 pandecode_prop("unknown7 = 0x%" PRIx32, t->unknown7);
2369 }
2370
2371 pandecode_texture_payload(u + sizeof(*t), f.type, f.layout, f.manual_stride, t->levels, t->depth, t->array_size, tmem);
2372
2373 pandecode_indent--;
2374 pandecode_log("};\n");
2375 }
2376
2377 static void
2378 pandecode_bifrost_texture(
2379 const struct bifrost_texture_descriptor *t,
2380 unsigned job_no,
2381 unsigned tex)
2382 {
2383 pandecode_log("struct bifrost_texture_descriptor texture_descriptor_%d_%d = {\n", job_no, tex);
2384 pandecode_indent++;
2385
2386 pandecode_prop("format_unk = 0x%" PRIx32, t->format_unk);
2387 pandecode_prop("type = %" PRId32, t->type);
2388
2389 if (t->zero) {
2390 pandecode_msg("XXX: zero tripped\n");
2391 pandecode_prop("zero = 0x%" PRIx32, t->zero);
2392 }
2393
2394 pandecode_prop("format_swizzle = 0x%" PRIx32, t->format_swizzle);
2395 pandecode_prop("format = 0x%" PRIx32, t->format);
2396 pandecode_prop("srgb = 0x%" PRIx32, t->srgb);
2397 pandecode_prop("format_unk3 = 0x%" PRIx32, t->format_unk3);
2398 pandecode_prop("width = %" PRId32, t->width);
2399 pandecode_prop("height = %" PRId32, t->height);
2400 pandecode_prop("swizzle = 0x%" PRIx32, t->swizzle);
2401 pandecode_prop("levels = %" PRId32, t->levels);
2402 pandecode_prop("unk1 = 0x%" PRIx32, t->unk1);
2403 pandecode_prop("levels_unk = %" PRId32, t->levels_unk);
2404 pandecode_prop("level_2 = %" PRId32, t->level_2);
2405 pandecode_prop("payload = 0x%" PRIx64, t->payload);
2406 pandecode_prop("array_size = %" PRId32, t->array_size);
2407 pandecode_prop("unk4 = 0x%" PRIx32, t->unk4);
2408 pandecode_prop("depth = %" PRId32, t->depth);
2409 pandecode_prop("unk5 = 0x%" PRIx32, t->unk5);
2410 pandecode_log("\n");
2411
2412 /* See the definiton of enum mali_texture_type */
2413
2414 bool is_cube = t->type == MALI_TEX_CUBE;
2415 unsigned dimension = is_cube ? 2 : t->type;
2416
2417 /* Print the layout. Default is linear; a modifier can denote AFBC or
2418 * u-interleaved/tiled modes */
2419
2420 if (t->layout == MALI_TEXTURE_AFBC)
2421 pandecode_log_cont("afbc");
2422 else if (t->layout == MALI_TEXTURE_TILED)
2423 pandecode_log_cont("tiled");
2424 else if (t->layout == MALI_TEXTURE_LINEAR)
2425 pandecode_log_cont("linear");
2426 else
2427 pandecode_msg("XXX: invalid texture layout 0x%X\n", t->layout);
2428
2429 pandecode_swizzle(t->swizzle, t->format);
2430 pandecode_log_cont(" ");
2431
2432 /* Distinguish cube/2D with modifier */
2433
2434 if (is_cube)
2435 pandecode_log_cont("cube ");
2436
2437 pandecode_format_short(t->format, t->srgb);
2438
2439 /* All four width/height/depth/array_size dimensions are present
2440 * regardless of the type of texture, but it is an error to have
2441 * non-zero dimensions for unused dimensions. Verify this. array_size
2442 * can always be set, as can width. */
2443
2444 if (t->height && dimension < 2)
2445 pandecode_msg("XXX: nonzero height for <2D texture\n");
2446
2447 if (t->depth && dimension < 3)
2448 pandecode_msg("XXX: nonzero depth for <2D texture\n");
2449
2450 /* Print only the dimensions that are actually there */
2451
2452 pandecode_log_cont(": %d", t->width + 1);
2453
2454 if (dimension >= 2)
2455 pandecode_log_cont("x%u", t->height + 1);
2456
2457 if (dimension >= 3)
2458 pandecode_log_cont("x%u", t->depth + 1);
2459
2460 if (t->array_size)
2461 pandecode_log_cont("[%u]", t->array_size + 1);
2462
2463 if (t->levels)
2464 pandecode_log_cont(" mip %u", t->levels);
2465
2466 pandecode_log_cont("\n");
2467
2468 struct pandecode_mapped_memory *tmem = pandecode_find_mapped_gpu_mem_containing(t->payload);
2469 if (t->payload) {
2470 pandecode_texture_payload(t->payload, t->type, t->layout,
2471 true, t->levels, t->depth,
2472 t->array_size, tmem);
2473 }
2474
2475 pandecode_indent--;
2476 pandecode_log("};\n");
2477 }
2478
2479 /* For shader properties like texture_count, we have a claimed property in the shader_meta, and the actual Truth from static analysis (this may just be an upper limit). We validate accordingly */
2480
2481 static void
2482 pandecode_shader_prop(const char *name, unsigned claim, signed truth, bool fuzzy)
2483 {
2484 /* Nothing to do */
2485 if (claim == truth)
2486 return;
2487
2488 if (fuzzy && (truth < 0))
2489 pandecode_msg("XXX: fuzzy %s, claimed %d, expected %d\n", name, claim, truth);
2490
2491 if ((truth >= 0) && !fuzzy) {
2492 pandecode_msg("%s: expected %s = %d, claimed %u\n",
2493 (truth < claim) ? "warn" : "XXX",
2494 name, truth, claim);
2495 } else if ((claim > -truth) && !fuzzy) {
2496 pandecode_msg("XXX: expected %s <= %u, claimed %u\n",
2497 name, -truth, claim);
2498 } else if (fuzzy && (claim < truth))
2499 pandecode_msg("XXX: expected %s >= %u, claimed %u\n",
2500 name, truth, claim);
2501
2502 pandecode_log(".%s = %" PRId16, name, claim);
2503
2504 if (fuzzy)
2505 pandecode_log_cont(" /* %u used */", truth);
2506
2507 pandecode_log_cont(",\n");
2508 }
2509
2510 static void
2511 pandecode_blend_shader_disassemble(mali_ptr shader, int job_no, int job_type,
2512 bool is_bifrost, unsigned gpu_id)
2513 {
2514 struct midgard_disasm_stats stats =
2515 pandecode_shader_disassemble(shader, job_no, job_type, is_bifrost, gpu_id);
2516
2517 bool has_texture = (stats.texture_count > 0);
2518 bool has_sampler = (stats.sampler_count > 0);
2519 bool has_attribute = (stats.attribute_count > 0);
2520 bool has_varying = (stats.varying_count > 0);
2521 bool has_uniform = (stats.uniform_count > 0);
2522 bool has_ubo = (stats.uniform_buffer_count > 0);
2523
2524 if (has_texture || has_sampler)
2525 pandecode_msg("XXX: blend shader accessing textures\n");
2526
2527 if (has_attribute || has_varying)
2528 pandecode_msg("XXX: blend shader accessing interstage\n");
2529
2530 if (has_uniform || has_ubo)
2531 pandecode_msg("XXX: blend shader accessing uniforms\n");
2532 }
2533
2534 static void
2535 pandecode_textures(mali_ptr textures, unsigned texture_count, int job_no, bool is_bifrost)
2536 {
2537 struct pandecode_mapped_memory *mmem = pandecode_find_mapped_gpu_mem_containing(textures);
2538
2539 if (!mmem)
2540 return;
2541
2542 if (is_bifrost) {
2543 const struct bifrost_texture_descriptor *PANDECODE_PTR_VAR(t, mmem, textures);
2544
2545 pandecode_log("uint64_t textures_%"PRIx64"_%d[] = {\n", textures, job_no);
2546 pandecode_indent++;
2547
2548 for (unsigned tex = 0; tex < texture_count; ++tex)
2549 pandecode_bifrost_texture(&t[tex], job_no, tex);
2550
2551 pandecode_indent--;
2552 pandecode_log("};\n");
2553 } else {
2554 mali_ptr *PANDECODE_PTR_VAR(u, mmem, textures);
2555
2556 pandecode_log("uint64_t textures_%"PRIx64"_%d[] = {\n", textures, job_no);
2557 pandecode_indent++;
2558
2559 for (int tex = 0; tex < texture_count; ++tex) {
2560 mali_ptr *PANDECODE_PTR_VAR(u, mmem, textures + tex * sizeof(mali_ptr));
2561 char *a = pointer_as_memory_reference(*u);
2562 pandecode_log("%s,\n", a);
2563 free(a);
2564 }
2565
2566 pandecode_indent--;
2567 pandecode_log("};\n");
2568
2569 /* Now, finally, descend down into the texture descriptor */
2570 for (unsigned tex = 0; tex < texture_count; ++tex) {
2571 mali_ptr *PANDECODE_PTR_VAR(u, mmem, textures + tex * sizeof(mali_ptr));
2572 struct pandecode_mapped_memory *tmem = pandecode_find_mapped_gpu_mem_containing(*u);
2573 if (tmem)
2574 pandecode_texture(*u, tmem, job_no, tex);
2575 }
2576 }
2577 }
2578
2579 static void
2580 pandecode_samplers(mali_ptr samplers, unsigned sampler_count, int job_no, bool is_bifrost)
2581 {
2582 struct pandecode_mapped_memory *smem = pandecode_find_mapped_gpu_mem_containing(samplers);
2583
2584 if (!smem)
2585 return;
2586
2587 if (is_bifrost) {
2588 struct bifrost_sampler_descriptor *s;
2589
2590 for (int i = 0; i < sampler_count; ++i) {
2591 s = pandecode_fetch_gpu_mem(smem, samplers + sizeof(*s) * i, sizeof(*s));
2592
2593 pandecode_log("struct bifrost_sampler_descriptor sampler_descriptor_%"PRIx64"_%d_%d = {\n", samplers + sizeof(*s) * i, job_no, i);
2594 pandecode_indent++;
2595
2596 if (s->unk1 != 1) {
2597 pandecode_msg("XXX: unk1 tripped\n");
2598 pandecode_prop("unk1 = 0x%x", s->unk1);
2599 }
2600
2601 pandecode_prop("wrap_s = %s", pandecode_wrap_mode(s->wrap_s));
2602 pandecode_prop("wrap_t = %s", pandecode_wrap_mode(s->wrap_t));
2603 pandecode_prop("wrap_r = %s", pandecode_wrap_mode(s->wrap_r));
2604
2605 if (s->unk8 != 0x8) {
2606 pandecode_msg("XXX: unk8 tripped\n");
2607 pandecode_prop("unk8 = 0x%x", s->unk8);
2608 }
2609
2610 pandecode_prop("unk2 = 0x%x", s->unk2);
2611 pandecode_prop("unk3 = 0x%x", s->unk3);
2612 pandecode_prop("min_filter = %s", s->min_filter ? "nearest" : "linear");
2613 pandecode_prop("norm_coords = 0x%x", s->norm_coords & 0x1);
2614 pandecode_prop("zero1 = 0x%x", s->zero1 & 0x1);
2615 pandecode_prop("mip_filter = %s", s->mip_filter ? "linear" : "nearest");
2616 pandecode_prop("mag_filter = %s", s->mag_filter ? "linear" : "nearest");
2617
2618 pandecode_prop("min_lod = FIXED_16(%f)", DECODE_FIXED_16(s->min_lod));
2619 pandecode_prop("max_lod = FIXED_16(%f)", DECODE_FIXED_16(s->max_lod));
2620
2621 if (s->zero1 || s->zero2 || s->zero3 || s->zero4) {
2622 pandecode_msg("XXX: sampler zero tripped\n");
2623 pandecode_prop("zero = 0x%" PRIx8 ", 0x%" PRIx64 ", 0x%" PRIx64 ", 0x%" PRIx64 "\n", s->zero1, s->zero2, s->zero3, s->zero4);
2624 }
2625
2626 pandecode_indent--;
2627 pandecode_log("};\n");
2628 }
2629 } else {
2630 struct mali_sampler_descriptor *s;
2631
2632 for (int i = 0; i < sampler_count; ++i) {
2633 s = pandecode_fetch_gpu_mem(smem, samplers + sizeof(*s) * i, sizeof(*s));
2634
2635 pandecode_log("struct mali_sampler_descriptor sampler_descriptor_%"PRIx64"_%d_%d = {\n", samplers + sizeof(*s) * i, job_no, i);
2636 pandecode_indent++;
2637
2638 pandecode_log(".filter_mode = ");
2639 pandecode_log_decoded_flags(sampler_flag_info, s->filter_mode);
2640 pandecode_log_cont(",\n");
2641
2642 pandecode_prop("min_lod = FIXED_16(%f)", DECODE_FIXED_16(s->min_lod));
2643 pandecode_prop("max_lod = FIXED_16(%f)", DECODE_FIXED_16(s->max_lod));
2644
2645 if (s->lod_bias)
2646 pandecode_prop("lod_bias = FIXED_16(%f)", DECODE_FIXED_16(s->lod_bias));
2647
2648 pandecode_prop("wrap_s = %s", pandecode_wrap_mode(s->wrap_s));
2649 pandecode_prop("wrap_t = %s", pandecode_wrap_mode(s->wrap_t));
2650 pandecode_prop("wrap_r = %s", pandecode_wrap_mode(s->wrap_r));
2651
2652 pandecode_prop("compare_func = %s", pandecode_func(s->compare_func));
2653
2654 if (s->zero || s->zero2) {
2655 pandecode_msg("XXX: sampler zero tripped\n");
2656 pandecode_prop("zero = 0x%X, 0x%X\n", s->zero, s->zero2);
2657 }
2658
2659 pandecode_prop("seamless_cube_map = %d", s->seamless_cube_map);
2660
2661 pandecode_prop("border_color = { %f, %f, %f, %f }",
2662 s->border_color[0],
2663 s->border_color[1],
2664 s->border_color[2],
2665 s->border_color[3]);
2666
2667 pandecode_indent--;
2668 pandecode_log("};\n");
2669 }
2670 }
2671 }
2672
2673 static void
2674 pandecode_vertex_tiler_postfix_pre(
2675 const struct mali_vertex_tiler_postfix *p,
2676 int job_no, enum mali_job_type job_type,
2677 char *suffix, bool is_bifrost, unsigned gpu_id)
2678 {
2679 struct pandecode_mapped_memory *attr_mem;
2680
2681 /* On Bifrost, since the tiler heap (for tiler jobs) and the scratchpad
2682 * are the only things actually needed from the FBD, vertex/tiler jobs
2683 * no longer reference the FBD -- instead, this field points to some
2684 * info about the scratchpad.
2685 */
2686
2687 struct pandecode_fbd fbd_info = {
2688 /* Default for Bifrost */
2689 .rt_count = 1
2690 };
2691
2692 if (is_bifrost) {
2693 pandecode_log_cont("\t/* %X %/\n", p->shared_memory & 1);
2694 pandecode_compute_fbd(p->shared_memory & ~1, job_no);
2695 } else if (p->shared_memory & MALI_MFBD)
2696 fbd_info = pandecode_mfbd_bfr((u64) ((uintptr_t) p->shared_memory) & FBD_MASK, job_no, false, job_type == JOB_TYPE_COMPUTE, false);
2697 else if (job_type == JOB_TYPE_COMPUTE)
2698 pandecode_compute_fbd((u64) (uintptr_t) p->shared_memory, job_no);
2699 else
2700 fbd_info = pandecode_sfbd((u64) (uintptr_t) p->shared_memory, job_no, false, gpu_id);
2701
2702 int varying_count = 0, attribute_count = 0, uniform_count = 0, uniform_buffer_count = 0;
2703 int texture_count = 0, sampler_count = 0;
2704
2705 if (p->shader) {
2706 struct pandecode_mapped_memory *smem = pandecode_find_mapped_gpu_mem_containing(p->shader);
2707 struct mali_shader_meta *PANDECODE_PTR_VAR(s, smem, p->shader);
2708
2709 /* Disassemble ahead-of-time to get stats. Initialize with
2710 * stats for the missing-shader case so we get validation
2711 * there, too */
2712
2713 struct midgard_disasm_stats info = {
2714 .texture_count = 0,
2715 .sampler_count = 0,
2716 .attribute_count = 0,
2717 .varying_count = 0,
2718 .work_count = 1,
2719
2720 .uniform_count = -128,
2721 .uniform_buffer_count = 0
2722 };
2723
2724 if (s->shader & ~0xF)
2725 info = pandecode_shader_disassemble(s->shader & ~0xF, job_no, job_type, is_bifrost, gpu_id);
2726
2727 pandecode_log("struct mali_shader_meta shader_meta_%"PRIx64"_%d%s = {\n", p->shader, job_no, suffix);
2728 pandecode_indent++;
2729
2730 /* Save for dumps */
2731 attribute_count = s->attribute_count;
2732 varying_count = s->varying_count;
2733 texture_count = s->texture_count;
2734 sampler_count = s->sampler_count;
2735
2736 if (is_bifrost) {
2737 uniform_count = s->bifrost2.uniform_count;
2738 uniform_buffer_count = s->bifrost1.uniform_buffer_count;
2739 } else {
2740 uniform_count = s->midgard1.uniform_count;
2741 uniform_buffer_count = s->midgard1.uniform_buffer_count;
2742 }
2743
2744 pandecode_shader_address("shader", s->shader);
2745
2746 pandecode_shader_prop("texture_count", s->texture_count, info.texture_count, false);
2747 pandecode_shader_prop("sampler_count", s->sampler_count, info.sampler_count, false);
2748 pandecode_shader_prop("attribute_count", s->attribute_count, info.attribute_count, false);
2749 pandecode_shader_prop("varying_count", s->varying_count, info.varying_count, false);
2750 pandecode_shader_prop("uniform_buffer_count",
2751 uniform_buffer_count,
2752 info.uniform_buffer_count, true);
2753
2754 if (!is_bifrost) {
2755 pandecode_shader_prop("uniform_count",
2756 uniform_count,
2757 info.uniform_count, false);
2758
2759 pandecode_shader_prop("work_count",
2760 s->midgard1.work_count, info.work_count, false);
2761 }
2762
2763 if (is_bifrost) {
2764 pandecode_log("bifrost1.unk1 = ");
2765 pandecode_log_decoded_flags(shader_bifrost_info, s->bifrost1.unk1);
2766 pandecode_log_cont(",\n");
2767 } else {
2768 bool helpers = s->midgard1.flags_lo & MALI_HELPER_INVOCATIONS;
2769
2770 if (helpers != info.helper_invocations) {
2771 pandecode_msg("XXX: expected helpers %u but got %u\n",
2772 info.helper_invocations, helpers);
2773 }
2774
2775 pandecode_log(".midgard1.flags_lo = ");
2776 pandecode_log_decoded_flags(shader_midgard1_flag_lo_info,
2777 s->midgard1.flags_lo & ~MALI_HELPER_INVOCATIONS);
2778 pandecode_log_cont(",\n");
2779
2780 pandecode_log(".midgard1.flags_hi = ");
2781 pandecode_log_decoded_flags(shader_midgard1_flag_hi_info, s->midgard1.flags_hi);
2782 pandecode_log_cont(",\n");
2783 }
2784
2785 if (s->depth_units || s->depth_factor) {
2786 pandecode_prop("depth_factor = %f", s->depth_factor);
2787 pandecode_prop("depth_units = %f", s->depth_units);
2788 }
2789
2790 if (s->coverage_mask)
2791 pandecode_prop("coverage_mask = 0x%X", s->coverage_mask);
2792
2793 if (s->unknown2_2)
2794 pandecode_prop(".unknown2_2 = %X", s->unknown2_2);
2795
2796 if (s->unknown2_3 || s->unknown2_4) {
2797 pandecode_log(".unknown2_3 = ");
2798
2799 int unknown2_3 = s->unknown2_3;
2800 int unknown2_4 = s->unknown2_4;
2801
2802 /* We're not quite sure what these flags mean without the depth test, if anything */
2803
2804 if (unknown2_3 & (MALI_DEPTH_WRITEMASK | MALI_DEPTH_FUNC_MASK)) {
2805 const char *func = pandecode_func(MALI_GET_DEPTH_FUNC(unknown2_3));
2806 unknown2_3 &= ~MALI_DEPTH_FUNC_MASK;
2807
2808 pandecode_log_cont("MALI_DEPTH_FUNC(%s) | ", func);
2809 }
2810
2811 pandecode_log_decoded_flags(u3_flag_info, unknown2_3);
2812 pandecode_log_cont(",\n");
2813
2814 pandecode_log(".unknown2_4 = ");
2815 pandecode_log_decoded_flags(u4_flag_info, unknown2_4);
2816 pandecode_log_cont(",\n");
2817 }
2818
2819 if (s->stencil_mask_front || s->stencil_mask_back) {
2820 pandecode_prop("stencil_mask_front = 0x%02X", s->stencil_mask_front);
2821 pandecode_prop("stencil_mask_back = 0x%02X", s->stencil_mask_back);
2822 }
2823
2824 pandecode_stencil("front", &s->stencil_front);
2825 pandecode_stencil("back", &s->stencil_back);
2826
2827 if (is_bifrost) {
2828 pandecode_log(".bifrost2 = {\n");
2829 pandecode_indent++;
2830
2831 pandecode_prop("unk3 = 0x%" PRIx32, s->bifrost2.unk3);
2832 pandecode_prop("preload_regs = 0x%" PRIx32, s->bifrost2.preload_regs);
2833 pandecode_prop("uniform_count = %" PRId32, s->bifrost2.uniform_count);
2834 pandecode_prop("unk4 = 0x%" PRIx32, s->bifrost2.unk4);
2835
2836 pandecode_indent--;
2837 pandecode_log("},\n");
2838 } else if (s->midgard2.unknown2_7) {
2839 pandecode_log(".midgard2 = {\n");
2840 pandecode_indent++;
2841
2842 pandecode_prop("unknown2_7 = 0x%" PRIx32, s->midgard2.unknown2_7);
2843 pandecode_indent--;
2844 pandecode_log("},\n");
2845 }
2846
2847 if (s->padding) {
2848 pandecode_msg("XXX: shader padding tripped\n");
2849 pandecode_prop("padding = 0x%" PRIx32, s->padding);
2850 }
2851
2852 if (!is_bifrost) {
2853 /* TODO: Blend shaders routing/disasm */
2854 union midgard_blend blend = s->blend;
2855 mali_ptr shader = pandecode_midgard_blend(&blend, s->unknown2_3 & MALI_HAS_BLEND_SHADER);
2856 if (shader & ~0xF)
2857 pandecode_blend_shader_disassemble(shader, job_no, job_type, false, gpu_id);
2858 } else {
2859 pandecode_msg("mdg_blend = %" PRIx64 "\n", s->blend.shader);
2860 }
2861
2862 pandecode_indent--;
2863 pandecode_log("};\n");
2864
2865 /* MRT blend fields are used whenever MFBD is used, with
2866 * per-RT descriptors */
2867
2868 if (job_type == JOB_TYPE_TILER && (is_bifrost || p->shared_memory & MALI_MFBD)) {
2869 void* blend_base = (void *) (s + 1);
2870
2871 for (unsigned i = 0; i < fbd_info.rt_count; i++) {
2872 mali_ptr shader = 0;
2873
2874 if (is_bifrost)
2875 shader = pandecode_bifrost_blend(blend_base, job_no, i);
2876 else
2877 shader = pandecode_midgard_blend_mrt(blend_base, job_no, i);
2878
2879 if (shader & ~0xF)
2880 pandecode_blend_shader_disassemble(shader, job_no, job_type, false, gpu_id);
2881
2882 }
2883 }
2884 } else
2885 pandecode_msg("XXX: missing shader descriptor\n");
2886
2887 if (p->viewport) {
2888 struct pandecode_mapped_memory *fmem = pandecode_find_mapped_gpu_mem_containing(p->viewport);
2889 struct mali_viewport *PANDECODE_PTR_VAR(f, fmem, p->viewport);
2890
2891 pandecode_log("struct mali_viewport viewport_%"PRIx64"_%d%s = {\n", p->viewport, job_no, suffix);
2892 pandecode_indent++;
2893
2894 pandecode_prop("clip_minx = %f", f->clip_minx);
2895 pandecode_prop("clip_miny = %f", f->clip_miny);
2896 pandecode_prop("clip_minz = %f", f->clip_minz);
2897 pandecode_prop("clip_maxx = %f", f->clip_maxx);
2898 pandecode_prop("clip_maxy = %f", f->clip_maxy);
2899 pandecode_prop("clip_maxz = %f", f->clip_maxz);
2900
2901 /* Only the higher coordinates are MALI_POSITIVE scaled */
2902
2903 pandecode_prop("viewport0 = { %d, %d }",
2904 f->viewport0[0], f->viewport0[1]);
2905
2906 pandecode_prop("viewport1 = { MALI_POSITIVE(%d), MALI_POSITIVE(%d) }",
2907 f->viewport1[0] + 1, f->viewport1[1] + 1);
2908
2909 pandecode_indent--;
2910 pandecode_log("};\n");
2911 }
2912
2913 unsigned max_attr_index = 0;
2914
2915 if (p->attribute_meta)
2916 max_attr_index = pandecode_attribute_meta(job_no, attribute_count, p, false, suffix);
2917
2918 if (p->attributes) {
2919 attr_mem = pandecode_find_mapped_gpu_mem_containing(p->attributes);
2920 pandecode_attributes(attr_mem, p->attributes, job_no, suffix, max_attr_index, false, job_type);
2921 }
2922
2923 /* Varyings are encoded like attributes but not actually sent; we just
2924 * pass a zero buffer with the right stride/size set, (or whatever)
2925 * since the GPU will write to it itself */
2926
2927 if (p->varying_meta) {
2928 varying_count = pandecode_attribute_meta(job_no, varying_count, p, true, suffix);
2929 }
2930
2931 if (p->varyings) {
2932 attr_mem = pandecode_find_mapped_gpu_mem_containing(p->varyings);
2933
2934 /* Number of descriptors depends on whether there are
2935 * non-internal varyings */
2936
2937 pandecode_attributes(attr_mem, p->varyings, job_no, suffix, varying_count, true, job_type);
2938 }
2939
2940 if (p->uniform_buffers) {
2941 if (uniform_buffer_count)
2942 pandecode_uniform_buffers(p->uniform_buffers, uniform_buffer_count, job_no);
2943 else
2944 pandecode_msg("warn: UBOs specified but not referenced\n");
2945 } else if (uniform_buffer_count)
2946 pandecode_msg("XXX: UBOs referenced but not specified\n");
2947
2948 /* We don't want to actually dump uniforms, but we do need to validate
2949 * that the counts we were given are sane */
2950
2951 if (p->uniforms) {
2952 if (uniform_count)
2953 pandecode_uniforms(p->uniforms, uniform_count);
2954 else
2955 pandecode_msg("warn: Uniforms specified but not referenced\n");
2956 } else if (uniform_count)
2957 pandecode_msg("XXX: Uniforms referenced but not specified\n");
2958
2959 if (p->textures)
2960 pandecode_textures(p->textures, texture_count, job_no, is_bifrost);
2961
2962 if (p->sampler_descriptor)
2963 pandecode_samplers(p->sampler_descriptor, sampler_count, job_no, is_bifrost);
2964 }
2965
2966 static void
2967 pandecode_gl_enables(uint32_t gl_enables, int job_type)
2968 {
2969 pandecode_log(".gl_enables = ");
2970
2971 pandecode_log_decoded_flags(gl_enable_flag_info, gl_enables);
2972
2973 pandecode_log_cont(",\n");
2974 }
2975
2976 static void
2977 pandecode_vertex_tiler_postfix(const struct mali_vertex_tiler_postfix *p, int job_no, bool is_bifrost)
2978 {
2979 if (p->shader & 0xF)
2980 pandecode_msg("warn: shader tagged %X\n", (unsigned) (p->shader & 0xF));
2981
2982 pandecode_log(".postfix = {\n");
2983 pandecode_indent++;
2984
2985 pandecode_gl_enables(p->gl_enables, JOB_TYPE_TILER);
2986 pandecode_prop("instance_shift = 0x%x", p->instance_shift);
2987 pandecode_prop("instance_odd = 0x%x", p->instance_odd);
2988
2989 if (p->zero4) {
2990 pandecode_msg("XXX: vertex only zero tripped");
2991 pandecode_prop("zero4 = 0x%" PRIx32, p->zero4);
2992 }
2993
2994 pandecode_prop("offset_start = 0x%x", p->offset_start);
2995
2996 if (p->zero5) {
2997 pandecode_msg("XXX: vertex only zero tripped");
2998 pandecode_prop("zero5 = 0x%" PRIx64, p->zero5);
2999 }
3000
3001 MEMORY_PROP(p, position_varying);
3002 MEMORY_PROP(p, occlusion_counter);
3003
3004 pandecode_indent--;
3005 pandecode_log("},\n");
3006 }
3007
3008 static void
3009 pandecode_tiler_heap_meta(mali_ptr gpu_va, int job_no)
3010 {
3011 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
3012 const struct bifrost_tiler_heap_meta *PANDECODE_PTR_VAR(h, mem, gpu_va);
3013
3014 pandecode_log("struct bifrost_tiler_heap_meta tiler_heap_meta_%"PRIx64"_%d = {\n", gpu_va, job_no);
3015 pandecode_indent++;
3016
3017 if (h->zero) {
3018 pandecode_msg("XXX: tiler heap zero tripped\n");
3019 pandecode_prop("zero = 0x%x", h->zero);
3020 }
3021
3022 pandecode_prop("heap_size = 0x%x", h->heap_size);
3023 MEMORY_PROP(h, tiler_heap_start);
3024 MEMORY_PROP(h, tiler_heap_free);
3025
3026 /* this might point to the beginning of another buffer, when it's
3027 * really the end of the tiler heap buffer, so we have to be careful
3028 * here. but for zero length, we need the same pointer.
3029 */
3030
3031 if (h->tiler_heap_end == h->tiler_heap_start) {
3032 MEMORY_PROP(h, tiler_heap_start);
3033 } else {
3034 char *a = pointer_as_memory_reference(h->tiler_heap_end - 1);
3035 pandecode_prop("tiler_heap_end = %s + 1", a);
3036 free(a);
3037 }
3038
3039 for (int i = 0; i < 10; i++) {
3040 if (h->zeros[i] != 0) {
3041 pandecode_msg("XXX: tiler heap zero %d tripped, value %x\n",
3042 i, h->zeros[i]);
3043 }
3044 }
3045
3046 if (h->unk1 != 0x1) {
3047 pandecode_msg("XXX: tiler heap unk1 tripped\n");
3048 pandecode_prop("unk1 = 0x%x", h->unk1);
3049 }
3050
3051 if (h->unk7e007e != 0x7e007e) {
3052 pandecode_msg("XXX: tiler heap unk7e007e tripped\n");
3053 pandecode_prop("unk7e007e = 0x%x", h->unk7e007e);
3054 }
3055
3056 pandecode_indent--;
3057 pandecode_log("};\n");
3058 }
3059
3060 static void
3061 pandecode_tiler_meta(mali_ptr gpu_va, int job_no)
3062 {
3063 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
3064 const struct bifrost_tiler_meta *PANDECODE_PTR_VAR(t, mem, gpu_va);
3065
3066 pandecode_tiler_heap_meta(t->tiler_heap_meta, job_no);
3067
3068 pandecode_log("struct bifrost_tiler_meta tiler_meta_%"PRIx64"_%d = {\n", gpu_va, job_no);
3069 pandecode_indent++;
3070
3071 pandecode_prop("tiler_heap_next_start = 0x%" PRIx32, t->tiler_heap_next_start);
3072 pandecode_prop("used_hierarchy_mask = 0x%" PRIx32, t->used_hierarchy_mask);
3073
3074 if (t->hierarchy_mask != 0xa &&
3075 t->hierarchy_mask != 0x14 &&
3076 t->hierarchy_mask != 0x28 &&
3077 t->hierarchy_mask != 0x50 &&
3078 t->hierarchy_mask != 0xa0)
3079 pandecode_prop("XXX: Unexpected hierarchy_mask (not 0xa, 0x14, 0x28, 0x50 or 0xa0)!");
3080
3081 pandecode_prop("hierarchy_mask = 0x%" PRIx16, t->hierarchy_mask);
3082
3083 pandecode_prop("flags = 0x%" PRIx16, t->flags);
3084
3085 pandecode_prop("width = MALI_POSITIVE(%d)", t->width + 1);
3086 pandecode_prop("height = MALI_POSITIVE(%d)", t->height + 1);
3087
3088 if (t->zero0) {
3089 pandecode_msg("XXX: tiler meta zero tripped\n");
3090 pandecode_prop("zero0 = 0x%" PRIx64, t->zero0);
3091 }
3092
3093 for (int i = 0; i < 12; i++) {
3094 if (t->zeros[i] != 0) {
3095 pandecode_msg("XXX: tiler heap zero %d tripped, value %" PRIx64 "\n",
3096 i, t->zeros[i]);
3097 }
3098 }
3099
3100 pandecode_indent--;
3101 pandecode_log("};\n");
3102 }
3103
3104 static void
3105 pandecode_primitive_size(union midgard_primitive_size u, bool constant)
3106 {
3107 if (u.pointer == 0x0)
3108 return;
3109
3110 pandecode_log(".primitive_size = {\n");
3111 pandecode_indent++;
3112
3113 if (constant) {
3114 pandecode_prop("constant = %f", u.constant);
3115 } else {
3116 MEMORY_PROP((&u), pointer);
3117 }
3118
3119 pandecode_indent--;
3120 pandecode_log("},\n");
3121 }
3122
3123 static void
3124 pandecode_tiler_only_bfr(const struct bifrost_tiler_only *t, int job_no)
3125 {
3126 pandecode_log_cont("{\n");
3127 pandecode_indent++;
3128
3129 /* TODO: gl_PointSize on Bifrost */
3130 pandecode_primitive_size(t->primitive_size, true);
3131
3132 if (t->zero1 || t->zero2 || t->zero3 || t->zero4 || t->zero5
3133 || t->zero6) {
3134 pandecode_msg("XXX: tiler only zero tripped\n");
3135 pandecode_prop("zero1 = 0x%" PRIx64, t->zero1);
3136 pandecode_prop("zero2 = 0x%" PRIx64, t->zero2);
3137 pandecode_prop("zero3 = 0x%" PRIx64, t->zero3);
3138 pandecode_prop("zero4 = 0x%" PRIx64, t->zero4);
3139 pandecode_prop("zero5 = 0x%" PRIx64, t->zero5);
3140 pandecode_prop("zero6 = 0x%" PRIx64, t->zero6);
3141 }
3142
3143 pandecode_indent--;
3144 pandecode_log("},\n");
3145 }
3146
3147 static int
3148 pandecode_vertex_job_bfr(const struct mali_job_descriptor_header *h,
3149 const struct pandecode_mapped_memory *mem,
3150 mali_ptr payload, int job_no, unsigned gpu_id)
3151 {
3152 struct bifrost_payload_vertex *PANDECODE_PTR_VAR(v, mem, payload);
3153
3154 pandecode_vertex_tiler_postfix_pre(&v->postfix, job_no, h->job_type, "", true, gpu_id);
3155
3156 pandecode_log("struct bifrost_payload_vertex payload_%"PRIx64"_%d = {\n", payload, job_no);
3157 pandecode_indent++;
3158
3159 pandecode_vertex_tiler_prefix(&v->prefix, job_no, false);
3160 pandecode_vertex_tiler_postfix(&v->postfix, job_no, true);
3161
3162 pandecode_indent--;
3163 pandecode_log("};\n");
3164
3165 return sizeof(*v);
3166 }
3167
3168 static int
3169 pandecode_tiler_job_bfr(const struct mali_job_descriptor_header *h,
3170 const struct pandecode_mapped_memory *mem,
3171 mali_ptr payload, int job_no, unsigned gpu_id)
3172 {
3173 struct bifrost_payload_tiler *PANDECODE_PTR_VAR(t, mem, payload);
3174
3175 pandecode_vertex_tiler_postfix_pre(&t->postfix, job_no, h->job_type, "", true, gpu_id);
3176 pandecode_tiler_meta(t->tiler.tiler_meta, job_no);
3177
3178 pandecode_log("struct bifrost_payload_tiler payload_%"PRIx64"_%d = {\n", payload, job_no);
3179 pandecode_indent++;
3180
3181 pandecode_vertex_tiler_prefix(&t->prefix, job_no, false);
3182
3183 pandecode_log(".tiler = ");
3184 pandecode_tiler_only_bfr(&t->tiler, job_no);
3185
3186 pandecode_vertex_tiler_postfix(&t->postfix, job_no, true);
3187
3188 pandecode_indent--;
3189 pandecode_log("};\n");
3190
3191 return sizeof(*t);
3192 }
3193
3194 static int
3195 pandecode_vertex_or_tiler_job_mdg(const struct mali_job_descriptor_header *h,
3196 const struct pandecode_mapped_memory *mem,
3197 mali_ptr payload, int job_no, unsigned gpu_id)
3198 {
3199 struct midgard_payload_vertex_tiler *PANDECODE_PTR_VAR(v, mem, payload);
3200 bool is_graphics = (h->job_type == JOB_TYPE_VERTEX) || (h->job_type == JOB_TYPE_TILER);
3201
3202 pandecode_vertex_tiler_postfix_pre(&v->postfix, job_no, h->job_type, "", false, gpu_id);
3203
3204 pandecode_log("struct midgard_payload_vertex_tiler payload_%d = {\n", job_no);
3205 pandecode_indent++;
3206
3207 pandecode_vertex_tiler_prefix(&v->prefix, job_no, is_graphics);
3208 pandecode_vertex_tiler_postfix(&v->postfix, job_no, false);
3209
3210 bool has_primitive_pointer = v->prefix.unknown_draw & MALI_DRAW_VARYING_SIZE;
3211 pandecode_primitive_size(v->primitive_size, !has_primitive_pointer);
3212
3213 pandecode_indent--;
3214 pandecode_log("};\n");
3215
3216 return sizeof(*v);
3217 }
3218
3219 static int
3220 pandecode_fragment_job(const struct pandecode_mapped_memory *mem,
3221 mali_ptr payload, int job_no,
3222 bool is_bifrost, unsigned gpu_id)
3223 {
3224 const struct mali_payload_fragment *PANDECODE_PTR_VAR(s, mem, payload);
3225
3226 bool is_mfbd = s->framebuffer & MALI_MFBD;
3227
3228 if (!is_mfbd && is_bifrost)
3229 pandecode_msg("XXX: Bifrost fragment must use MFBD\n");
3230
3231 struct pandecode_fbd info;
3232
3233 if (is_mfbd)
3234 info = pandecode_mfbd_bfr(s->framebuffer & FBD_MASK, job_no, true, false, is_bifrost);
3235 else
3236 info = pandecode_sfbd(s->framebuffer & FBD_MASK, job_no, true, gpu_id);
3237
3238 /* Compute the tag for the tagged pointer. This contains the type of
3239 * FBD (MFBD/SFBD), and in the case of an MFBD, information about which
3240 * additional structures follow the MFBD header (an extra payload or
3241 * not, as well as a count of render targets) */
3242
3243 unsigned expected_tag = is_mfbd ? MALI_MFBD : 0;
3244
3245 if (is_mfbd) {
3246 if (info.has_extra)
3247 expected_tag |= MALI_MFBD_TAG_EXTRA;
3248
3249 expected_tag |= (MALI_POSITIVE(info.rt_count) << 2);
3250 }
3251
3252 if ((s->min_tile_coord | s->max_tile_coord) & ~(MALI_X_COORD_MASK | MALI_Y_COORD_MASK)) {
3253 pandecode_msg("XXX: unexpected tile coordinate bits\n");
3254 pandecode_prop("min_tile_coord = 0x%X\n", s->min_tile_coord);
3255 pandecode_prop("max_tile_coord = 0x%X\n", s->max_tile_coord);
3256 }
3257
3258 /* Extract tile coordinates */
3259
3260 unsigned min_x = MALI_TILE_COORD_X(s->min_tile_coord) << MALI_TILE_SHIFT;
3261 unsigned min_y = MALI_TILE_COORD_Y(s->min_tile_coord) << MALI_TILE_SHIFT;
3262
3263 unsigned max_x = (MALI_TILE_COORD_X(s->max_tile_coord) + 1) << MALI_TILE_SHIFT;
3264 unsigned max_y = (MALI_TILE_COORD_Y(s->max_tile_coord) + 1) << MALI_TILE_SHIFT;
3265
3266 /* For the max, we also want the floored (rather than ceiled) version for checking */
3267
3268 unsigned max_x_f = (MALI_TILE_COORD_X(s->max_tile_coord)) << MALI_TILE_SHIFT;
3269 unsigned max_y_f = (MALI_TILE_COORD_Y(s->max_tile_coord)) << MALI_TILE_SHIFT;
3270
3271 /* Validate the coordinates are well-ordered */
3272
3273 if (min_x == max_x)
3274 pandecode_msg("XXX: empty X coordinates (%u = %u)\n", min_x, max_x);
3275 else if (min_x > max_x)
3276 pandecode_msg("XXX: misordered X coordinates (%u > %u)\n", min_x, max_x);
3277
3278 if (min_y == max_y)
3279 pandecode_msg("XXX: empty X coordinates (%u = %u)\n", min_x, max_x);
3280 else if (min_y > max_y)
3281 pandecode_msg("XXX: misordered X coordinates (%u > %u)\n", min_x, max_x);
3282
3283 /* Validate the coordinates fit inside the framebuffer. We use floor,
3284 * rather than ceil, for the max coordinates, since the tile
3285 * coordinates for something like an 800x600 framebuffer will actually
3286 * resolve to 800x608, which would otherwise trigger a Y-overflow */
3287
3288 if ((min_x > info.width) || (max_x_f > info.width))
3289 pandecode_msg("XXX: tile coordinates overflow in X direction\n");
3290
3291 if ((min_y > info.height) || (max_y_f > info.height))
3292 pandecode_msg("XXX: tile coordinates overflow in Y direction\n");
3293
3294 /* After validation, we print */
3295
3296 pandecode_log("fragment (%u, %u) ... (%u, %u)\n\n", min_x, min_y, max_x, max_y);
3297
3298 /* The FBD is a tagged pointer */
3299
3300 unsigned tag = (s->framebuffer & ~FBD_MASK);
3301
3302 if (tag != expected_tag)
3303 pandecode_msg("XXX: expected FBD tag %X but got %X\n", expected_tag, tag);
3304
3305 return sizeof(*s);
3306 }
3307
3308 /* Entrypoint to start tracing. jc_gpu_va is the GPU address for the first job
3309 * in the chain; later jobs are found by walking the chain. Bifrost is, well,
3310 * if it's bifrost or not. GPU ID is the more finegrained ID (at some point, we
3311 * might wish to combine this with the bifrost parameter) because some details
3312 * are model-specific even within a particular architecture. Minimal traces
3313 * *only* examine the job descriptors, skipping printing entirely if there is
3314 * no faults, and only descends into the payload if there are faults. This is
3315 * useful for looking for faults without the overhead of invasive traces. */
3316
3317 void
3318 pandecode_jc(mali_ptr jc_gpu_va, bool bifrost, unsigned gpu_id, bool minimal)
3319 {
3320 pandecode_dump_file_open();
3321
3322 struct mali_job_descriptor_header *h;
3323 unsigned job_descriptor_number = 0;
3324
3325 do {
3326 struct pandecode_mapped_memory *mem =
3327 pandecode_find_mapped_gpu_mem_containing(jc_gpu_va);
3328
3329 void *payload;
3330
3331 h = PANDECODE_PTR(mem, jc_gpu_va, struct mali_job_descriptor_header);
3332
3333 /* On Midgard, for 32-bit jobs except for fragment jobs, the
3334 * high 32-bits of the 64-bit pointer are reused to store
3335 * something else.
3336 */
3337 int offset = h->job_descriptor_size == MALI_JOB_32 &&
3338 h->job_type != JOB_TYPE_FRAGMENT ? 4 : 0;
3339 mali_ptr payload_ptr = jc_gpu_va + sizeof(*h) - offset;
3340
3341 payload = pandecode_fetch_gpu_mem(mem, payload_ptr, 256);
3342
3343 int job_no = job_descriptor_number++;
3344
3345 /* If the job is good to go, skip it in minimal mode */
3346 if (minimal && (h->exception_status == 0x0 || h->exception_status == 0x1))
3347 continue;
3348
3349 pandecode_log("struct mali_job_descriptor_header job_%"PRIx64"_%d = {\n", jc_gpu_va, job_no);
3350 pandecode_indent++;
3351
3352 pandecode_prop("job_type = %s", pandecode_job_type(h->job_type));
3353
3354 if (h->job_descriptor_size)
3355 pandecode_prop("job_descriptor_size = %d", h->job_descriptor_size);
3356
3357 if (h->exception_status && h->exception_status != 0x1)
3358 pandecode_prop("exception_status = %x (source ID: 0x%x access: %s exception: 0x%x)",
3359 h->exception_status,
3360 (h->exception_status >> 16) & 0xFFFF,
3361 pandecode_exception_access((h->exception_status >> 8) & 0x3),
3362 h->exception_status & 0xFF);
3363
3364 if (h->first_incomplete_task)
3365 pandecode_prop("first_incomplete_task = %d", h->first_incomplete_task);
3366
3367 if (h->fault_pointer)
3368 pandecode_prop("fault_pointer = 0x%" PRIx64, h->fault_pointer);
3369
3370 if (h->job_barrier)
3371 pandecode_prop("job_barrier = %d", h->job_barrier);
3372
3373 pandecode_prop("job_index = %d", h->job_index);
3374
3375 if (h->unknown_flags)
3376 pandecode_prop("unknown_flags = %d", h->unknown_flags);
3377
3378 if (h->job_dependency_index_1)
3379 pandecode_prop("job_dependency_index_1 = %d", h->job_dependency_index_1);
3380
3381 if (h->job_dependency_index_2)
3382 pandecode_prop("job_dependency_index_2 = %d", h->job_dependency_index_2);
3383
3384 pandecode_indent--;
3385 pandecode_log("};\n");
3386
3387 switch (h->job_type) {
3388 case JOB_TYPE_WRITE_VALUE: {
3389 struct mali_payload_write_value *s = payload;
3390 pandecode_log("struct mali_payload_write_value payload_%"PRIx64"_%d = {\n", payload_ptr, job_no);
3391 pandecode_indent++;
3392 MEMORY_PROP(s, address);
3393
3394 if (s->value_descriptor != MALI_WRITE_VALUE_ZERO) {
3395 pandecode_msg("XXX: unknown value descriptor\n");
3396 pandecode_prop("value_descriptor = 0x%" PRIX32, s->value_descriptor);
3397 }
3398
3399 if (s->reserved) {
3400 pandecode_msg("XXX: set value tripped\n");
3401 pandecode_prop("reserved = 0x%" PRIX32, s->reserved);
3402 }
3403
3404 pandecode_prop("immediate = 0x%" PRIX64, s->immediate);
3405 pandecode_indent--;
3406 pandecode_log("};\n");
3407
3408 break;
3409 }
3410
3411 case JOB_TYPE_TILER:
3412 case JOB_TYPE_VERTEX:
3413 case JOB_TYPE_COMPUTE:
3414 if (bifrost) {
3415 if (h->job_type == JOB_TYPE_TILER)
3416 pandecode_tiler_job_bfr(h, mem, payload_ptr, job_no, gpu_id);
3417 else
3418 pandecode_vertex_job_bfr(h, mem, payload_ptr, job_no, gpu_id);
3419 } else
3420 pandecode_vertex_or_tiler_job_mdg(h, mem, payload_ptr, job_no, gpu_id);
3421
3422 break;
3423
3424 case JOB_TYPE_FRAGMENT:
3425 pandecode_fragment_job(mem, payload_ptr, job_no, bifrost, gpu_id);
3426 break;
3427
3428 default:
3429 break;
3430 }
3431 } while ((jc_gpu_va = h->next_job));
3432
3433 pandecode_map_read_write();
3434 }