panfrost: XMLify stencil op
[mesa.git] / src / panfrost / lib / decode.c
1 /*
2 * Copyright (C) 2017-2019 Alyssa Rosenzweig
3 * Copyright (C) 2017-2019 Connor Abbott
4 * Copyright (C) 2019 Collabora, Ltd.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 */
25
26 #include <midgard_pack.h>
27 #include <stdio.h>
28 #include <stdlib.h>
29 #include <memory.h>
30 #include <stdbool.h>
31 #include <stdarg.h>
32 #include <ctype.h>
33 #include "decode.h"
34 #include "util/macros.h"
35 #include "util/u_math.h"
36
37 #include "midgard/disassemble.h"
38 #include "bifrost/disassemble.h"
39
40 #include "pan_encoder.h"
41
42 static void pandecode_swizzle(unsigned swizzle, enum mali_format format);
43
44 #define MEMORY_PROP(obj, p) {\
45 if (obj->p) { \
46 char *a = pointer_as_memory_reference(obj->p); \
47 pandecode_prop("%s = %s", #p, a); \
48 free(a); \
49 } \
50 }
51
52 #define MEMORY_PROP_DIR(obj, p) {\
53 if (obj.p) { \
54 char *a = pointer_as_memory_reference(obj.p); \
55 pandecode_prop("%s = %s", #p, a); \
56 free(a); \
57 } \
58 }
59
60 #define DUMP_CL(title, T, cl, indent) {\
61 fprintf(pandecode_dump_stream, "%s\n", title); \
62 struct MALI_ ## T temp; \
63 MALI_ ## T ## _unpack((const uint8_t *) cl, &temp); \
64 MALI_ ## T ## _print(pandecode_dump_stream, &temp, 0); \
65 }
66
67 #define DUMP_ADDR(title, T, addr, indent) {\
68 struct pandecode_mapped_memory *mapped_mem = pandecode_find_mapped_gpu_mem_containing(addr); \
69 const uint8_t *cl = pandecode_fetch_gpu_mem(mapped_mem, addr, MALI_ ## T ## _LENGTH); \
70 DUMP_CL(title, T, cl, indent); \
71 }
72
73 FILE *pandecode_dump_stream;
74
75 /* Semantic logging type.
76 *
77 * Raw: for raw messages to be printed as is.
78 * Message: for helpful information to be commented out in replays.
79 * Property: for properties of a struct
80 *
81 * Use one of pandecode_log, pandecode_msg, or pandecode_prop as syntax sugar.
82 */
83
84 enum pandecode_log_type {
85 PANDECODE_RAW,
86 PANDECODE_MESSAGE,
87 PANDECODE_PROPERTY
88 };
89
90 #define pandecode_log(...) pandecode_log_typed(PANDECODE_RAW, __VA_ARGS__)
91 #define pandecode_msg(...) pandecode_log_typed(PANDECODE_MESSAGE, __VA_ARGS__)
92 #define pandecode_prop(...) pandecode_log_typed(PANDECODE_PROPERTY, __VA_ARGS__)
93
94 unsigned pandecode_indent = 0;
95
96 static void
97 pandecode_make_indent(void)
98 {
99 for (unsigned i = 0; i < pandecode_indent; ++i)
100 fprintf(pandecode_dump_stream, " ");
101 }
102
103 static void
104 pandecode_log_typed(enum pandecode_log_type type, const char *format, ...)
105 {
106 va_list ap;
107
108 pandecode_make_indent();
109
110 if (type == PANDECODE_MESSAGE)
111 fprintf(pandecode_dump_stream, "// ");
112 else if (type == PANDECODE_PROPERTY)
113 fprintf(pandecode_dump_stream, ".");
114
115 va_start(ap, format);
116 vfprintf(pandecode_dump_stream, format, ap);
117 va_end(ap);
118
119 if (type == PANDECODE_PROPERTY)
120 fprintf(pandecode_dump_stream, ",\n");
121 }
122
123 static void
124 pandecode_log_cont(const char *format, ...)
125 {
126 va_list ap;
127
128 va_start(ap, format);
129 vfprintf(pandecode_dump_stream, format, ap);
130 va_end(ap);
131 }
132
133 /* To check for memory safety issues, validates that the given pointer in GPU
134 * memory is valid, containing at least sz bytes. The goal is to eliminate
135 * GPU-side memory bugs (NULL pointer dereferences, buffer overflows, or buffer
136 * overruns) by statically validating pointers.
137 */
138
139 static void
140 pandecode_validate_buffer(mali_ptr addr, size_t sz)
141 {
142 if (!addr) {
143 pandecode_msg("XXX: null pointer deref");
144 return;
145 }
146
147 /* Find a BO */
148
149 struct pandecode_mapped_memory *bo =
150 pandecode_find_mapped_gpu_mem_containing(addr);
151
152 if (!bo) {
153 pandecode_msg("XXX: invalid memory dereference\n");
154 return;
155 }
156
157 /* Bounds check */
158
159 unsigned offset = addr - bo->gpu_va;
160 unsigned total = offset + sz;
161
162 if (total > bo->length) {
163 pandecode_msg("XXX: buffer overrun. "
164 "Chunk of size %zu at offset %d in buffer of size %zu. "
165 "Overrun by %zu bytes. \n",
166 sz, offset, bo->length, total - bo->length);
167 return;
168 }
169 }
170
171 struct pandecode_flag_info {
172 u64 flag;
173 const char *name;
174 };
175
176 static void
177 pandecode_log_decoded_flags(const struct pandecode_flag_info *flag_info,
178 u64 flags)
179 {
180 bool decodable_flags_found = false;
181
182 for (int i = 0; flag_info[i].name; i++) {
183 if ((flags & flag_info[i].flag) != flag_info[i].flag)
184 continue;
185
186 if (!decodable_flags_found) {
187 decodable_flags_found = true;
188 } else {
189 pandecode_log_cont(" | ");
190 }
191
192 pandecode_log_cont("%s", flag_info[i].name);
193
194 flags &= ~flag_info[i].flag;
195 }
196
197 if (decodable_flags_found) {
198 if (flags)
199 pandecode_log_cont(" | 0x%" PRIx64, flags);
200 } else {
201 pandecode_log_cont("0x%" PRIx64, flags);
202 }
203 }
204
205 #define FLAG_INFO(flag) { MALI_##flag, "MALI_" #flag }
206 static const struct pandecode_flag_info gl_enable_flag_info[] = {
207 FLAG_INFO(OCCLUSION_QUERY),
208 FLAG_INFO(OCCLUSION_PRECISE),
209 FLAG_INFO(FRONT_CCW_TOP),
210 FLAG_INFO(CULL_FACE_FRONT),
211 FLAG_INFO(CULL_FACE_BACK),
212 {}
213 };
214 #undef FLAG_INFO
215
216 #define FLAG_INFO(flag) { MALI_CLEAR_##flag, "MALI_CLEAR_" #flag }
217 static const struct pandecode_flag_info clear_flag_info[] = {
218 FLAG_INFO(FAST),
219 FLAG_INFO(SLOW),
220 FLAG_INFO(SLOW_STENCIL),
221 {}
222 };
223 #undef FLAG_INFO
224
225 #define FLAG_INFO(flag) { MALI_MASK_##flag, "MALI_MASK_" #flag }
226 static const struct pandecode_flag_info mask_flag_info[] = {
227 FLAG_INFO(R),
228 FLAG_INFO(G),
229 FLAG_INFO(B),
230 FLAG_INFO(A),
231 {}
232 };
233 #undef FLAG_INFO
234
235 #define FLAG_INFO(flag) { MALI_##flag, "MALI_" #flag }
236 static const struct pandecode_flag_info u3_flag_info[] = {
237 FLAG_INFO(HAS_MSAA),
238 FLAG_INFO(PER_SAMPLE),
239 FLAG_INFO(CAN_DISCARD),
240 FLAG_INFO(HAS_BLEND_SHADER),
241 FLAG_INFO(DEPTH_WRITEMASK),
242 FLAG_INFO(DEPTH_CLIP_NEAR),
243 FLAG_INFO(DEPTH_CLIP_FAR),
244 {}
245 };
246
247 static const struct pandecode_flag_info u4_flag_info[] = {
248 FLAG_INFO(NO_MSAA),
249 FLAG_INFO(NO_DITHER),
250 FLAG_INFO(DEPTH_RANGE_A),
251 FLAG_INFO(DEPTH_RANGE_B),
252 FLAG_INFO(STENCIL_TEST),
253 FLAG_INFO(ALPHA_TO_COVERAGE),
254 {}
255 };
256 #undef FLAG_INFO
257
258 #define FLAG_INFO(flag) { MALI_MFBD_FORMAT_##flag, "MALI_MFBD_FORMAT_" #flag }
259 static const struct pandecode_flag_info mfbd_fmt_flag_info[] = {
260 FLAG_INFO(SRGB),
261 {}
262 };
263 #undef FLAG_INFO
264
265 #define FLAG_INFO(flag) { MALI_AFBC_##flag, "MALI_AFBC_" #flag }
266 static const struct pandecode_flag_info afbc_fmt_flag_info[] = {
267 FLAG_INFO(YTR),
268 {}
269 };
270 #undef FLAG_INFO
271
272 #define FLAG_INFO(flag) { MALI_EXTRA_##flag, "MALI_EXTRA_" #flag }
273 static const struct pandecode_flag_info mfbd_extra_flag_hi_info[] = {
274 FLAG_INFO(PRESENT),
275 {}
276 };
277 #undef FLAG_INFO
278
279 #define FLAG_INFO(flag) { MALI_EXTRA_##flag, "MALI_EXTRA_" #flag }
280 static const struct pandecode_flag_info mfbd_extra_flag_lo_info[] = {
281 FLAG_INFO(ZS),
282 {}
283 };
284 #undef FLAG_INFO
285
286 #define FLAG_INFO(flag) { MALI_##flag, "MALI_" #flag }
287 static const struct pandecode_flag_info shader_midgard1_flag_lo_info [] = {
288 FLAG_INFO(WRITES_Z),
289 FLAG_INFO(EARLY_Z),
290 FLAG_INFO(READS_TILEBUFFER),
291 FLAG_INFO(WRITES_GLOBAL),
292 FLAG_INFO(READS_ZS),
293 {}
294 };
295
296 static const struct pandecode_flag_info shader_midgard1_flag_hi_info [] = {
297 FLAG_INFO(WRITES_S),
298 FLAG_INFO(SUPPRESS_INF_NAN),
299 {}
300 };
301 #undef FLAG_INFO
302
303 #define FLAG_INFO(flag) { MALI_BIFROST_##flag, "MALI_BIFROST_" #flag }
304 static const struct pandecode_flag_info shader_bifrost_info [] = {
305 FLAG_INFO(FULL_THREAD),
306 FLAG_INFO(EARLY_Z),
307 FLAG_INFO(FIRST_ATEST),
308 {}
309 };
310
311 #undef FLAG_INFO
312
313 #define FLAG_INFO(flag) { MALI_MFBD_##flag, "MALI_MFBD_" #flag }
314 static const struct pandecode_flag_info mfbd_flag_info [] = {
315 FLAG_INFO(DEPTH_WRITE),
316 FLAG_INFO(EXTRA),
317 {}
318 };
319 #undef FLAG_INFO
320
321 #define FLAG_INFO(flag) { MALI_SAMP_##flag, "MALI_SAMP_" #flag }
322 static const struct pandecode_flag_info sampler_flag_info [] = {
323 FLAG_INFO(MAG_NEAREST),
324 FLAG_INFO(MIN_NEAREST),
325 FLAG_INFO(MIP_LINEAR_1),
326 FLAG_INFO(MIP_LINEAR_2),
327 FLAG_INFO(NORM_COORDS),
328 {}
329 };
330 #undef FLAG_INFO
331
332 #define FLAG_INFO(flag) { MALI_SFBD_FORMAT_##flag, "MALI_SFBD_FORMAT_" #flag }
333 static const struct pandecode_flag_info sfbd_unk1_info [] = {
334 FLAG_INFO(MSAA_8),
335 FLAG_INFO(MSAA_A),
336 {}
337 };
338 #undef FLAG_INFO
339
340 #define FLAG_INFO(flag) { MALI_SFBD_FORMAT_##flag, "MALI_SFBD_FORMAT_" #flag }
341 static const struct pandecode_flag_info sfbd_unk2_info [] = {
342 FLAG_INFO(MSAA_B),
343 FLAG_INFO(SRGB),
344 {}
345 };
346 #undef FLAG_INFO
347
348 #define DEFINE_CASE(name) case MALI_## name: return "MALI_" #name
349 static char *pandecode_format(enum mali_format format)
350 {
351 static char unk_format_str[10];
352
353 switch (format) {
354 DEFINE_CASE(ETC2_RGB8);
355 DEFINE_CASE(ETC2_R11_UNORM);
356 DEFINE_CASE(ETC2_RGBA8);
357 DEFINE_CASE(ETC2_RG11_UNORM);
358 DEFINE_CASE(ETC2_R11_SNORM);
359 DEFINE_CASE(ETC2_RG11_SNORM);
360 DEFINE_CASE(ETC2_RGB8A1);
361 DEFINE_CASE(NXR);
362 DEFINE_CASE(BC1_UNORM);
363 DEFINE_CASE(BC2_UNORM);
364 DEFINE_CASE(BC3_UNORM);
365 DEFINE_CASE(BC4_UNORM);
366 DEFINE_CASE(BC4_SNORM);
367 DEFINE_CASE(BC5_UNORM);
368 DEFINE_CASE(BC5_SNORM);
369 DEFINE_CASE(BC6H_UF16);
370 DEFINE_CASE(BC6H_SF16);
371 DEFINE_CASE(BC7_UNORM);
372 DEFINE_CASE(ASTC_3D_LDR);
373 DEFINE_CASE(ASTC_3D_HDR);
374 DEFINE_CASE(ASTC_2D_LDR);
375 DEFINE_CASE(ASTC_2D_HDR);
376 DEFINE_CASE(RGB565);
377 DEFINE_CASE(RGB5_X1_UNORM);
378 DEFINE_CASE(RGB5_A1_UNORM);
379 DEFINE_CASE(RGB10_A2_UNORM);
380 DEFINE_CASE(RGB10_A2_SNORM);
381 DEFINE_CASE(RGB10_A2UI);
382 DEFINE_CASE(RGB10_A2I);
383 DEFINE_CASE(RGB332_UNORM);
384 DEFINE_CASE(RGB233_UNORM);
385 DEFINE_CASE(Z24X8_UNORM);
386 DEFINE_CASE(R32_FIXED);
387 DEFINE_CASE(RG32_FIXED);
388 DEFINE_CASE(RGB32_FIXED);
389 DEFINE_CASE(RGBA32_FIXED);
390 DEFINE_CASE(R11F_G11F_B10F);
391 DEFINE_CASE(R9F_G9F_B9F_E5F);
392 DEFINE_CASE(VARYING_POS);
393 DEFINE_CASE(VARYING_DISCARD);
394
395 DEFINE_CASE(R8_SNORM);
396 DEFINE_CASE(R16_SNORM);
397 DEFINE_CASE(R32_SNORM);
398 DEFINE_CASE(RG8_SNORM);
399 DEFINE_CASE(RG16_SNORM);
400 DEFINE_CASE(RG32_SNORM);
401 DEFINE_CASE(RGB8_SNORM);
402 DEFINE_CASE(RGB16_SNORM);
403 DEFINE_CASE(RGB32_SNORM);
404 DEFINE_CASE(RGBA8_SNORM);
405 DEFINE_CASE(RGBA16_SNORM);
406 DEFINE_CASE(RGBA32_SNORM);
407
408 DEFINE_CASE(R8UI);
409 DEFINE_CASE(R16UI);
410 DEFINE_CASE(R32UI);
411 DEFINE_CASE(RG8UI);
412 DEFINE_CASE(RG16UI);
413 DEFINE_CASE(RG32UI);
414 DEFINE_CASE(RGB8UI);
415 DEFINE_CASE(RGB16UI);
416 DEFINE_CASE(RGB32UI);
417 DEFINE_CASE(RGBA8UI);
418 DEFINE_CASE(RGBA16UI);
419 DEFINE_CASE(RGBA32UI);
420
421 DEFINE_CASE(R8_UNORM);
422 DEFINE_CASE(R16_UNORM);
423 DEFINE_CASE(R32_UNORM);
424 DEFINE_CASE(R32F);
425 DEFINE_CASE(RG8_UNORM);
426 DEFINE_CASE(RG16_UNORM);
427 DEFINE_CASE(RG32_UNORM);
428 DEFINE_CASE(RG32F);
429 DEFINE_CASE(RGB8_UNORM);
430 DEFINE_CASE(RGB16_UNORM);
431 DEFINE_CASE(RGB32_UNORM);
432 DEFINE_CASE(RGB32F);
433 DEFINE_CASE(RGBA4_UNORM);
434 DEFINE_CASE(RGBA8_UNORM);
435 DEFINE_CASE(RGBA16_UNORM);
436 DEFINE_CASE(RGBA32_UNORM);
437 DEFINE_CASE(RGBA32F);
438
439 DEFINE_CASE(R8I);
440 DEFINE_CASE(R16I);
441 DEFINE_CASE(R32I);
442 DEFINE_CASE(RG8I);
443 DEFINE_CASE(R16F);
444 DEFINE_CASE(RG16I);
445 DEFINE_CASE(RG32I);
446 DEFINE_CASE(RG16F);
447 DEFINE_CASE(RGB8I);
448 DEFINE_CASE(RGB16I);
449 DEFINE_CASE(RGB32I);
450 DEFINE_CASE(RGB16F);
451 DEFINE_CASE(RGBA8I);
452 DEFINE_CASE(RGBA16I);
453 DEFINE_CASE(RGBA32I);
454 DEFINE_CASE(RGBA16F);
455
456 DEFINE_CASE(RGBA4);
457 DEFINE_CASE(RGBA8_2);
458 DEFINE_CASE(RGB10_A2_2);
459 default:
460 snprintf(unk_format_str, sizeof(unk_format_str), "MALI_0x%02x", format);
461 return unk_format_str;
462 }
463 }
464
465 #undef DEFINE_CASE
466
467 #define DEFINE_CASE(name) case MALI_MSAA_ ## name: return "MALI_MSAA_" #name
468 static char *
469 pandecode_msaa_mode(enum mali_msaa_mode mode)
470 {
471 switch (mode) {
472 DEFINE_CASE(SINGLE);
473 DEFINE_CASE(AVERAGE);
474 DEFINE_CASE(MULTIPLE);
475 DEFINE_CASE(LAYERED);
476 default:
477 unreachable("Impossible");
478 return "";
479 }
480 }
481 #undef DEFINE_CASE
482
483 static char *pandecode_attr_mode_short(enum mali_attr_mode mode)
484 {
485 switch(mode) {
486 /* TODO: Combine to just "instanced" once this can be done
487 * unambiguously in all known cases */
488 case MALI_ATTR_POT_DIVIDE:
489 return "instanced_pot";
490 case MALI_ATTR_MODULO:
491 return "instanced_mod";
492 case MALI_ATTR_NPOT_DIVIDE:
493 return "instanced_npot";
494 case MALI_ATTR_IMAGE:
495 return "image";
496 default:
497 pandecode_msg("XXX: invalid attribute mode %X\n", mode);
498 return "";
499 }
500 }
501
502 static const char *
503 pandecode_special_record(uint64_t v, bool* attribute)
504 {
505 switch(v) {
506 case MALI_ATTR_VERTEXID:
507 *attribute = true;
508 return "gl_VertexID";
509 case MALI_ATTR_INSTANCEID:
510 *attribute = true;
511 return "gl_InstanceID";
512 case MALI_VARYING_FRAG_COORD:
513 return "gl_FragCoord";
514 case MALI_VARYING_FRONT_FACING:
515 return "gl_FrontFacing";
516 case MALI_VARYING_POINT_COORD:
517 return "gl_PointCoord";
518 default:
519 pandecode_msg("XXX: invalid special record %" PRIx64 "\n", v);
520 return "";
521 }
522 }
523
524 #define DEFINE_CASE(name) case MALI_WRAP_## name: return "MALI_WRAP_" #name
525 static char *
526 pandecode_wrap_mode(enum mali_wrap_mode op)
527 {
528 switch (op) {
529 DEFINE_CASE(REPEAT);
530 DEFINE_CASE(CLAMP_TO_EDGE);
531 DEFINE_CASE(CLAMP);
532 DEFINE_CASE(CLAMP_TO_BORDER);
533 DEFINE_CASE(MIRRORED_REPEAT);
534 DEFINE_CASE(MIRRORED_CLAMP_TO_EDGE);
535 DEFINE_CASE(MIRRORED_CLAMP);
536 DEFINE_CASE(MIRRORED_CLAMP_TO_BORDER);
537
538 default:
539 pandecode_msg("XXX: invalid wrap mode %X\n", op);
540 return "";
541 }
542 }
543 #undef DEFINE_CASE
544
545 #define DEFINE_CASE(name) case MALI_BLOCK_## name: return "MALI_BLOCK_" #name
546 static char *
547 pandecode_block_format(enum mali_block_format fmt)
548 {
549 switch (fmt) {
550 DEFINE_CASE(TILED);
551 DEFINE_CASE(UNKNOWN);
552 DEFINE_CASE(LINEAR);
553 DEFINE_CASE(AFBC);
554
555 default:
556 unreachable("Invalid case");
557 }
558 }
559 #undef DEFINE_CASE
560
561 #define DEFINE_CASE(name) case MALI_EXCEPTION_ACCESS_## name: return ""#name
562 static char *
563 pandecode_exception_access(unsigned access)
564 {
565 switch (access) {
566 DEFINE_CASE(NONE);
567 DEFINE_CASE(EXECUTE);
568 DEFINE_CASE(READ);
569 DEFINE_CASE(WRITE);
570
571 default:
572 unreachable("Invalid case");
573 }
574 }
575 #undef DEFINE_CASE
576
577 /* Midgard's tiler descriptor is embedded within the
578 * larger FBD */
579
580 static void
581 pandecode_midgard_tiler_descriptor(
582 const struct midgard_tiler_descriptor *t,
583 unsigned width,
584 unsigned height,
585 bool is_fragment,
586 bool has_hierarchy)
587 {
588 pandecode_log(".tiler = {\n");
589 pandecode_indent++;
590
591 if (t->hierarchy_mask == MALI_TILER_DISABLED)
592 pandecode_prop("hierarchy_mask = MALI_TILER_DISABLED");
593 else
594 pandecode_prop("hierarchy_mask = 0x%" PRIx16, t->hierarchy_mask);
595
596 /* We know this name from the kernel, but we never see it nonzero */
597
598 if (t->flags)
599 pandecode_msg("XXX: unexpected tiler flags 0x%" PRIx16, t->flags);
600
601 MEMORY_PROP(t, polygon_list);
602
603 /* The body is offset from the base of the polygon list */
604 //assert(t->polygon_list_body > t->polygon_list);
605 unsigned body_offset = t->polygon_list_body - t->polygon_list;
606
607 /* It needs to fit inside the reported size */
608 //assert(t->polygon_list_size >= body_offset);
609
610 /* Now that we've sanity checked, we'll try to calculate the sizes
611 * ourselves for comparison */
612
613 unsigned ref_header = panfrost_tiler_header_size(width, height, t->hierarchy_mask, has_hierarchy);
614 unsigned ref_size = panfrost_tiler_full_size(width, height, t->hierarchy_mask, has_hierarchy);
615
616 if (!((ref_header == body_offset) && (ref_size == t->polygon_list_size))) {
617 pandecode_msg("XXX: bad polygon list size (expected %d / 0x%x)\n",
618 ref_header, ref_size);
619 pandecode_prop("polygon_list_size = 0x%x", t->polygon_list_size);
620 pandecode_msg("body offset %d\n", body_offset);
621 }
622
623 /* The tiler heap has a start and end specified -- it should be
624 * identical to what we have in the BO. The exception is if tiling is
625 * disabled. */
626
627 MEMORY_PROP(t, heap_start);
628 assert(t->heap_end >= t->heap_start);
629
630 struct pandecode_mapped_memory *heap =
631 pandecode_find_mapped_gpu_mem_containing(t->heap_start);
632
633 unsigned heap_size = t->heap_end - t->heap_start;
634
635 /* Tiling is enabled with a special flag */
636 unsigned hierarchy_mask = t->hierarchy_mask & MALI_HIERARCHY_MASK;
637 unsigned tiler_flags = t->hierarchy_mask ^ hierarchy_mask;
638
639 bool tiling_enabled = hierarchy_mask;
640
641 if (tiling_enabled) {
642 /* When tiling is enabled, the heap should be a tight fit */
643 unsigned heap_offset = t->heap_start - heap->gpu_va;
644 if ((heap_offset + heap_size) != heap->length) {
645 pandecode_msg("XXX: heap size %u (expected %zu)\n",
646 heap_size, heap->length - heap_offset);
647 }
648
649 /* We should also have no other flags */
650 if (tiler_flags)
651 pandecode_msg("XXX: unexpected tiler %X\n", tiler_flags);
652 } else {
653 /* When tiling is disabled, we should have that flag and no others */
654
655 if (tiler_flags != MALI_TILER_DISABLED) {
656 pandecode_msg("XXX: unexpected tiler flag %X, expected MALI_TILER_DISABLED\n",
657 tiler_flags);
658 }
659
660 /* We should also have an empty heap */
661 if (heap_size) {
662 pandecode_msg("XXX: tiler heap size %d given, expected empty\n",
663 heap_size);
664 }
665
666 /* Disabled tiling is used only for clear-only jobs, which are
667 * purely FRAGMENT, so we should never see this for
668 * non-FRAGMENT descriptors. */
669
670 if (!is_fragment)
671 pandecode_msg("XXX: tiler disabled for non-FRAGMENT job\n");
672 }
673
674 /* We've never seen weights used in practice, but we know from the
675 * kernel these fields is there */
676
677 bool nonzero_weights = false;
678
679 for (unsigned w = 0; w < ARRAY_SIZE(t->weights); ++w) {
680 nonzero_weights |= t->weights[w] != 0x0;
681 }
682
683 if (nonzero_weights) {
684 pandecode_log(".weights = { ");
685
686 for (unsigned w = 0; w < ARRAY_SIZE(t->weights); ++w) {
687 pandecode_log_cont("%d, ", t->weights[w]);
688 }
689
690 pandecode_log("},");
691 }
692
693 pandecode_indent--;
694 pandecode_log("}\n");
695 }
696
697 /* TODO: The Bifrost tiler is not understood at all yet */
698
699 static void
700 pandecode_bifrost_tiler_descriptor(const struct mali_framebuffer *fb)
701 {
702 pandecode_log(".tiler = {\n");
703 pandecode_indent++;
704
705 MEMORY_PROP(fb, tiler_meta);
706
707 for (int i = 0; i < 16; i++) {
708 if (fb->zeros[i] != 0) {
709 pandecode_msg("XXX: tiler descriptor zero %d tripped, value %x\n",
710 i, fb->zeros[i]);
711 }
712 }
713
714 pandecode_log("},\n");
715
716 pandecode_indent--;
717 pandecode_log("}\n");
718
719 }
720
721 /* Information about the framebuffer passed back for
722 * additional analysis */
723
724 struct pandecode_fbd {
725 unsigned width;
726 unsigned height;
727 unsigned rt_count;
728 bool has_extra;
729 };
730
731 static void
732 pandecode_sfbd_format(struct mali_sfbd_format format)
733 {
734 pandecode_log(".format = {\n");
735 pandecode_indent++;
736
737 pandecode_log(".unk1 = ");
738 pandecode_log_decoded_flags(sfbd_unk1_info, format.unk1);
739 pandecode_log_cont(",\n");
740
741 /* TODO: Map formats so we can check swizzles and print nicely */
742 pandecode_log("swizzle");
743 pandecode_swizzle(format.swizzle, MALI_RGBA8_UNORM);
744 pandecode_log_cont(",\n");
745
746 pandecode_prop("nr_channels = MALI_POSITIVE(%d)",
747 (format.nr_channels + 1));
748
749 pandecode_log(".unk2 = ");
750 pandecode_log_decoded_flags(sfbd_unk2_info, format.unk2);
751 pandecode_log_cont(",\n");
752
753 pandecode_prop("block = %s", pandecode_block_format(format.block));
754
755 pandecode_prop("unk3 = 0x%" PRIx32, format.unk3);
756
757 pandecode_indent--;
758 pandecode_log("},\n");
759 }
760
761 static void
762 pandecode_shared_memory(const struct mali_shared_memory *desc, bool is_compute)
763 {
764 pandecode_prop("stack_shift = 0x%x", desc->stack_shift);
765
766 if (desc->unk0)
767 pandecode_prop("unk0 = 0x%x", desc->unk0);
768
769 if (desc->shared_workgroup_count != 0x1F) {
770 pandecode_prop("shared_workgroup_count = %d", desc->shared_workgroup_count);
771 if (!is_compute)
772 pandecode_msg("XXX: wrong workgroup count for noncompute\n");
773 }
774
775 if (desc->shared_unk1 || desc->shared_shift) {
776 pandecode_prop("shared_unk1 = %X", desc->shared_unk1);
777 pandecode_prop("shared_shift = %X", desc->shared_shift);
778
779 if (!is_compute)
780 pandecode_msg("XXX: shared memory configured in noncompute shader");
781 }
782
783 if (desc->shared_zero) {
784 pandecode_msg("XXX: shared memory zero tripped\n");
785 pandecode_prop("shared_zero = 0x%" PRIx32, desc->shared_zero);
786 }
787
788 if (desc->shared_memory && !is_compute)
789 pandecode_msg("XXX: shared memory used in noncompute shader\n");
790
791 MEMORY_PROP(desc, scratchpad);
792 MEMORY_PROP(desc, shared_memory);
793 MEMORY_PROP(desc, unknown1);
794
795 if (desc->scratchpad) {
796 struct pandecode_mapped_memory *smem =
797 pandecode_find_mapped_gpu_mem_containing(desc->scratchpad);
798
799 pandecode_msg("scratchpad size %u\n", smem->length);
800 }
801
802 }
803
804 static struct pandecode_fbd
805 pandecode_sfbd(uint64_t gpu_va, int job_no, bool is_fragment, unsigned gpu_id)
806 {
807 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
808 const struct mali_single_framebuffer *PANDECODE_PTR_VAR(s, mem, (mali_ptr) gpu_va);
809
810 struct pandecode_fbd info = {
811 .has_extra = false,
812 .rt_count = 1
813 };
814
815 pandecode_log("struct mali_single_framebuffer framebuffer_%"PRIx64"_%d = {\n", gpu_va, job_no);
816 pandecode_indent++;
817
818 pandecode_log(".shared_memory = {\n");
819 pandecode_indent++;
820 pandecode_shared_memory(&s->shared_memory, false);
821 pandecode_indent--;
822 pandecode_log("},\n");
823
824 pandecode_sfbd_format(s->format);
825
826 info.width = s->width + 1;
827 info.height = s->height + 1;
828
829 pandecode_prop("width = MALI_POSITIVE(%" PRId16 ")", info.width);
830 pandecode_prop("height = MALI_POSITIVE(%" PRId16 ")", info.height);
831
832 MEMORY_PROP(s, checksum);
833
834 if (s->checksum_stride)
835 pandecode_prop("checksum_stride = %d", s->checksum_stride);
836
837 MEMORY_PROP(s, framebuffer);
838 pandecode_prop("stride = %d", s->stride);
839
840 /* Earlier in the actual commandstream -- right before width -- but we
841 * delay to flow nicer */
842
843 pandecode_log(".clear_flags = ");
844 pandecode_log_decoded_flags(clear_flag_info, s->clear_flags);
845 pandecode_log_cont(",\n");
846
847 if (s->depth_buffer) {
848 MEMORY_PROP(s, depth_buffer);
849 pandecode_prop("depth_stride = %d", s->depth_stride);
850 }
851
852 if (s->stencil_buffer) {
853 MEMORY_PROP(s, stencil_buffer);
854 pandecode_prop("stencil_stride = %d", s->stencil_stride);
855 }
856
857 if (s->depth_stride_zero ||
858 s->stencil_stride_zero ||
859 s->zero7 || s->zero8) {
860 pandecode_msg("XXX: Depth/stencil zeros tripped\n");
861 pandecode_prop("depth_stride_zero = 0x%x",
862 s->depth_stride_zero);
863 pandecode_prop("stencil_stride_zero = 0x%x",
864 s->stencil_stride_zero);
865 pandecode_prop("zero7 = 0x%" PRIx32,
866 s->zero7);
867 pandecode_prop("zero8 = 0x%" PRIx32,
868 s->zero8);
869 }
870
871 if (s->clear_color_1 | s->clear_color_2 | s->clear_color_3 | s->clear_color_4) {
872 pandecode_prop("clear_color_1 = 0x%" PRIx32, s->clear_color_1);
873 pandecode_prop("clear_color_2 = 0x%" PRIx32, s->clear_color_2);
874 pandecode_prop("clear_color_3 = 0x%" PRIx32, s->clear_color_3);
875 pandecode_prop("clear_color_4 = 0x%" PRIx32, s->clear_color_4);
876 }
877
878 if (s->clear_depth_1 != 0 || s->clear_depth_2 != 0 || s->clear_depth_3 != 0 || s->clear_depth_4 != 0) {
879 pandecode_prop("clear_depth_1 = %f", s->clear_depth_1);
880 pandecode_prop("clear_depth_2 = %f", s->clear_depth_2);
881 pandecode_prop("clear_depth_3 = %f", s->clear_depth_3);
882 pandecode_prop("clear_depth_4 = %f", s->clear_depth_4);
883 }
884
885 if (s->clear_stencil) {
886 pandecode_prop("clear_stencil = 0x%x", s->clear_stencil);
887 }
888
889 const struct midgard_tiler_descriptor t = s->tiler;
890
891 bool has_hierarchy = !(gpu_id == 0x0720 || gpu_id == 0x0820 || gpu_id == 0x0830);
892 pandecode_midgard_tiler_descriptor(&t, s->width + 1, s->height + 1, is_fragment, has_hierarchy);
893
894 pandecode_indent--;
895 pandecode_log("};\n");
896
897 pandecode_prop("zero2 = 0x%" PRIx32, s->zero2);
898 pandecode_prop("zero4 = 0x%" PRIx32, s->zero4);
899 pandecode_prop("zero5 = 0x%" PRIx32, s->zero5);
900
901 pandecode_log_cont(".zero3 = {");
902
903 for (int i = 0; i < sizeof(s->zero3) / sizeof(s->zero3[0]); ++i)
904 pandecode_log_cont("%X, ", s->zero3[i]);
905
906 pandecode_log_cont("},\n");
907
908 pandecode_log_cont(".zero6 = {");
909
910 for (int i = 0; i < sizeof(s->zero6) / sizeof(s->zero6[0]); ++i)
911 pandecode_log_cont("%X, ", s->zero6[i]);
912
913 pandecode_log_cont("},\n");
914
915 return info;
916 }
917
918 static void
919 pandecode_compute_fbd(uint64_t gpu_va, int job_no)
920 {
921 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
922 const struct mali_shared_memory *PANDECODE_PTR_VAR(s, mem, (mali_ptr) gpu_va);
923
924 pandecode_log("struct mali_shared_memory shared_%"PRIx64"_%d = {\n", gpu_va, job_no);
925 pandecode_indent++;
926 pandecode_shared_memory(s, true);
927 pandecode_indent--;
928 pandecode_log("},\n");
929 }
930
931 /* Extracts the number of components associated with a Mali format */
932
933 static unsigned
934 pandecode_format_component_count(enum mali_format fmt)
935 {
936 /* Mask out the format class */
937 unsigned top = fmt & 0b11100000;
938
939 switch (top) {
940 case MALI_FORMAT_SNORM:
941 case MALI_FORMAT_UINT:
942 case MALI_FORMAT_UNORM:
943 case MALI_FORMAT_SINT:
944 return ((fmt >> 3) & 3) + 1;
945 default:
946 /* TODO: Validate */
947 return 4;
948 }
949 }
950
951 /* Extracts a mask of accessed components from a 12-bit Mali swizzle */
952
953 static unsigned
954 pandecode_access_mask_from_channel_swizzle(unsigned swizzle)
955 {
956 unsigned mask = 0;
957 assert(MALI_CHANNEL_RED == 0);
958
959 for (unsigned c = 0; c < 4; ++c) {
960 enum mali_channel chan = (swizzle >> (3*c)) & 0x7;
961
962 if (chan <= MALI_CHANNEL_ALPHA)
963 mask |= (1 << chan);
964 }
965
966 return mask;
967 }
968
969 /* Validates that a (format, swizzle) pair is valid, in the sense that the
970 * swizzle doesn't access any components that are undefined in the format.
971 * Returns whether the swizzle is trivial (doesn't do any swizzling) and can be
972 * omitted */
973
974 static bool
975 pandecode_validate_format_swizzle(enum mali_format fmt, unsigned swizzle)
976 {
977 unsigned nr_comp = pandecode_format_component_count(fmt);
978 unsigned access_mask = pandecode_access_mask_from_channel_swizzle(swizzle);
979 unsigned valid_mask = (1 << nr_comp) - 1;
980 unsigned invalid_mask = ~valid_mask;
981
982 if (access_mask & invalid_mask) {
983 pandecode_msg("XXX: invalid components accessed\n");
984 return false;
985 }
986
987 /* Check for the default non-swizzling swizzle so we can suppress
988 * useless printing for the defaults */
989
990 unsigned default_swizzles[4] = {
991 MALI_CHANNEL_RED | (MALI_CHANNEL_ZERO << 3) | (MALI_CHANNEL_ZERO << 6) | (MALI_CHANNEL_ONE << 9),
992 MALI_CHANNEL_RED | (MALI_CHANNEL_GREEN << 3) | (MALI_CHANNEL_ZERO << 6) | (MALI_CHANNEL_ONE << 9),
993 MALI_CHANNEL_RED | (MALI_CHANNEL_GREEN << 3) | (MALI_CHANNEL_BLUE << 6) | (MALI_CHANNEL_ONE << 9),
994 MALI_CHANNEL_RED | (MALI_CHANNEL_GREEN << 3) | (MALI_CHANNEL_BLUE << 6) | (MALI_CHANNEL_ALPHA << 9)
995 };
996
997 return (swizzle == default_swizzles[nr_comp - 1]);
998 }
999
1000 /* Maps MALI_RGBA32F to rgba32f, etc */
1001
1002 static void
1003 pandecode_format_short(enum mali_format fmt, bool srgb)
1004 {
1005 /* We want a type-like format, so cut off the initial MALI_ */
1006 char *format = pandecode_format(fmt);
1007 format += strlen("MALI_");
1008
1009 unsigned len = strlen(format);
1010 char *lower_format = calloc(1, len + 1);
1011
1012 for (unsigned i = 0; i < len; ++i)
1013 lower_format[i] = tolower(format[i]);
1014
1015 /* Sanity check sRGB flag is applied to RGB, per the name */
1016 if (srgb && lower_format[0] != 'r')
1017 pandecode_msg("XXX: sRGB applied to non-colour format\n");
1018
1019 /* Just prefix with an s, so you get formats like srgba8_unorm */
1020 if (srgb)
1021 pandecode_log_cont("s");
1022
1023 pandecode_log_cont("%s", lower_format);
1024 free(lower_format);
1025 }
1026
1027 static void
1028 pandecode_swizzle(unsigned swizzle, enum mali_format format)
1029 {
1030 /* First, do some validation */
1031 bool trivial_swizzle = pandecode_validate_format_swizzle(
1032 format, swizzle);
1033
1034 if (trivial_swizzle)
1035 return;
1036
1037 /* Next, print the swizzle */
1038 pandecode_log_cont(".");
1039
1040 static const char components[] = "rgba01";
1041
1042 for (unsigned c = 0; c < 4; ++c) {
1043 enum mali_channel chan = (swizzle >> (3 * c)) & 0x7;
1044
1045 if (chan >= MALI_CHANNEL_RESERVED_0) {
1046 pandecode_log("XXX: invalid swizzle channel %d\n", chan);
1047 continue;
1048 }
1049 pandecode_log_cont("%c", components[chan]);
1050 }
1051 }
1052
1053 static void
1054 pandecode_rt_format(struct mali_rt_format format)
1055 {
1056 pandecode_log(".format = {\n");
1057 pandecode_indent++;
1058
1059 pandecode_prop("unk1 = 0x%" PRIx32, format.unk1);
1060 pandecode_prop("unk2 = 0x%" PRIx32, format.unk2);
1061 pandecode_prop("unk3 = 0x%" PRIx32, format.unk3);
1062 pandecode_prop("unk4 = 0x%" PRIx32, format.unk4);
1063
1064 pandecode_prop("block = %s", pandecode_block_format(format.block));
1065
1066 /* TODO: Map formats so we can check swizzles and print nicely */
1067 pandecode_log("swizzle");
1068 pandecode_swizzle(format.swizzle, MALI_RGBA8_UNORM);
1069 pandecode_log_cont(",\n");
1070
1071 pandecode_prop("nr_channels = MALI_POSITIVE(%d)",
1072 (format.nr_channels + 1));
1073
1074 pandecode_log(".flags = ");
1075 pandecode_log_decoded_flags(mfbd_fmt_flag_info, format.flags);
1076 pandecode_log_cont(",\n");
1077
1078 pandecode_prop("msaa = %s", pandecode_msaa_mode(format.msaa));
1079
1080 /* In theory, the no_preload bit can be cleared to enable MFBD preload,
1081 * which is a faster hardware-based alternative to the wallpaper method
1082 * to preserve framebuffer contents across frames. In practice, MFBD
1083 * preload is buggy on Midgard, and so this is a chicken bit. If this
1084 * bit isn't set, most likely something broke unrelated to preload */
1085
1086 if (!format.no_preload) {
1087 pandecode_msg("XXX: buggy MFBD preload enabled - chicken bit should be clear\n");
1088 pandecode_prop("no_preload = 0x%" PRIx32, format.no_preload);
1089 }
1090
1091 if (format.zero)
1092 pandecode_prop("zero = 0x%" PRIx32, format.zero);
1093
1094 pandecode_indent--;
1095 pandecode_log("},\n");
1096 }
1097
1098 static void
1099 pandecode_render_target(uint64_t gpu_va, unsigned job_no, const struct mali_framebuffer *fb)
1100 {
1101 pandecode_log("struct mali_render_target rts_list_%"PRIx64"_%d[] = {\n", gpu_va, job_no);
1102 pandecode_indent++;
1103
1104 for (int i = 0; i < (fb->rt_count_1 + 1); i++) {
1105 mali_ptr rt_va = gpu_va + i * sizeof(struct mali_render_target);
1106 struct pandecode_mapped_memory *mem =
1107 pandecode_find_mapped_gpu_mem_containing(rt_va);
1108 const struct mali_render_target *PANDECODE_PTR_VAR(rt, mem, (mali_ptr) rt_va);
1109
1110 pandecode_log("{\n");
1111 pandecode_indent++;
1112
1113 pandecode_rt_format(rt->format);
1114
1115 if (rt->format.block == MALI_BLOCK_AFBC) {
1116 pandecode_log(".afbc = {\n");
1117 pandecode_indent++;
1118
1119 char *a = pointer_as_memory_reference(rt->afbc.metadata);
1120 pandecode_prop("metadata = %s", a);
1121 free(a);
1122
1123 pandecode_prop("stride = %d", rt->afbc.stride);
1124
1125 pandecode_log(".flags = ");
1126 pandecode_log_decoded_flags(afbc_fmt_flag_info, rt->afbc.flags);
1127 pandecode_log_cont(",\n");
1128
1129 pandecode_indent--;
1130 pandecode_log("},\n");
1131 } else if (rt->afbc.metadata || rt->afbc.stride || rt->afbc.flags) {
1132 pandecode_msg("XXX: AFBC disabled but AFBC field set (0x%lX, 0x%x, 0x%x)\n",
1133 rt->afbc.metadata,
1134 rt->afbc.stride,
1135 rt->afbc.flags);
1136 }
1137
1138 MEMORY_PROP(rt, framebuffer);
1139 pandecode_prop("framebuffer_stride = %d", rt->framebuffer_stride);
1140
1141 if (rt->layer_stride)
1142 pandecode_prop("layer_stride = %d", rt->layer_stride);
1143
1144 if (rt->clear_color_1 | rt->clear_color_2 | rt->clear_color_3 | rt->clear_color_4) {
1145 pandecode_prop("clear_color_1 = 0x%" PRIx32, rt->clear_color_1);
1146 pandecode_prop("clear_color_2 = 0x%" PRIx32, rt->clear_color_2);
1147 pandecode_prop("clear_color_3 = 0x%" PRIx32, rt->clear_color_3);
1148 pandecode_prop("clear_color_4 = 0x%" PRIx32, rt->clear_color_4);
1149 }
1150
1151 if (rt->zero1 || rt->zero2) {
1152 pandecode_msg("XXX: render target zeros tripped\n");
1153 pandecode_prop("zero1 = 0x%" PRIx64, rt->zero1);
1154 pandecode_prop("zero2 = 0x%" PRIx32, rt->zero2);
1155 }
1156
1157 pandecode_indent--;
1158 pandecode_log("},\n");
1159 }
1160
1161 pandecode_indent--;
1162 pandecode_log("};\n");
1163 }
1164
1165 static struct pandecode_fbd
1166 pandecode_mfbd_bfr(uint64_t gpu_va, int job_no, bool is_fragment, bool is_compute, bool is_bifrost)
1167 {
1168 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
1169 const struct mali_framebuffer *PANDECODE_PTR_VAR(fb, mem, (mali_ptr) gpu_va);
1170
1171 struct pandecode_fbd info;
1172
1173 if (is_bifrost && fb->msaa.sample_locations) {
1174 /* The blob stores all possible sample locations in a single buffer
1175 * allocated on startup, and just switches the pointer when switching
1176 * MSAA state. For now, we just put the data into the cmdstream, but we
1177 * should do something like what the blob does with a real driver.
1178 *
1179 * There seem to be 32 slots for sample locations, followed by another
1180 * 16. The second 16 is just the center location followed by 15 zeros
1181 * in all the cases I've identified (maybe shader vs. depth/color
1182 * samples?).
1183 */
1184
1185 struct pandecode_mapped_memory *smem = pandecode_find_mapped_gpu_mem_containing(fb->msaa.sample_locations);
1186
1187 const u16 *PANDECODE_PTR_VAR(samples, smem, fb->msaa.sample_locations);
1188
1189 pandecode_log("uint16_t sample_locations_%d[] = {\n", job_no);
1190 pandecode_indent++;
1191
1192 for (int i = 0; i < 32 + 16; i++) {
1193 pandecode_log("%d, %d,\n", samples[2 * i], samples[2 * i + 1]);
1194 }
1195
1196 pandecode_indent--;
1197 pandecode_log("};\n");
1198 }
1199
1200 pandecode_log("struct mali_framebuffer framebuffer_%"PRIx64"_%d = {\n", gpu_va, job_no);
1201 pandecode_indent++;
1202
1203 if (is_bifrost) {
1204 pandecode_log(".msaa = {\n");
1205 pandecode_indent++;
1206
1207 if (fb->msaa.sample_locations)
1208 pandecode_prop("sample_locations = sample_locations_%d", job_no);
1209 else
1210 pandecode_msg("XXX: sample_locations missing\n");
1211
1212 if (fb->msaa.zero1 || fb->msaa.zero2 || fb->msaa.zero4) {
1213 pandecode_msg("XXX: multisampling zero tripped\n");
1214 pandecode_prop("zero1 = %" PRIx64, fb->msaa.zero1);
1215 pandecode_prop("zero2 = %" PRIx64, fb->msaa.zero2);
1216 pandecode_prop("zero4 = %" PRIx64, fb->msaa.zero4);
1217 }
1218
1219 pandecode_indent--;
1220 pandecode_log("},\n");
1221 } else {
1222 pandecode_log(".shared_memory = {\n");
1223 pandecode_indent++;
1224 pandecode_shared_memory(&fb->shared_memory, is_compute);
1225 pandecode_indent--;
1226 pandecode_log("},\n");
1227 }
1228
1229 info.width = fb->width1 + 1;
1230 info.height = fb->height1 + 1;
1231 info.rt_count = fb->rt_count_1 + 1;
1232
1233 pandecode_prop("width1 = MALI_POSITIVE(%d)", fb->width1 + 1);
1234 pandecode_prop("height1 = MALI_POSITIVE(%d)", fb->height1 + 1);
1235 pandecode_prop("width2 = MALI_POSITIVE(%d)", fb->width2 + 1);
1236 pandecode_prop("height2 = MALI_POSITIVE(%d)", fb->height2 + 1);
1237
1238 pandecode_prop("unk1 = 0x%x", fb->unk1);
1239 pandecode_prop("unk2 = 0x%x", fb->unk2);
1240 pandecode_prop("rt_count_1 = MALI_POSITIVE(%d)", fb->rt_count_1 + 1);
1241 pandecode_prop("rt_count_2 = %d", fb->rt_count_2);
1242
1243 pandecode_log(".mfbd_flags = ");
1244 pandecode_log_decoded_flags(mfbd_flag_info, fb->mfbd_flags);
1245 pandecode_log_cont(",\n");
1246
1247 if (fb->clear_stencil)
1248 pandecode_prop("clear_stencil = 0x%x", fb->clear_stencil);
1249
1250 if (fb->clear_depth)
1251 pandecode_prop("clear_depth = %f", fb->clear_depth);
1252
1253 if (!is_compute)
1254 if (is_bifrost)
1255 pandecode_bifrost_tiler_descriptor(fb);
1256 else {
1257 const struct midgard_tiler_descriptor t = fb->tiler;
1258 pandecode_midgard_tiler_descriptor(&t, fb->width1 + 1, fb->height1 + 1, is_fragment, true);
1259 }
1260 else
1261 pandecode_msg("XXX: skipping compute MFBD, fixme\n");
1262
1263 if (fb->zero3 || fb->zero4) {
1264 pandecode_msg("XXX: framebuffer zeros tripped\n");
1265 pandecode_prop("zero3 = 0x%" PRIx32, fb->zero3);
1266 pandecode_prop("zero4 = 0x%" PRIx32, fb->zero4);
1267 }
1268
1269 pandecode_indent--;
1270 pandecode_log("};\n");
1271
1272 gpu_va += sizeof(struct mali_framebuffer);
1273
1274 info.has_extra = (fb->mfbd_flags & MALI_MFBD_EXTRA) && is_fragment;
1275
1276 if (info.has_extra) {
1277 mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
1278 const struct mali_framebuffer_extra *PANDECODE_PTR_VAR(fbx, mem, (mali_ptr) gpu_va);
1279
1280 pandecode_log("struct mali_framebuffer_extra fb_extra_%"PRIx64"_%d = {\n", gpu_va, job_no);
1281 pandecode_indent++;
1282
1283 MEMORY_PROP(fbx, checksum);
1284
1285 if (fbx->checksum_stride)
1286 pandecode_prop("checksum_stride = %d", fbx->checksum_stride);
1287
1288 pandecode_log(".flags_hi = ");
1289 pandecode_log_decoded_flags(mfbd_extra_flag_hi_info, fbx->flags_hi);
1290 pandecode_log_cont(",\n");
1291
1292 pandecode_log(".flags_lo = ");
1293 pandecode_log_decoded_flags(mfbd_extra_flag_lo_info, fbx->flags_lo);
1294 pandecode_log_cont(",\n");
1295
1296 pandecode_prop("zs_block = %s", pandecode_block_format(fbx->zs_block));
1297 pandecode_prop("zs_samples = MALI_POSITIVE(%u)", fbx->zs_samples + 1);
1298
1299 if (fbx->zs_block == MALI_BLOCK_AFBC) {
1300 pandecode_log(".ds_afbc = {\n");
1301 pandecode_indent++;
1302
1303 MEMORY_PROP_DIR(fbx->ds_afbc, depth_stencil_afbc_metadata);
1304 pandecode_prop("depth_stencil_afbc_stride = %d",
1305 fbx->ds_afbc.depth_stencil_afbc_stride);
1306 MEMORY_PROP_DIR(fbx->ds_afbc, depth_stencil);
1307
1308 pandecode_log(".flags = ");
1309 pandecode_log_decoded_flags(afbc_fmt_flag_info, fbx->ds_afbc.flags);
1310 pandecode_log_cont(",\n");
1311
1312 if (fbx->ds_afbc.padding) {
1313 pandecode_msg("XXX: Depth/stencil AFBC zeros tripped\n");
1314 pandecode_prop("padding = 0x%" PRIx64, fbx->ds_afbc.padding);
1315 }
1316
1317 pandecode_indent--;
1318 pandecode_log("},\n");
1319 } else {
1320 pandecode_log(".ds_linear = {\n");
1321 pandecode_indent++;
1322
1323 if (fbx->ds_linear.depth) {
1324 MEMORY_PROP_DIR(fbx->ds_linear, depth);
1325 pandecode_prop("depth_stride = %d",
1326 fbx->ds_linear.depth_stride);
1327 pandecode_prop("depth_layer_stride = %d",
1328 fbx->ds_linear.depth_layer_stride);
1329 } else if (fbx->ds_linear.depth_stride || fbx->ds_linear.depth_layer_stride) {
1330 pandecode_msg("XXX: depth stride zero tripped %d %d\n", fbx->ds_linear.depth_stride, fbx->ds_linear.depth_layer_stride);
1331 }
1332
1333 if (fbx->ds_linear.stencil) {
1334 MEMORY_PROP_DIR(fbx->ds_linear, stencil);
1335 pandecode_prop("stencil_stride = %d",
1336 fbx->ds_linear.stencil_stride);
1337 pandecode_prop("stencil_layer_stride = %d",
1338 fbx->ds_linear.stencil_layer_stride);
1339 } else if (fbx->ds_linear.stencil_stride || fbx->ds_linear.stencil_layer_stride) {
1340 pandecode_msg("XXX: stencil stride zero tripped %d %d\n", fbx->ds_linear.stencil_stride, fbx->ds_linear.stencil_layer_stride);
1341 }
1342
1343 if (fbx->ds_linear.depth_stride_zero ||
1344 fbx->ds_linear.stencil_stride_zero) {
1345 pandecode_msg("XXX: Depth/stencil zeros tripped\n");
1346 pandecode_prop("depth_stride_zero = 0x%x",
1347 fbx->ds_linear.depth_stride_zero);
1348 pandecode_prop("stencil_stride_zero = 0x%x",
1349 fbx->ds_linear.stencil_stride_zero);
1350 }
1351
1352 pandecode_indent--;
1353 pandecode_log("},\n");
1354 }
1355
1356 if (fbx->clear_color_1 | fbx->clear_color_2) {
1357 pandecode_prop("clear_color_1 = 0x%" PRIx32, fbx->clear_color_1);
1358 pandecode_prop("clear_color_2 = 0x%" PRIx32, fbx->clear_color_2);
1359 }
1360
1361 if (fbx->zero3) {
1362 pandecode_msg("XXX: fb_extra zeros tripped\n");
1363 pandecode_prop("zero3 = 0x%" PRIx64, fbx->zero3);
1364 }
1365
1366 pandecode_indent--;
1367 pandecode_log("};\n");
1368
1369 gpu_va += sizeof(struct mali_framebuffer_extra);
1370 }
1371
1372 if (is_fragment)
1373 pandecode_render_target(gpu_va, job_no, fb);
1374
1375 return info;
1376 }
1377
1378 /* Just add a comment decoding the shift/odd fields forming the padded vertices
1379 * count */
1380
1381 static void
1382 pandecode_padded_vertices(unsigned shift, unsigned k)
1383 {
1384 unsigned odd = 2*k + 1;
1385 unsigned pot = 1 << shift;
1386 pandecode_msg("padded_num_vertices = %d\n", odd * pot);
1387 }
1388
1389 /* Given a magic divisor, recover what we were trying to divide by.
1390 *
1391 * Let m represent the magic divisor. By definition, m is an element on Z, whre
1392 * 0 <= m < 2^N, for N bits in m.
1393 *
1394 * Let q represent the number we would like to divide by.
1395 *
1396 * By definition of a magic divisor for N-bit unsigned integers (a number you
1397 * multiply by to magically get division), m is a number such that:
1398 *
1399 * (m * x) & (2^N - 1) = floor(x/q).
1400 * for all x on Z where 0 <= x < 2^N
1401 *
1402 * Ignore the case where any of the above values equals zero; it is irrelevant
1403 * for our purposes (instanced arrays).
1404 *
1405 * Choose x = q. Then:
1406 *
1407 * (m * x) & (2^N - 1) = floor(x/q).
1408 * (m * q) & (2^N - 1) = floor(q/q).
1409 *
1410 * floor(q/q) = floor(1) = 1, therefore:
1411 *
1412 * (m * q) & (2^N - 1) = 1
1413 *
1414 * Recall the identity that the bitwise AND of one less than a power-of-two
1415 * equals the modulo with that power of two, i.e. for all x:
1416 *
1417 * x & (2^N - 1) = x % N
1418 *
1419 * Therefore:
1420 *
1421 * mq % (2^N) = 1
1422 *
1423 * By definition, a modular multiplicative inverse of a number m is the number
1424 * q such that with respect to a modulos M:
1425 *
1426 * mq % M = 1
1427 *
1428 * Therefore, q is the modular multiplicative inverse of m with modulus 2^N.
1429 *
1430 */
1431
1432 static void
1433 pandecode_magic_divisor(uint32_t magic, unsigned shift, unsigned orig_divisor, unsigned extra)
1434 {
1435 #if 0
1436 /* Compute the modular inverse of `magic` with respect to 2^(32 -
1437 * shift) the most lame way possible... just repeatedly add.
1438 * Asymptoptically slow but nobody cares in practice, unless you have
1439 * massive numbers of vertices or high divisors. */
1440
1441 unsigned inverse = 0;
1442
1443 /* Magic implicitly has the highest bit set */
1444 magic |= (1 << 31);
1445
1446 /* Depending on rounding direction */
1447 if (extra)
1448 magic++;
1449
1450 for (;;) {
1451 uint32_t product = magic * inverse;
1452
1453 if (shift) {
1454 product >>= shift;
1455 }
1456
1457 if (product == 1)
1458 break;
1459
1460 ++inverse;
1461 }
1462
1463 pandecode_msg("dividing by %d (maybe off by two)\n", inverse);
1464
1465 /* Recall we're supposed to divide by (gl_level_divisor *
1466 * padded_num_vertices) */
1467
1468 unsigned padded_num_vertices = inverse / orig_divisor;
1469
1470 pandecode_msg("padded_num_vertices = %d\n", padded_num_vertices);
1471 #endif
1472 }
1473
1474 static void
1475 pandecode_attributes(const struct pandecode_mapped_memory *mem,
1476 mali_ptr addr, int job_no, char *suffix,
1477 int count, bool varying, enum mali_job_type job_type)
1478 {
1479 char *prefix = varying ? "varying" : "attribute";
1480 assert(addr);
1481
1482 if (!count) {
1483 pandecode_msg("warn: No %s records\n", prefix);
1484 return;
1485 }
1486
1487 union mali_attr *attr = pandecode_fetch_gpu_mem(mem, addr, sizeof(union mali_attr) * count);
1488
1489 for (int i = 0; i < count; ++i) {
1490 /* First, check for special records */
1491 if (attr[i].elements < MALI_RECORD_SPECIAL) {
1492 if (attr[i].size)
1493 pandecode_msg("XXX: tripped size=%d\n", attr[i].size);
1494
1495 if (attr[i].stride) {
1496 /* gl_InstanceID passes a magic divisor in the
1497 * stride field to divide by the padded vertex
1498 * count. No other records should do so, so
1499 * stride should otherwise be zero. Note that
1500 * stride in the usual attribute sense doesn't
1501 * apply to special records. */
1502
1503 bool has_divisor = attr[i].elements == MALI_ATTR_INSTANCEID;
1504
1505 pandecode_log_cont("/* %smagic divisor = %X */ ",
1506 has_divisor ? "" : "XXX: ", attr[i].stride);
1507 }
1508
1509 if (attr[i].shift || attr[i].extra_flags) {
1510 /* Attributes use these fields for
1511 * instancing/padding/etc type issues, but
1512 * varyings don't */
1513
1514 pandecode_log_cont("/* %sshift=%d, extra=%d */ ",
1515 varying ? "XXX: " : "",
1516 attr[i].shift, attr[i].extra_flags);
1517 }
1518
1519 /* Print the special record name */
1520 bool attribute = false;
1521 pandecode_log("%s_%d = %s;\n", prefix, i, pandecode_special_record(attr[i].elements, &attribute));
1522
1523 /* Sanity check */
1524 if (attribute == varying)
1525 pandecode_msg("XXX: mismatched special record\n");
1526
1527 continue;
1528 }
1529
1530 enum mali_attr_mode mode = attr[i].elements & 7;
1531
1532 if (mode == MALI_ATTR_UNUSED)
1533 pandecode_msg("XXX: unused attribute record\n");
1534
1535 /* For non-linear records, we need to print the type of record */
1536 if (mode != MALI_ATTR_LINEAR)
1537 pandecode_log_cont("%s ", pandecode_attr_mode_short(mode));
1538
1539 /* Print the name to link with attr_meta */
1540 pandecode_log_cont("%s_%d", prefix, i);
1541
1542 /* Print the stride and size */
1543 pandecode_log_cont("<%u>[%u]", attr[i].stride, attr[i].size);
1544
1545 /* TODO: Sanity check the quotient itself. It must be equal to
1546 * (or be greater than, if the driver added padding) the padded
1547 * vertex count. */
1548
1549 /* Finally, print the pointer */
1550 mali_ptr raw_elements = attr[i].elements & ~7;
1551 char *a = pointer_as_memory_reference(raw_elements);
1552 pandecode_log_cont(" = (%s);\n", a);
1553 free(a);
1554
1555 /* Check the pointer */
1556 pandecode_validate_buffer(raw_elements, attr[i].size);
1557
1558 /* shift/extra_flags exist only for instanced */
1559 if (attr[i].shift | attr[i].extra_flags) {
1560 /* These are set to random values by the blob for
1561 * varyings, most likely a symptom of uninitialized
1562 * memory where the hardware masked the bug. As such we
1563 * put this at a warning, not an error. */
1564
1565 if (mode == MALI_ATTR_LINEAR)
1566 pandecode_msg("warn: instancing fields set for linear\n");
1567
1568 pandecode_prop("shift = %d", attr[i].shift);
1569 pandecode_prop("extra_flags = %d", attr[i].extra_flags);
1570 }
1571
1572 /* Decode further where possible */
1573
1574 if (mode == MALI_ATTR_MODULO) {
1575 pandecode_padded_vertices(
1576 attr[i].shift,
1577 attr[i].extra_flags);
1578 }
1579
1580 if (mode == MALI_ATTR_NPOT_DIVIDE) {
1581 i++;
1582 pandecode_log("{\n");
1583 pandecode_indent++;
1584 pandecode_prop("unk = 0x%x", attr[i].unk);
1585 pandecode_prop("magic_divisor = 0x%08x", attr[i].magic_divisor);
1586 if (attr[i].zero != 0)
1587 pandecode_prop("XXX: zero tripped (0x%x)\n", attr[i].zero);
1588 pandecode_prop("divisor = %d", attr[i].divisor);
1589 pandecode_magic_divisor(attr[i].magic_divisor, attr[i - 1].shift, attr[i].divisor, attr[i - 1].extra_flags);
1590 pandecode_indent--;
1591 pandecode_log("}, \n");
1592 }
1593
1594 }
1595
1596 pandecode_log("\n");
1597 }
1598
1599 static mali_ptr
1600 pandecode_shader_address(const char *name, mali_ptr ptr)
1601 {
1602 /* TODO: Decode flags */
1603 mali_ptr shader_ptr = ptr & ~15;
1604
1605 char *a = pointer_as_memory_reference(shader_ptr);
1606 pandecode_prop("%s = (%s) | %d", name, a, (int) (ptr & 15));
1607 free(a);
1608
1609 return shader_ptr;
1610 }
1611
1612 static void
1613 pandecode_stencil(const char *name, const struct mali_stencil_test *stencil)
1614 {
1615 unsigned any_nonzero =
1616 stencil->ref | stencil->mask | stencil->func |
1617 stencil->sfail | stencil->dpfail | stencil->dppass;
1618
1619 if (any_nonzero == 0)
1620 return;
1621
1622 const char *func = mali_func_as_str(stencil->func);
1623 const char *sfail = mali_stencil_op_as_str(stencil->sfail);
1624 const char *dpfail = mali_stencil_op_as_str(stencil->dpfail);
1625 const char *dppass = mali_stencil_op_as_str(stencil->dppass);
1626
1627 if (stencil->zero)
1628 pandecode_msg("XXX: stencil zero tripped: %X\n", stencil->zero);
1629
1630 pandecode_log(".stencil_%s = {\n", name);
1631 pandecode_indent++;
1632 pandecode_prop("ref = %d", stencil->ref);
1633 pandecode_prop("mask = 0x%02X", stencil->mask);
1634 pandecode_prop("func = %s", func);
1635 pandecode_prop("sfail = %s", sfail);
1636 pandecode_prop("dpfail = %s", dpfail);
1637 pandecode_prop("dppass = %s", dppass);
1638 pandecode_indent--;
1639 pandecode_log("},\n");
1640 }
1641
1642 static void
1643 pandecode_blend_equation(const struct mali_blend_equation *blend)
1644 {
1645 if (blend->zero1)
1646 pandecode_msg("XXX: blend zero tripped: %X\n", blend->zero1);
1647
1648 pandecode_log(".equation = {\n");
1649 pandecode_indent++;
1650
1651 pandecode_prop("rgb_mode = 0x%X", blend->rgb_mode);
1652 pandecode_prop("alpha_mode = 0x%X", blend->alpha_mode);
1653
1654 pandecode_log(".color_mask = ");
1655 pandecode_log_decoded_flags(mask_flag_info, blend->color_mask);
1656 pandecode_log_cont(",\n");
1657
1658 pandecode_indent--;
1659 pandecode_log("},\n");
1660 }
1661
1662 /* Decodes a Bifrost blend constant. See the notes in bifrost_blend_rt */
1663
1664 static unsigned
1665 decode_bifrost_constant(u16 constant)
1666 {
1667 float lo = (float) (constant & 0xFF);
1668 float hi = (float) (constant >> 8);
1669
1670 return (hi / 255.0) + (lo / 65535.0);
1671 }
1672
1673 static mali_ptr
1674 pandecode_bifrost_blend(void *descs, int job_no, int rt_no)
1675 {
1676 struct bifrost_blend_rt *b =
1677 ((struct bifrost_blend_rt *) descs) + rt_no;
1678
1679 pandecode_log("struct bifrost_blend_rt blend_rt_%d_%d = {\n", job_no, rt_no);
1680 pandecode_indent++;
1681
1682 pandecode_prop("flags = 0x%" PRIx16, b->flags);
1683 pandecode_prop("constant = 0x%" PRIx8 " /* %f */",
1684 b->constant, decode_bifrost_constant(b->constant));
1685
1686 /* TODO figure out blend shader enable bit */
1687 pandecode_blend_equation(&b->equation);
1688
1689 pandecode_prop("unk2 = 0x%" PRIx16, b->unk2);
1690 pandecode_prop("index = 0x%" PRIx16, b->index);
1691
1692 pandecode_log(".format = ");
1693 pandecode_format_short(b->format, false);
1694 pandecode_swizzle(b->swizzle, b->format);
1695 pandecode_log_cont(",\n");
1696
1697 pandecode_prop("swizzle = 0x%" PRIx32, b->swizzle);
1698 pandecode_prop("format = 0x%" PRIx32, b->format);
1699
1700 if (b->zero1) {
1701 pandecode_msg("XXX: pandecode_bifrost_blend zero1 tripped\n");
1702 pandecode_prop("zero1 = 0x%" PRIx32, b->zero1);
1703 }
1704
1705 pandecode_log(".shader_type = ");
1706 switch(b->shader_type) {
1707 case BIFROST_BLEND_F16:
1708 pandecode_log_cont("BIFROST_BLEND_F16");
1709 break;
1710 case BIFROST_BLEND_F32:
1711 pandecode_log_cont("BIFROST_BLEND_F32");
1712 break;
1713 case BIFROST_BLEND_I32:
1714 pandecode_log_cont("BIFROST_BLEND_I32");
1715 break;
1716 case BIFROST_BLEND_U32:
1717 pandecode_log_cont("BIFROST_BLEND_U32");
1718 break;
1719 case BIFROST_BLEND_I16:
1720 pandecode_log_cont("BIFROST_BLEND_I16");
1721 break;
1722 case BIFROST_BLEND_U16:
1723 pandecode_log_cont("BIFROST_BLEND_U16");
1724 break;
1725 }
1726 pandecode_log_cont(",\n");
1727
1728 if (b->zero2) {
1729 pandecode_msg("XXX: pandecode_bifrost_blend zero2 tripped\n");
1730 pandecode_prop("zero2 = 0x%" PRIx32, b->zero2);
1731 }
1732
1733 pandecode_prop("shader = 0x%" PRIx32, b->shader);
1734
1735 pandecode_indent--;
1736 pandecode_log("},\n");
1737
1738 return 0;
1739 }
1740
1741 static mali_ptr
1742 pandecode_midgard_blend(union midgard_blend *blend, bool is_shader)
1743 {
1744 /* constant/equation is in a union */
1745 if (!blend->shader)
1746 return 0;
1747
1748 pandecode_log(".blend = {\n");
1749 pandecode_indent++;
1750
1751 if (is_shader) {
1752 pandecode_shader_address("shader", blend->shader);
1753 } else {
1754 pandecode_blend_equation(&blend->equation);
1755 pandecode_prop("constant = %f", blend->constant);
1756 }
1757
1758 pandecode_indent--;
1759 pandecode_log("},\n");
1760
1761 /* Return blend shader to disassemble if present */
1762 return is_shader ? (blend->shader & ~0xF) : 0;
1763 }
1764
1765 static mali_ptr
1766 pandecode_midgard_blend_mrt(void *descs, int job_no, int rt_no)
1767 {
1768 struct midgard_blend_rt *b =
1769 ((struct midgard_blend_rt *) descs) + rt_no;
1770
1771 /* Flags determine presence of blend shader */
1772 bool is_shader = (b->flags & 0xF) >= 0x2;
1773
1774 pandecode_log("struct midgard_blend_rt blend_rt_%d_%d = {\n", job_no, rt_no);
1775 pandecode_indent++;
1776
1777 pandecode_prop("flags = 0x%" PRIx64, b->flags);
1778
1779 union midgard_blend blend = b->blend;
1780 mali_ptr shader = pandecode_midgard_blend(&blend, is_shader);
1781
1782 pandecode_indent--;
1783 pandecode_log("};\n");
1784
1785 return shader;
1786 }
1787
1788 /* Attributes and varyings have descriptor records, which contain information
1789 * about their format and ordering with the attribute/varying buffers. We'll
1790 * want to validate that the combinations specified are self-consistent.
1791 */
1792
1793 static int
1794 pandecode_attribute_meta(int job_no, int count, const struct mali_vertex_tiler_postfix *v, bool varying, char *suffix)
1795 {
1796 char base[128];
1797 char *prefix = varying ? "varying" : "attribute";
1798 unsigned max_index = 0;
1799 snprintf(base, sizeof(base), "%s_meta", prefix);
1800
1801 struct mali_attr_meta *attr_meta;
1802 mali_ptr p = varying ? v->varying_meta : v->attribute_meta;
1803
1804 struct pandecode_mapped_memory *attr_mem = pandecode_find_mapped_gpu_mem_containing(p);
1805
1806 for (int i = 0; i < count; ++i, p += sizeof(struct mali_attr_meta)) {
1807 attr_meta = pandecode_fetch_gpu_mem(attr_mem, p,
1808 sizeof(*attr_mem));
1809
1810 /* If the record is discard, it should be zero for everything else */
1811
1812 if (attr_meta->format == MALI_VARYING_DISCARD) {
1813 uint64_t zero =
1814 attr_meta->index |
1815 attr_meta->unknown1 |
1816 attr_meta->unknown3 |
1817 attr_meta->src_offset;
1818
1819 if (zero)
1820 pandecode_msg("XXX: expected empty record for varying discard\n");
1821
1822 /* We want to look for a literal 0000 swizzle -- this
1823 * is not encoded with all zeroes, however */
1824
1825 enum mali_channel z = MALI_CHANNEL_ZERO;
1826 unsigned zero_swizzle = z | (z << 3) | (z << 6) | (z << 9);
1827 bool good_swizzle = attr_meta->swizzle == zero_swizzle;
1828
1829 if (!good_swizzle)
1830 pandecode_msg("XXX: expected zero swizzle for discard\n");
1831
1832 if (!varying)
1833 pandecode_msg("XXX: cannot discard attribute\n");
1834
1835 /* If we're all good, omit the record */
1836 if (!zero && varying && good_swizzle) {
1837 pandecode_log("/* discarded varying */\n");
1838 continue;
1839 }
1840 }
1841
1842 if (attr_meta->index > max_index)
1843 max_index = attr_meta->index;
1844
1845 if (attr_meta->unknown1 != 0x2) {
1846 pandecode_msg("XXX: expected unknown1 = 0x2\n");
1847 pandecode_prop("unknown1 = 0x%" PRIx64, (u64) attr_meta->unknown1);
1848 }
1849
1850 if (attr_meta->unknown3) {
1851 pandecode_msg("XXX: unexpected unknown3 set\n");
1852 pandecode_prop("unknown3 = 0x%" PRIx64, (u64) attr_meta->unknown3);
1853 }
1854
1855 pandecode_format_short(attr_meta->format, false);
1856 pandecode_log_cont(" %s_%u", prefix, attr_meta->index);
1857
1858 if (attr_meta->src_offset)
1859 pandecode_log_cont("[%u]", attr_meta->src_offset);
1860
1861 pandecode_swizzle(attr_meta->swizzle, attr_meta->format);
1862
1863 pandecode_log_cont(";\n");
1864 }
1865
1866 pandecode_log("\n");
1867
1868 return count ? (max_index + 1) : 0;
1869 }
1870
1871 /* return bits [lo, hi) of word */
1872 static u32
1873 bits(u32 word, u32 lo, u32 hi)
1874 {
1875 if (hi - lo >= 32)
1876 return word; // avoid undefined behavior with the shift
1877
1878 return (word >> lo) & ((1 << (hi - lo)) - 1);
1879 }
1880
1881 static void
1882 pandecode_vertex_tiler_prefix(struct mali_vertex_tiler_prefix *p, int job_no, bool graphics)
1883 {
1884 pandecode_log(".prefix = {\n");
1885 pandecode_indent++;
1886
1887 /* Decode invocation_count. See the comment before the definition of
1888 * invocation_count for an explanation.
1889 */
1890
1891 unsigned size_y_shift = bits(p->invocation_shifts, 0, 5);
1892 unsigned size_z_shift = bits(p->invocation_shifts, 5, 10);
1893 unsigned workgroups_x_shift = bits(p->invocation_shifts, 10, 16);
1894 unsigned workgroups_y_shift = bits(p->invocation_shifts, 16, 22);
1895 unsigned workgroups_z_shift = bits(p->invocation_shifts, 22, 28);
1896 unsigned workgroups_x_shift_2 = bits(p->invocation_shifts, 28, 32);
1897
1898 unsigned size_x = bits(p->invocation_count, 0, size_y_shift) + 1;
1899 unsigned size_y = bits(p->invocation_count, size_y_shift, size_z_shift) + 1;
1900 unsigned size_z = bits(p->invocation_count, size_z_shift, workgroups_x_shift) + 1;
1901
1902 unsigned groups_x = bits(p->invocation_count, workgroups_x_shift, workgroups_y_shift) + 1;
1903 unsigned groups_y = bits(p->invocation_count, workgroups_y_shift, workgroups_z_shift) + 1;
1904 unsigned groups_z = bits(p->invocation_count, workgroups_z_shift, 32) + 1;
1905
1906 /* Even though we have this decoded, we want to ensure that the
1907 * representation is "unique" so we don't lose anything by printing only
1908 * the final result. More specifically, we need to check that we were
1909 * passed something in canonical form, since the definition per the
1910 * hardware is inherently not unique. How? Well, take the resulting
1911 * decode and pack it ourselves! If it is bit exact with what we
1912 * decoded, we're good to go. */
1913
1914 struct mali_vertex_tiler_prefix ref;
1915 panfrost_pack_work_groups_compute(&ref, groups_x, groups_y, groups_z, size_x, size_y, size_z, graphics);
1916
1917 bool canonical =
1918 (p->invocation_count == ref.invocation_count) &&
1919 (p->invocation_shifts == ref.invocation_shifts);
1920
1921 if (!canonical) {
1922 pandecode_msg("XXX: non-canonical workgroups packing\n");
1923 pandecode_msg("expected: %X, %X",
1924 ref.invocation_count,
1925 ref.invocation_shifts);
1926
1927 pandecode_prop("invocation_count = 0x%" PRIx32, p->invocation_count);
1928 pandecode_prop("size_y_shift = %d", size_y_shift);
1929 pandecode_prop("size_z_shift = %d", size_z_shift);
1930 pandecode_prop("workgroups_x_shift = %d", workgroups_x_shift);
1931 pandecode_prop("workgroups_y_shift = %d", workgroups_y_shift);
1932 pandecode_prop("workgroups_z_shift = %d", workgroups_z_shift);
1933 pandecode_prop("workgroups_x_shift_2 = %d", workgroups_x_shift_2);
1934 }
1935
1936 /* Regardless, print the decode */
1937 pandecode_msg("size (%d, %d, %d), count (%d, %d, %d)\n",
1938 size_x, size_y, size_z,
1939 groups_x, groups_y, groups_z);
1940
1941 /* TODO: Decode */
1942 if (p->unknown_draw)
1943 pandecode_prop("unknown_draw = 0x%" PRIx32, p->unknown_draw);
1944
1945 pandecode_prop("workgroups_x_shift_3 = 0x%" PRIx32, p->workgroups_x_shift_3);
1946
1947 if (p->draw_mode != MALI_DRAW_MODE_NONE)
1948 pandecode_prop("draw_mode = %s", mali_draw_mode_as_str(p->draw_mode));
1949
1950 /* Index count only exists for tiler jobs anyway */
1951
1952 if (p->index_count)
1953 pandecode_prop("index_count = MALI_POSITIVE(%" PRId32 ")", p->index_count + 1);
1954
1955
1956 unsigned index_raw_size = (p->unknown_draw & MALI_DRAW_INDEXED_SIZE);
1957 index_raw_size >>= MALI_DRAW_INDEXED_SHIFT;
1958
1959 /* Validate an index buffer is present if we need one. TODO: verify
1960 * relationship between invocation_count and index_count */
1961
1962 if (p->indices) {
1963 unsigned count = p->index_count;
1964
1965 /* Grab the size */
1966 unsigned size = (index_raw_size == 0x3) ? 4 : index_raw_size;
1967
1968 /* Ensure we got a size, and if so, validate the index buffer
1969 * is large enough to hold a full set of indices of the given
1970 * size */
1971
1972 if (!index_raw_size)
1973 pandecode_msg("XXX: index size missing\n");
1974 else
1975 pandecode_validate_buffer(p->indices, count * size);
1976 } else if (index_raw_size)
1977 pandecode_msg("XXX: unexpected index size %u\n", index_raw_size);
1978
1979 if (p->offset_bias_correction)
1980 pandecode_prop("offset_bias_correction = %d", p->offset_bias_correction);
1981
1982 /* TODO: Figure out what this is. It's not zero */
1983 pandecode_prop("zero1 = 0x%" PRIx32, p->zero1);
1984
1985 pandecode_indent--;
1986 pandecode_log("},\n");
1987 }
1988
1989 static void
1990 pandecode_uniform_buffers(mali_ptr pubufs, int ubufs_count, int job_no)
1991 {
1992 struct pandecode_mapped_memory *umem = pandecode_find_mapped_gpu_mem_containing(pubufs);
1993 uint64_t *PANDECODE_PTR_VAR(ubufs, umem, pubufs);
1994
1995 for (int i = 0; i < ubufs_count; i++) {
1996 unsigned size = (ubufs[i] & ((1 << 10) - 1)) * 16;
1997 mali_ptr addr = (ubufs[i] >> 10) << 2;
1998
1999 pandecode_validate_buffer(addr, size);
2000
2001 char *ptr = pointer_as_memory_reference(addr);
2002 pandecode_log("ubuf_%d[%u] = %s;\n", i, size, ptr);
2003 free(ptr);
2004 }
2005
2006 pandecode_log("\n");
2007 }
2008
2009 static void
2010 pandecode_uniforms(mali_ptr uniforms, unsigned uniform_count)
2011 {
2012 pandecode_validate_buffer(uniforms, uniform_count * 16);
2013
2014 char *ptr = pointer_as_memory_reference(uniforms);
2015 pandecode_log("vec4 uniforms[%u] = %s;\n", uniform_count, ptr);
2016 free(ptr);
2017 }
2018
2019 static const char *
2020 shader_type_for_job(unsigned type)
2021 {
2022 switch (type) {
2023 case MALI_JOB_TYPE_VERTEX: return "VERTEX";
2024 case MALI_JOB_TYPE_TILER: return "FRAGMENT";
2025 case MALI_JOB_TYPE_COMPUTE: return "COMPUTE";
2026 default:
2027 return "UNKNOWN";
2028 }
2029 }
2030
2031 static unsigned shader_id = 0;
2032
2033 static struct midgard_disasm_stats
2034 pandecode_shader_disassemble(mali_ptr shader_ptr, int shader_no, int type,
2035 bool is_bifrost, unsigned gpu_id)
2036 {
2037 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(shader_ptr);
2038 uint8_t *PANDECODE_PTR_VAR(code, mem, shader_ptr);
2039
2040 /* Compute maximum possible size */
2041 size_t sz = mem->length - (shader_ptr - mem->gpu_va);
2042
2043 /* Print some boilerplate to clearly denote the assembly (which doesn't
2044 * obey indentation rules), and actually do the disassembly! */
2045
2046 pandecode_log_cont("\n\n");
2047
2048 struct midgard_disasm_stats stats;
2049
2050 if (is_bifrost) {
2051 disassemble_bifrost(pandecode_dump_stream, code, sz, true);
2052
2053 /* TODO: Extend stats to Bifrost */
2054 stats.texture_count = -128;
2055 stats.sampler_count = -128;
2056 stats.attribute_count = -128;
2057 stats.varying_count = -128;
2058 stats.uniform_count = -128;
2059 stats.uniform_buffer_count = -128;
2060 stats.work_count = -128;
2061
2062 stats.instruction_count = 0;
2063 stats.bundle_count = 0;
2064 stats.quadword_count = 0;
2065 stats.helper_invocations = false;
2066 } else {
2067 stats = disassemble_midgard(pandecode_dump_stream,
2068 code, sz, gpu_id,
2069 type == MALI_JOB_TYPE_TILER ?
2070 MESA_SHADER_FRAGMENT : MESA_SHADER_VERTEX);
2071 }
2072
2073 /* Print shader-db stats. Skip COMPUTE jobs since they are used for
2074 * driver-internal purposes with the blob and interfere */
2075
2076 bool should_shaderdb = type != MALI_JOB_TYPE_COMPUTE;
2077
2078 if (should_shaderdb) {
2079 unsigned nr_threads =
2080 (stats.work_count <= 4) ? 4 :
2081 (stats.work_count <= 8) ? 2 :
2082 1;
2083
2084 pandecode_log_cont("shader%d - MESA_SHADER_%s shader: "
2085 "%u inst, %u bundles, %u quadwords, "
2086 "%u registers, %u threads, 0 loops, 0:0 spills:fills\n\n\n",
2087 shader_id++,
2088 shader_type_for_job(type),
2089 stats.instruction_count, stats.bundle_count, stats.quadword_count,
2090 stats.work_count, nr_threads);
2091 }
2092
2093
2094 return stats;
2095 }
2096
2097 static void
2098 pandecode_texture_payload(mali_ptr payload,
2099 enum mali_texture_type type,
2100 enum mali_texture_layout layout,
2101 bool manual_stride,
2102 uint8_t levels,
2103 uint16_t depth,
2104 uint16_t array_size,
2105 struct pandecode_mapped_memory *tmem)
2106 {
2107 pandecode_log(".payload = {\n");
2108 pandecode_indent++;
2109
2110 /* A bunch of bitmap pointers follow.
2111 * We work out the correct number,
2112 * based on the mipmap/cubemap
2113 * properties, but dump extra
2114 * possibilities to futureproof */
2115
2116 int bitmap_count = levels + 1;
2117
2118 /* Miptree for each face */
2119 if (type == MALI_TEX_CUBE)
2120 bitmap_count *= 6;
2121
2122 /* Array of layers */
2123 bitmap_count *= (depth + 1);
2124
2125 /* Array of textures */
2126 bitmap_count *= (array_size + 1);
2127
2128 /* Stride for each element */
2129 if (manual_stride)
2130 bitmap_count *= 2;
2131
2132 mali_ptr *pointers_and_strides = pandecode_fetch_gpu_mem(tmem,
2133 payload, sizeof(mali_ptr) * bitmap_count);
2134 for (int i = 0; i < bitmap_count; ++i) {
2135 /* How we dump depends if this is a stride or a pointer */
2136
2137 if (manual_stride && (i & 1)) {
2138 /* signed 32-bit snuck in as a 64-bit pointer */
2139 uint64_t stride_set = pointers_and_strides[i];
2140 uint32_t clamped_stride = stride_set;
2141 int32_t stride = clamped_stride;
2142 assert(stride_set == clamped_stride);
2143 pandecode_log("(mali_ptr) %d /* stride */, \n", stride);
2144 } else {
2145 char *a = pointer_as_memory_reference(pointers_and_strides[i]);
2146 pandecode_log("%s, \n", a);
2147 free(a);
2148 }
2149 }
2150
2151 pandecode_indent--;
2152 pandecode_log("},\n");
2153 }
2154
2155 static void
2156 pandecode_texture(mali_ptr u,
2157 struct pandecode_mapped_memory *tmem,
2158 unsigned job_no, unsigned tex)
2159 {
2160 struct mali_texture_descriptor *PANDECODE_PTR_VAR(t, tmem, u);
2161
2162 pandecode_log("struct mali_texture_descriptor texture_descriptor_%"PRIx64"_%d_%d = {\n", u, job_no, tex);
2163 pandecode_indent++;
2164
2165 pandecode_prop("width = %" PRId32, t->width);
2166 pandecode_prop("height = %" PRId32, t->height);
2167 pandecode_prop("depth = %" PRId32, t->depth);
2168 pandecode_prop("array_size = %" PRId32, t->array_size);
2169
2170 pandecode_log("\n");
2171 pandecode_prop("f.swizzle = 0x%" PRIx32, t->format.swizzle);
2172 pandecode_prop("f.format = 0x%" PRIx32, t->format.format);
2173 pandecode_prop("f.srgb = 0x%" PRIx32, t->format.srgb);
2174 pandecode_prop("f.unknown1 = 0x%" PRIx32, t->format.unknown1);
2175 pandecode_prop("f.type = %" PRId32, t->format.type);
2176 pandecode_prop("f.layout = %" PRId32, t->format.layout);
2177 pandecode_prop("f.unknown2 = 0x%" PRIx32, t->format.unknown2);
2178 pandecode_prop("f.manual_stride = %" PRId32, t->format.manual_stride);
2179 pandecode_prop("f.zero = 0x%" PRIx32, t->format.zero);
2180 pandecode_log("\n");
2181
2182 pandecode_prop("unknown3 = 0x%" PRIx32, t->unknown3);
2183 pandecode_prop("unknown3A = 0x%" PRIx32, t->unknown3A);
2184 pandecode_prop("levels = %" PRId32, t->levels);
2185 pandecode_prop("swizzle = 0x%" PRIx32, t->swizzle);
2186 pandecode_prop("swizzle_zero = 0x%" PRIx32, t->swizzle_zero);
2187
2188 pandecode_prop("unknown5 = 0x%" PRIx32, t->unknown5);
2189 pandecode_prop("unknown6 = 0x%" PRIx32, t->unknown6);
2190 pandecode_prop("unknown7 = 0x%" PRIx32, t->unknown7);
2191 pandecode_log("\n");
2192
2193 struct mali_texture_format f = t->format;
2194
2195 /* See the definiton of enum mali_texture_type */
2196
2197 bool is_cube = f.type == MALI_TEX_CUBE;
2198 unsigned dimension = is_cube ? 2 : f.type;
2199
2200 pandecode_make_indent();
2201
2202 /* Print the layout. Default is linear; a modifier can denote AFBC or
2203 * u-interleaved/tiled modes */
2204
2205 if (f.layout == MALI_TEXTURE_AFBC)
2206 pandecode_log_cont("afbc");
2207 else if (f.layout == MALI_TEXTURE_TILED)
2208 pandecode_log_cont("tiled");
2209 else if (f.layout == MALI_TEXTURE_LINEAR)
2210 pandecode_log_cont("linear");
2211 else
2212 pandecode_msg("XXX: invalid texture layout 0x%X\n", f.layout);
2213
2214 pandecode_swizzle(t->swizzle, f.format);
2215 pandecode_log_cont(" ");
2216
2217 /* Distinguish cube/2D with modifier */
2218
2219 if (is_cube)
2220 pandecode_log_cont("cube ");
2221
2222 pandecode_format_short(f.format, f.srgb);
2223 pandecode_swizzle(f.swizzle, f.format);
2224
2225 /* All four width/height/depth/array_size dimensions are present
2226 * regardless of the type of texture, but it is an error to have
2227 * non-zero dimensions for unused dimensions. Verify this. array_size
2228 * can always be set, as can width. Depth used for MSAA. */
2229
2230 if (t->height && dimension < 2)
2231 pandecode_msg("XXX: nonzero height for <2D texture\n");
2232
2233 /* Print only the dimensions that are actually there */
2234
2235 pandecode_log_cont(": %d", t->width + 1);
2236
2237 if (t->height || t->depth)
2238 pandecode_log_cont("x%u", t->height + 1);
2239
2240 if (t->depth)
2241 pandecode_log_cont("x%u", t->depth + 1);
2242
2243 if (t->array_size)
2244 pandecode_log_cont("[%u]", t->array_size + 1);
2245
2246 if (t->levels)
2247 pandecode_log_cont(" mip %u", t->levels);
2248
2249 pandecode_log_cont("\n");
2250
2251 if (f.unknown1 | f.zero) {
2252 pandecode_msg("XXX: texture format zero tripped\n");
2253 pandecode_prop("unknown1 = %" PRId32, f.unknown1);
2254 pandecode_prop("zero = %" PRId32, f.zero);
2255 }
2256
2257 if (!f.unknown2) {
2258 pandecode_msg("XXX: expected unknown texture bit set\n");
2259 pandecode_prop("unknown2 = %" PRId32, f.unknown2);
2260 }
2261
2262 if (t->swizzle_zero) {
2263 pandecode_msg("XXX: swizzle zero tripped\n");
2264 pandecode_prop("swizzle_zero = %d", t->swizzle_zero);
2265 }
2266
2267 if (t->unknown3 | t->unknown3A | t->unknown5 | t->unknown6 | t->unknown7) {
2268 pandecode_msg("XXX: texture zero tripped\n");
2269 pandecode_prop("unknown3 = %" PRId16, t->unknown3);
2270 pandecode_prop("unknown3A = %" PRId8, t->unknown3A);
2271 pandecode_prop("unknown5 = 0x%" PRIx32, t->unknown5);
2272 pandecode_prop("unknown6 = 0x%" PRIx32, t->unknown6);
2273 pandecode_prop("unknown7 = 0x%" PRIx32, t->unknown7);
2274 }
2275
2276 pandecode_texture_payload(u + sizeof(*t), f.type, f.layout, f.manual_stride, t->levels, t->depth, t->array_size, tmem);
2277
2278 pandecode_indent--;
2279 pandecode_log("};\n");
2280 }
2281
2282 static void
2283 pandecode_bifrost_texture(
2284 const struct bifrost_texture_descriptor *t,
2285 unsigned job_no,
2286 unsigned tex)
2287 {
2288 pandecode_log("struct bifrost_texture_descriptor texture_descriptor_%d_%d = {\n", job_no, tex);
2289 pandecode_indent++;
2290
2291 pandecode_prop("format_unk = 0x%" PRIx32, t->format_unk);
2292 pandecode_prop("type = %" PRId32, t->type);
2293
2294 if (t->zero) {
2295 pandecode_msg("XXX: zero tripped\n");
2296 pandecode_prop("zero = 0x%" PRIx32, t->zero);
2297 }
2298
2299 pandecode_prop("format_swizzle = 0x%" PRIx32, t->format_swizzle);
2300 pandecode_prop("format = 0x%" PRIx32, t->format);
2301 pandecode_prop("srgb = 0x%" PRIx32, t->srgb);
2302 pandecode_prop("format_unk3 = 0x%" PRIx32, t->format_unk3);
2303 pandecode_prop("width = %" PRId32, t->width);
2304 pandecode_prop("height = %" PRId32, t->height);
2305 pandecode_prop("swizzle = 0x%" PRIx32, t->swizzle);
2306 pandecode_prop("levels = %" PRId32, t->levels);
2307 pandecode_prop("unk1 = 0x%" PRIx32, t->unk1);
2308 pandecode_prop("levels_unk = %" PRId32, t->levels_unk);
2309 pandecode_prop("level_2 = %" PRId32, t->level_2);
2310 pandecode_prop("payload = 0x%" PRIx64, t->payload);
2311 pandecode_prop("array_size = %" PRId32, t->array_size);
2312 pandecode_prop("unk4 = 0x%" PRIx32, t->unk4);
2313 pandecode_prop("depth = %" PRId32, t->depth);
2314 pandecode_prop("unk5 = 0x%" PRIx32, t->unk5);
2315 pandecode_log("\n");
2316
2317 /* See the definiton of enum mali_texture_type */
2318
2319 bool is_cube = t->type == MALI_TEX_CUBE;
2320 unsigned dimension = is_cube ? 2 : t->type;
2321
2322 /* Print the layout. Default is linear; a modifier can denote AFBC or
2323 * u-interleaved/tiled modes */
2324
2325 if (t->layout == MALI_TEXTURE_AFBC)
2326 pandecode_log_cont("afbc");
2327 else if (t->layout == MALI_TEXTURE_TILED)
2328 pandecode_log_cont("tiled");
2329 else if (t->layout == MALI_TEXTURE_LINEAR)
2330 pandecode_log_cont("linear");
2331 else
2332 pandecode_msg("XXX: invalid texture layout 0x%X\n", t->layout);
2333
2334 pandecode_swizzle(t->swizzle, t->format);
2335 pandecode_log_cont(" ");
2336
2337 /* Distinguish cube/2D with modifier */
2338
2339 if (is_cube)
2340 pandecode_log_cont("cube ");
2341
2342 pandecode_format_short(t->format, t->srgb);
2343
2344 /* All four width/height/depth/array_size dimensions are present
2345 * regardless of the type of texture, but it is an error to have
2346 * non-zero dimensions for unused dimensions. Verify this. array_size
2347 * can always be set, as can width. */
2348
2349 if (t->height && dimension < 2)
2350 pandecode_msg("XXX: nonzero height for <2D texture\n");
2351
2352 if (t->depth && dimension < 3)
2353 pandecode_msg("XXX: nonzero depth for <2D texture\n");
2354
2355 /* Print only the dimensions that are actually there */
2356
2357 pandecode_log_cont(": %d", t->width + 1);
2358
2359 if (dimension >= 2)
2360 pandecode_log_cont("x%u", t->height + 1);
2361
2362 if (dimension >= 3)
2363 pandecode_log_cont("x%u", t->depth + 1);
2364
2365 if (t->array_size)
2366 pandecode_log_cont("[%u]", t->array_size + 1);
2367
2368 if (t->levels)
2369 pandecode_log_cont(" mip %u", t->levels);
2370
2371 pandecode_log_cont("\n");
2372
2373 struct pandecode_mapped_memory *tmem = pandecode_find_mapped_gpu_mem_containing(t->payload);
2374 if (t->payload) {
2375 pandecode_texture_payload(t->payload, t->type, t->layout,
2376 true, t->levels, t->depth,
2377 t->array_size, tmem);
2378 }
2379
2380 pandecode_indent--;
2381 pandecode_log("};\n");
2382 }
2383
2384 /* For shader properties like texture_count, we have a claimed property in the shader_meta, and the actual Truth from static analysis (this may just be an upper limit). We validate accordingly */
2385
2386 static void
2387 pandecode_shader_prop(const char *name, unsigned claim, signed truth, bool fuzzy)
2388 {
2389 /* Nothing to do */
2390 if (claim == truth)
2391 return;
2392
2393 if (fuzzy && (truth < 0))
2394 pandecode_msg("XXX: fuzzy %s, claimed %d, expected %d\n", name, claim, truth);
2395
2396 if ((truth >= 0) && !fuzzy) {
2397 pandecode_msg("%s: expected %s = %d, claimed %u\n",
2398 (truth < claim) ? "warn" : "XXX",
2399 name, truth, claim);
2400 } else if ((claim > -truth) && !fuzzy) {
2401 pandecode_msg("XXX: expected %s <= %u, claimed %u\n",
2402 name, -truth, claim);
2403 } else if (fuzzy && (claim < truth))
2404 pandecode_msg("XXX: expected %s >= %u, claimed %u\n",
2405 name, truth, claim);
2406
2407 pandecode_log(".%s = %" PRId16, name, claim);
2408
2409 if (fuzzy)
2410 pandecode_log_cont(" /* %u used */", truth);
2411
2412 pandecode_log_cont(",\n");
2413 }
2414
2415 static void
2416 pandecode_blend_shader_disassemble(mali_ptr shader, int job_no, int job_type,
2417 bool is_bifrost, unsigned gpu_id)
2418 {
2419 struct midgard_disasm_stats stats =
2420 pandecode_shader_disassemble(shader, job_no, job_type, is_bifrost, gpu_id);
2421
2422 bool has_texture = (stats.texture_count > 0);
2423 bool has_sampler = (stats.sampler_count > 0);
2424 bool has_attribute = (stats.attribute_count > 0);
2425 bool has_varying = (stats.varying_count > 0);
2426 bool has_uniform = (stats.uniform_count > 0);
2427 bool has_ubo = (stats.uniform_buffer_count > 0);
2428
2429 if (has_texture || has_sampler)
2430 pandecode_msg("XXX: blend shader accessing textures\n");
2431
2432 if (has_attribute || has_varying)
2433 pandecode_msg("XXX: blend shader accessing interstage\n");
2434
2435 if (has_uniform || has_ubo)
2436 pandecode_msg("XXX: blend shader accessing uniforms\n");
2437 }
2438
2439 static void
2440 pandecode_textures(mali_ptr textures, unsigned texture_count, int job_no, bool is_bifrost)
2441 {
2442 struct pandecode_mapped_memory *mmem = pandecode_find_mapped_gpu_mem_containing(textures);
2443
2444 if (!mmem)
2445 return;
2446
2447 if (is_bifrost) {
2448 const struct bifrost_texture_descriptor *PANDECODE_PTR_VAR(t, mmem, textures);
2449
2450 pandecode_log("uint64_t textures_%"PRIx64"_%d[] = {\n", textures, job_no);
2451 pandecode_indent++;
2452
2453 for (unsigned tex = 0; tex < texture_count; ++tex)
2454 pandecode_bifrost_texture(&t[tex], job_no, tex);
2455
2456 pandecode_indent--;
2457 pandecode_log("};\n");
2458 } else {
2459 mali_ptr *PANDECODE_PTR_VAR(u, mmem, textures);
2460
2461 pandecode_log("uint64_t textures_%"PRIx64"_%d[] = {\n", textures, job_no);
2462 pandecode_indent++;
2463
2464 for (int tex = 0; tex < texture_count; ++tex) {
2465 mali_ptr *PANDECODE_PTR_VAR(u, mmem, textures + tex * sizeof(mali_ptr));
2466 char *a = pointer_as_memory_reference(*u);
2467 pandecode_log("%s,\n", a);
2468 free(a);
2469 }
2470
2471 pandecode_indent--;
2472 pandecode_log("};\n");
2473
2474 /* Now, finally, descend down into the texture descriptor */
2475 for (unsigned tex = 0; tex < texture_count; ++tex) {
2476 mali_ptr *PANDECODE_PTR_VAR(u, mmem, textures + tex * sizeof(mali_ptr));
2477 struct pandecode_mapped_memory *tmem = pandecode_find_mapped_gpu_mem_containing(*u);
2478 if (tmem)
2479 pandecode_texture(*u, tmem, job_no, tex);
2480 }
2481 }
2482 }
2483
2484 static void
2485 pandecode_samplers(mali_ptr samplers, unsigned sampler_count, int job_no, bool is_bifrost)
2486 {
2487 struct pandecode_mapped_memory *smem = pandecode_find_mapped_gpu_mem_containing(samplers);
2488
2489 if (!smem)
2490 return;
2491
2492 if (is_bifrost) {
2493 struct bifrost_sampler_descriptor *s;
2494
2495 for (int i = 0; i < sampler_count; ++i) {
2496 s = pandecode_fetch_gpu_mem(smem, samplers + sizeof(*s) * i, sizeof(*s));
2497
2498 pandecode_log("struct bifrost_sampler_descriptor sampler_descriptor_%"PRIx64"_%d_%d = {\n", samplers + sizeof(*s) * i, job_no, i);
2499 pandecode_indent++;
2500
2501 if (s->unk1 != 1) {
2502 pandecode_msg("XXX: unk1 tripped\n");
2503 pandecode_prop("unk1 = 0x%x", s->unk1);
2504 }
2505
2506 pandecode_prop("wrap_s = %s", pandecode_wrap_mode(s->wrap_s));
2507 pandecode_prop("wrap_t = %s", pandecode_wrap_mode(s->wrap_t));
2508 pandecode_prop("wrap_r = %s", pandecode_wrap_mode(s->wrap_r));
2509
2510 if (s->unk8 != 0x8) {
2511 pandecode_msg("XXX: unk8 tripped\n");
2512 pandecode_prop("unk8 = 0x%x", s->unk8);
2513 }
2514
2515 pandecode_prop("unk2 = 0x%x", s->unk2);
2516 pandecode_prop("unk3 = 0x%x", s->unk3);
2517 pandecode_prop("min_filter = %s", s->min_filter ? "nearest" : "linear");
2518 pandecode_prop("norm_coords = 0x%x", s->norm_coords & 0x1);
2519 pandecode_prop("zero1 = 0x%x", s->zero1 & 0x1);
2520 pandecode_prop("mip_filter = %s", s->mip_filter ? "linear" : "nearest");
2521 pandecode_prop("mag_filter = %s", s->mag_filter ? "linear" : "nearest");
2522
2523 pandecode_prop("min_lod = FIXED_16(%f)", DECODE_FIXED_16(s->min_lod));
2524 pandecode_prop("max_lod = FIXED_16(%f)", DECODE_FIXED_16(s->max_lod));
2525
2526 if (s->zero1 || s->zero2 || s->zero3 || s->zero4) {
2527 pandecode_msg("XXX: sampler zero tripped\n");
2528 pandecode_prop("zero = 0x%" PRIx8 ", 0x%" PRIx64 ", 0x%" PRIx64 ", 0x%" PRIx64 "\n", s->zero1, s->zero2, s->zero3, s->zero4);
2529 }
2530
2531 pandecode_indent--;
2532 pandecode_log("};\n");
2533 }
2534 } else {
2535 struct mali_sampler_descriptor *s;
2536
2537 for (int i = 0; i < sampler_count; ++i) {
2538 s = pandecode_fetch_gpu_mem(smem, samplers + sizeof(*s) * i, sizeof(*s));
2539
2540 pandecode_log("struct mali_sampler_descriptor sampler_descriptor_%"PRIx64"_%d_%d = {\n", samplers + sizeof(*s) * i, job_no, i);
2541 pandecode_indent++;
2542
2543 pandecode_log(".filter_mode = ");
2544 pandecode_log_decoded_flags(sampler_flag_info, s->filter_mode);
2545 pandecode_log_cont(",\n");
2546
2547 pandecode_prop("min_lod = FIXED_16(%f)", DECODE_FIXED_16(s->min_lod));
2548 pandecode_prop("max_lod = FIXED_16(%f)", DECODE_FIXED_16(s->max_lod));
2549
2550 if (s->lod_bias)
2551 pandecode_prop("lod_bias = FIXED_16(%f)", DECODE_FIXED_16(s->lod_bias));
2552
2553 pandecode_prop("wrap_s = %s", pandecode_wrap_mode(s->wrap_s));
2554 pandecode_prop("wrap_t = %s", pandecode_wrap_mode(s->wrap_t));
2555 pandecode_prop("wrap_r = %s", pandecode_wrap_mode(s->wrap_r));
2556
2557 pandecode_prop("compare_func = %s", mali_func_as_str(s->compare_func));
2558
2559 if (s->zero || s->zero2) {
2560 pandecode_msg("XXX: sampler zero tripped\n");
2561 pandecode_prop("zero = 0x%X, 0x%X\n", s->zero, s->zero2);
2562 }
2563
2564 pandecode_prop("seamless_cube_map = %d", s->seamless_cube_map);
2565
2566 pandecode_prop("border_color = { %f, %f, %f, %f }",
2567 s->border_color[0],
2568 s->border_color[1],
2569 s->border_color[2],
2570 s->border_color[3]);
2571
2572 pandecode_indent--;
2573 pandecode_log("};\n");
2574 }
2575 }
2576 }
2577
2578 static void
2579 pandecode_vertex_tiler_postfix_pre(
2580 const struct mali_vertex_tiler_postfix *p,
2581 int job_no, enum mali_job_type job_type,
2582 char *suffix, bool is_bifrost, unsigned gpu_id)
2583 {
2584 struct pandecode_mapped_memory *attr_mem;
2585
2586 /* On Bifrost, since the tiler heap (for tiler jobs) and the scratchpad
2587 * are the only things actually needed from the FBD, vertex/tiler jobs
2588 * no longer reference the FBD -- instead, this field points to some
2589 * info about the scratchpad.
2590 */
2591
2592 struct pandecode_fbd fbd_info = {
2593 /* Default for Bifrost */
2594 .rt_count = 1
2595 };
2596
2597 if (is_bifrost) {
2598 pandecode_log_cont("\t/* %X %/\n", p->shared_memory & 1);
2599 pandecode_compute_fbd(p->shared_memory & ~1, job_no);
2600 } else if (p->shared_memory & MALI_MFBD)
2601 fbd_info = pandecode_mfbd_bfr((u64) ((uintptr_t) p->shared_memory) & FBD_MASK, job_no, false, job_type == MALI_JOB_TYPE_COMPUTE, false);
2602 else if (job_type == MALI_JOB_TYPE_COMPUTE)
2603 pandecode_compute_fbd((u64) (uintptr_t) p->shared_memory, job_no);
2604 else
2605 fbd_info = pandecode_sfbd((u64) (uintptr_t) p->shared_memory, job_no, false, gpu_id);
2606
2607 int varying_count = 0, attribute_count = 0, uniform_count = 0, uniform_buffer_count = 0;
2608 int texture_count = 0, sampler_count = 0;
2609
2610 if (p->shader) {
2611 struct pandecode_mapped_memory *smem = pandecode_find_mapped_gpu_mem_containing(p->shader);
2612 struct mali_shader_meta *PANDECODE_PTR_VAR(s, smem, p->shader);
2613
2614 /* Disassemble ahead-of-time to get stats. Initialize with
2615 * stats for the missing-shader case so we get validation
2616 * there, too */
2617
2618 struct midgard_disasm_stats info = {
2619 .texture_count = 0,
2620 .sampler_count = 0,
2621 .attribute_count = 0,
2622 .varying_count = 0,
2623 .work_count = 1,
2624
2625 .uniform_count = -128,
2626 .uniform_buffer_count = 0
2627 };
2628
2629 if (s->shader & ~0xF)
2630 info = pandecode_shader_disassemble(s->shader & ~0xF, job_no, job_type, is_bifrost, gpu_id);
2631
2632 pandecode_log("struct mali_shader_meta shader_meta_%"PRIx64"_%d%s = {\n", p->shader, job_no, suffix);
2633 pandecode_indent++;
2634
2635 /* Save for dumps */
2636 attribute_count = s->attribute_count;
2637 varying_count = s->varying_count;
2638 texture_count = s->texture_count;
2639 sampler_count = s->sampler_count;
2640
2641 if (is_bifrost) {
2642 uniform_count = s->bifrost2.uniform_count;
2643 uniform_buffer_count = s->bifrost1.uniform_buffer_count;
2644 } else {
2645 uniform_count = s->midgard1.uniform_count;
2646 uniform_buffer_count = s->midgard1.uniform_buffer_count;
2647 }
2648
2649 pandecode_shader_address("shader", s->shader);
2650
2651 pandecode_shader_prop("texture_count", s->texture_count, info.texture_count, false);
2652 pandecode_shader_prop("sampler_count", s->sampler_count, info.sampler_count, false);
2653 pandecode_shader_prop("attribute_count", s->attribute_count, info.attribute_count, false);
2654 pandecode_shader_prop("varying_count", s->varying_count, info.varying_count, false);
2655 pandecode_shader_prop("uniform_buffer_count",
2656 uniform_buffer_count,
2657 info.uniform_buffer_count, true);
2658
2659 if (!is_bifrost) {
2660 pandecode_shader_prop("uniform_count",
2661 uniform_count,
2662 info.uniform_count, false);
2663
2664 pandecode_shader_prop("work_count",
2665 s->midgard1.work_count, info.work_count, false);
2666 }
2667
2668 if (is_bifrost) {
2669 pandecode_log("bifrost1.unk1 = ");
2670 pandecode_log_decoded_flags(shader_bifrost_info, s->bifrost1.unk1);
2671 pandecode_log_cont(",\n");
2672 } else {
2673 bool helpers = s->midgard1.flags_lo & MALI_HELPER_INVOCATIONS;
2674
2675 if (helpers != info.helper_invocations) {
2676 pandecode_msg("XXX: expected helpers %u but got %u\n",
2677 info.helper_invocations, helpers);
2678 }
2679
2680 pandecode_log(".midgard1.flags_lo = ");
2681 pandecode_log_decoded_flags(shader_midgard1_flag_lo_info,
2682 s->midgard1.flags_lo & ~MALI_HELPER_INVOCATIONS);
2683 pandecode_log_cont(",\n");
2684
2685 pandecode_log(".midgard1.flags_hi = ");
2686 pandecode_log_decoded_flags(shader_midgard1_flag_hi_info, s->midgard1.flags_hi);
2687 pandecode_log_cont(",\n");
2688 }
2689
2690 if (s->depth_units || s->depth_factor) {
2691 pandecode_prop("depth_factor = %f", s->depth_factor);
2692 pandecode_prop("depth_units = %f", s->depth_units);
2693 }
2694
2695 if (s->coverage_mask)
2696 pandecode_prop("coverage_mask = 0x%X", s->coverage_mask);
2697
2698 if (s->unknown2_2)
2699 pandecode_prop(".unknown2_2 = %X", s->unknown2_2);
2700
2701 if (s->unknown2_3 || s->unknown2_4) {
2702 pandecode_log(".unknown2_3 = ");
2703
2704 int unknown2_3 = s->unknown2_3;
2705 int unknown2_4 = s->unknown2_4;
2706
2707 /* We're not quite sure what these flags mean without the depth test, if anything */
2708
2709 if (unknown2_3 & (MALI_DEPTH_WRITEMASK | MALI_DEPTH_FUNC_MASK)) {
2710 const char *func = mali_func_as_str(MALI_GET_DEPTH_FUNC(unknown2_3));
2711 unknown2_3 &= ~MALI_DEPTH_FUNC_MASK;
2712
2713 pandecode_log_cont("MALI_DEPTH_FUNC(%s) | ", func);
2714 }
2715
2716 pandecode_log_decoded_flags(u3_flag_info, unknown2_3);
2717 pandecode_log_cont(",\n");
2718
2719 pandecode_log(".unknown2_4 = ");
2720 pandecode_log_decoded_flags(u4_flag_info, unknown2_4);
2721 pandecode_log_cont(",\n");
2722 }
2723
2724 if (s->stencil_mask_front || s->stencil_mask_back) {
2725 pandecode_prop("stencil_mask_front = 0x%02X", s->stencil_mask_front);
2726 pandecode_prop("stencil_mask_back = 0x%02X", s->stencil_mask_back);
2727 }
2728
2729 pandecode_stencil("front", &s->stencil_front);
2730 pandecode_stencil("back", &s->stencil_back);
2731
2732 if (is_bifrost) {
2733 pandecode_log(".bifrost2 = {\n");
2734 pandecode_indent++;
2735
2736 pandecode_prop("unk3 = 0x%" PRIx32, s->bifrost2.unk3);
2737 pandecode_prop("preload_regs = 0x%" PRIx32, s->bifrost2.preload_regs);
2738 pandecode_prop("uniform_count = %" PRId32, s->bifrost2.uniform_count);
2739 pandecode_prop("unk4 = 0x%" PRIx32, s->bifrost2.unk4);
2740
2741 pandecode_indent--;
2742 pandecode_log("},\n");
2743 } else if (s->midgard2.unknown2_7) {
2744 pandecode_log(".midgard2 = {\n");
2745 pandecode_indent++;
2746
2747 pandecode_prop("unknown2_7 = 0x%" PRIx32, s->midgard2.unknown2_7);
2748 pandecode_indent--;
2749 pandecode_log("},\n");
2750 }
2751
2752 if (s->padding) {
2753 pandecode_msg("XXX: shader padding tripped\n");
2754 pandecode_prop("padding = 0x%" PRIx32, s->padding);
2755 }
2756
2757 if (!is_bifrost) {
2758 /* TODO: Blend shaders routing/disasm */
2759 union midgard_blend blend = s->blend;
2760 mali_ptr shader = pandecode_midgard_blend(&blend, s->unknown2_3 & MALI_HAS_BLEND_SHADER);
2761 if (shader & ~0xF)
2762 pandecode_blend_shader_disassemble(shader, job_no, job_type, false, gpu_id);
2763 } else {
2764 pandecode_msg("mdg_blend = %" PRIx64 "\n", s->blend.shader);
2765 }
2766
2767 pandecode_indent--;
2768 pandecode_log("};\n");
2769
2770 /* MRT blend fields are used whenever MFBD is used, with
2771 * per-RT descriptors */
2772
2773 if (job_type == MALI_JOB_TYPE_TILER && (is_bifrost || p->shared_memory & MALI_MFBD)) {
2774 void* blend_base = (void *) (s + 1);
2775
2776 for (unsigned i = 0; i < fbd_info.rt_count; i++) {
2777 mali_ptr shader = 0;
2778
2779 if (is_bifrost)
2780 shader = pandecode_bifrost_blend(blend_base, job_no, i);
2781 else
2782 shader = pandecode_midgard_blend_mrt(blend_base, job_no, i);
2783
2784 if (shader & ~0xF)
2785 pandecode_blend_shader_disassemble(shader, job_no, job_type, false, gpu_id);
2786
2787 }
2788 }
2789 } else
2790 pandecode_msg("XXX: missing shader descriptor\n");
2791
2792 if (p->viewport) {
2793 struct pandecode_mapped_memory *fmem = pandecode_find_mapped_gpu_mem_containing(p->viewport);
2794 struct mali_viewport *PANDECODE_PTR_VAR(f, fmem, p->viewport);
2795
2796 pandecode_log("struct mali_viewport viewport_%"PRIx64"_%d%s = {\n", p->viewport, job_no, suffix);
2797 pandecode_indent++;
2798
2799 pandecode_prop("clip_minx = %f", f->clip_minx);
2800 pandecode_prop("clip_miny = %f", f->clip_miny);
2801 pandecode_prop("clip_minz = %f", f->clip_minz);
2802 pandecode_prop("clip_maxx = %f", f->clip_maxx);
2803 pandecode_prop("clip_maxy = %f", f->clip_maxy);
2804 pandecode_prop("clip_maxz = %f", f->clip_maxz);
2805
2806 /* Only the higher coordinates are MALI_POSITIVE scaled */
2807
2808 pandecode_prop("viewport0 = { %d, %d }",
2809 f->viewport0[0], f->viewport0[1]);
2810
2811 pandecode_prop("viewport1 = { MALI_POSITIVE(%d), MALI_POSITIVE(%d) }",
2812 f->viewport1[0] + 1, f->viewport1[1] + 1);
2813
2814 pandecode_indent--;
2815 pandecode_log("};\n");
2816 }
2817
2818 unsigned max_attr_index = 0;
2819
2820 if (p->attribute_meta)
2821 max_attr_index = pandecode_attribute_meta(job_no, attribute_count, p, false, suffix);
2822
2823 if (p->attributes) {
2824 attr_mem = pandecode_find_mapped_gpu_mem_containing(p->attributes);
2825 pandecode_attributes(attr_mem, p->attributes, job_no, suffix, max_attr_index, false, job_type);
2826 }
2827
2828 /* Varyings are encoded like attributes but not actually sent; we just
2829 * pass a zero buffer with the right stride/size set, (or whatever)
2830 * since the GPU will write to it itself */
2831
2832 if (p->varying_meta) {
2833 varying_count = pandecode_attribute_meta(job_no, varying_count, p, true, suffix);
2834 }
2835
2836 if (p->varyings) {
2837 attr_mem = pandecode_find_mapped_gpu_mem_containing(p->varyings);
2838
2839 /* Number of descriptors depends on whether there are
2840 * non-internal varyings */
2841
2842 pandecode_attributes(attr_mem, p->varyings, job_no, suffix, varying_count, true, job_type);
2843 }
2844
2845 if (p->uniform_buffers) {
2846 if (uniform_buffer_count)
2847 pandecode_uniform_buffers(p->uniform_buffers, uniform_buffer_count, job_no);
2848 else
2849 pandecode_msg("warn: UBOs specified but not referenced\n");
2850 } else if (uniform_buffer_count)
2851 pandecode_msg("XXX: UBOs referenced but not specified\n");
2852
2853 /* We don't want to actually dump uniforms, but we do need to validate
2854 * that the counts we were given are sane */
2855
2856 if (p->uniforms) {
2857 if (uniform_count)
2858 pandecode_uniforms(p->uniforms, uniform_count);
2859 else
2860 pandecode_msg("warn: Uniforms specified but not referenced\n");
2861 } else if (uniform_count)
2862 pandecode_msg("XXX: Uniforms referenced but not specified\n");
2863
2864 if (p->textures)
2865 pandecode_textures(p->textures, texture_count, job_no, is_bifrost);
2866
2867 if (p->sampler_descriptor)
2868 pandecode_samplers(p->sampler_descriptor, sampler_count, job_no, is_bifrost);
2869 }
2870
2871 static void
2872 pandecode_gl_enables(uint32_t gl_enables, int job_type)
2873 {
2874 pandecode_log(".gl_enables = ");
2875
2876 pandecode_log_decoded_flags(gl_enable_flag_info, gl_enables);
2877
2878 pandecode_log_cont(",\n");
2879 }
2880
2881 static void
2882 pandecode_vertex_tiler_postfix(const struct mali_vertex_tiler_postfix *p, int job_no, bool is_bifrost)
2883 {
2884 if (p->shader & 0xF)
2885 pandecode_msg("warn: shader tagged %X\n", (unsigned) (p->shader & 0xF));
2886
2887 pandecode_log(".postfix = {\n");
2888 pandecode_indent++;
2889
2890 pandecode_gl_enables(p->gl_enables, MALI_JOB_TYPE_TILER);
2891 pandecode_prop("instance_shift = 0x%x", p->instance_shift);
2892 pandecode_prop("instance_odd = 0x%x", p->instance_odd);
2893
2894 if (p->zero4) {
2895 pandecode_msg("XXX: vertex only zero tripped");
2896 pandecode_prop("zero4 = 0x%" PRIx32, p->zero4);
2897 }
2898
2899 pandecode_prop("offset_start = 0x%x", p->offset_start);
2900
2901 if (p->zero5) {
2902 pandecode_msg("XXX: vertex only zero tripped");
2903 pandecode_prop("zero5 = 0x%" PRIx64, p->zero5);
2904 }
2905
2906 MEMORY_PROP(p, position_varying);
2907 MEMORY_PROP(p, occlusion_counter);
2908
2909 pandecode_indent--;
2910 pandecode_log("},\n");
2911 }
2912
2913 static void
2914 pandecode_tiler_heap_meta(mali_ptr gpu_va, int job_no)
2915 {
2916 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
2917 const struct bifrost_tiler_heap_meta *PANDECODE_PTR_VAR(h, mem, gpu_va);
2918
2919 pandecode_log("struct bifrost_tiler_heap_meta tiler_heap_meta_%"PRIx64"_%d = {\n", gpu_va, job_no);
2920 pandecode_indent++;
2921
2922 if (h->zero) {
2923 pandecode_msg("XXX: tiler heap zero tripped\n");
2924 pandecode_prop("zero = 0x%x", h->zero);
2925 }
2926
2927 pandecode_prop("heap_size = 0x%x", h->heap_size);
2928 MEMORY_PROP(h, tiler_heap_start);
2929 MEMORY_PROP(h, tiler_heap_free);
2930
2931 /* this might point to the beginning of another buffer, when it's
2932 * really the end of the tiler heap buffer, so we have to be careful
2933 * here. but for zero length, we need the same pointer.
2934 */
2935
2936 if (h->tiler_heap_end == h->tiler_heap_start) {
2937 MEMORY_PROP(h, tiler_heap_start);
2938 } else {
2939 char *a = pointer_as_memory_reference(h->tiler_heap_end - 1);
2940 pandecode_prop("tiler_heap_end = %s + 1", a);
2941 free(a);
2942 }
2943
2944 for (int i = 0; i < 10; i++) {
2945 if (h->zeros[i] != 0) {
2946 pandecode_msg("XXX: tiler heap zero %d tripped, value %x\n",
2947 i, h->zeros[i]);
2948 }
2949 }
2950
2951 if (h->unk1 != 0x1) {
2952 pandecode_msg("XXX: tiler heap unk1 tripped\n");
2953 pandecode_prop("unk1 = 0x%x", h->unk1);
2954 }
2955
2956 if (h->unk7e007e != 0x7e007e) {
2957 pandecode_msg("XXX: tiler heap unk7e007e tripped\n");
2958 pandecode_prop("unk7e007e = 0x%x", h->unk7e007e);
2959 }
2960
2961 pandecode_indent--;
2962 pandecode_log("};\n");
2963 }
2964
2965 static void
2966 pandecode_tiler_meta(mali_ptr gpu_va, int job_no)
2967 {
2968 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
2969 const struct bifrost_tiler_meta *PANDECODE_PTR_VAR(t, mem, gpu_va);
2970
2971 pandecode_tiler_heap_meta(t->tiler_heap_meta, job_no);
2972
2973 pandecode_log("struct bifrost_tiler_meta tiler_meta_%"PRIx64"_%d = {\n", gpu_va, job_no);
2974 pandecode_indent++;
2975
2976 pandecode_prop("tiler_heap_next_start = 0x%" PRIx32, t->tiler_heap_next_start);
2977 pandecode_prop("used_hierarchy_mask = 0x%" PRIx32, t->used_hierarchy_mask);
2978
2979 if (t->hierarchy_mask != 0xa &&
2980 t->hierarchy_mask != 0x14 &&
2981 t->hierarchy_mask != 0x28 &&
2982 t->hierarchy_mask != 0x50 &&
2983 t->hierarchy_mask != 0xa0)
2984 pandecode_prop("XXX: Unexpected hierarchy_mask (not 0xa, 0x14, 0x28, 0x50 or 0xa0)!");
2985
2986 pandecode_prop("hierarchy_mask = 0x%" PRIx16, t->hierarchy_mask);
2987
2988 pandecode_prop("flags = 0x%" PRIx16, t->flags);
2989
2990 pandecode_prop("width = MALI_POSITIVE(%d)", t->width + 1);
2991 pandecode_prop("height = MALI_POSITIVE(%d)", t->height + 1);
2992
2993 if (t->zero0) {
2994 pandecode_msg("XXX: tiler meta zero tripped\n");
2995 pandecode_prop("zero0 = 0x%" PRIx64, t->zero0);
2996 }
2997
2998 for (int i = 0; i < 12; i++) {
2999 if (t->zeros[i] != 0) {
3000 pandecode_msg("XXX: tiler heap zero %d tripped, value %" PRIx64 "\n",
3001 i, t->zeros[i]);
3002 }
3003 }
3004
3005 pandecode_indent--;
3006 pandecode_log("};\n");
3007 }
3008
3009 static void
3010 pandecode_primitive_size(union midgard_primitive_size u, bool constant)
3011 {
3012 if (u.pointer == 0x0)
3013 return;
3014
3015 pandecode_log(".primitive_size = {\n");
3016 pandecode_indent++;
3017
3018 if (constant) {
3019 pandecode_prop("constant = %f", u.constant);
3020 } else {
3021 MEMORY_PROP((&u), pointer);
3022 }
3023
3024 pandecode_indent--;
3025 pandecode_log("},\n");
3026 }
3027
3028 static void
3029 pandecode_tiler_only_bfr(const struct bifrost_tiler_only *t, int job_no)
3030 {
3031 pandecode_log_cont("{\n");
3032 pandecode_indent++;
3033
3034 /* TODO: gl_PointSize on Bifrost */
3035 pandecode_primitive_size(t->primitive_size, true);
3036
3037 if (t->zero1 || t->zero2 || t->zero3 || t->zero4 || t->zero5
3038 || t->zero6) {
3039 pandecode_msg("XXX: tiler only zero tripped\n");
3040 pandecode_prop("zero1 = 0x%" PRIx64, t->zero1);
3041 pandecode_prop("zero2 = 0x%" PRIx64, t->zero2);
3042 pandecode_prop("zero3 = 0x%" PRIx64, t->zero3);
3043 pandecode_prop("zero4 = 0x%" PRIx64, t->zero4);
3044 pandecode_prop("zero5 = 0x%" PRIx64, t->zero5);
3045 pandecode_prop("zero6 = 0x%" PRIx64, t->zero6);
3046 }
3047
3048 pandecode_indent--;
3049 pandecode_log("},\n");
3050 }
3051
3052 static int
3053 pandecode_vertex_job_bfr(const struct mali_job_descriptor_header *h,
3054 const struct pandecode_mapped_memory *mem,
3055 mali_ptr payload, int job_no, unsigned gpu_id)
3056 {
3057 struct bifrost_payload_vertex *PANDECODE_PTR_VAR(v, mem, payload);
3058
3059 pandecode_vertex_tiler_postfix_pre(&v->postfix, job_no, h->job_type, "", true, gpu_id);
3060
3061 pandecode_log("struct bifrost_payload_vertex payload_%"PRIx64"_%d = {\n", payload, job_no);
3062 pandecode_indent++;
3063
3064 pandecode_vertex_tiler_prefix(&v->prefix, job_no, false);
3065 pandecode_vertex_tiler_postfix(&v->postfix, job_no, true);
3066
3067 pandecode_indent--;
3068 pandecode_log("};\n");
3069
3070 return sizeof(*v);
3071 }
3072
3073 static int
3074 pandecode_tiler_job_bfr(const struct mali_job_descriptor_header *h,
3075 const struct pandecode_mapped_memory *mem,
3076 mali_ptr payload, int job_no, unsigned gpu_id)
3077 {
3078 struct bifrost_payload_tiler *PANDECODE_PTR_VAR(t, mem, payload);
3079
3080 pandecode_vertex_tiler_postfix_pre(&t->postfix, job_no, h->job_type, "", true, gpu_id);
3081 pandecode_tiler_meta(t->tiler.tiler_meta, job_no);
3082
3083 pandecode_log("struct bifrost_payload_tiler payload_%"PRIx64"_%d = {\n", payload, job_no);
3084 pandecode_indent++;
3085
3086 pandecode_vertex_tiler_prefix(&t->prefix, job_no, false);
3087
3088 pandecode_log(".tiler = ");
3089 pandecode_tiler_only_bfr(&t->tiler, job_no);
3090
3091 pandecode_vertex_tiler_postfix(&t->postfix, job_no, true);
3092
3093 pandecode_indent--;
3094 pandecode_log("};\n");
3095
3096 return sizeof(*t);
3097 }
3098
3099 static int
3100 pandecode_vertex_or_tiler_job_mdg(const struct mali_job_descriptor_header *h,
3101 const struct pandecode_mapped_memory *mem,
3102 mali_ptr payload, int job_no, unsigned gpu_id)
3103 {
3104 struct midgard_payload_vertex_tiler *PANDECODE_PTR_VAR(v, mem, payload);
3105 bool is_graphics = (h->job_type == MALI_JOB_TYPE_VERTEX) || (h->job_type == MALI_JOB_TYPE_TILER);
3106
3107 pandecode_vertex_tiler_postfix_pre(&v->postfix, job_no, h->job_type, "", false, gpu_id);
3108
3109 pandecode_log("struct midgard_payload_vertex_tiler payload_%d = {\n", job_no);
3110 pandecode_indent++;
3111
3112 pandecode_vertex_tiler_prefix(&v->prefix, job_no, is_graphics);
3113 pandecode_vertex_tiler_postfix(&v->postfix, job_no, false);
3114
3115 bool has_primitive_pointer = v->prefix.unknown_draw & MALI_DRAW_VARYING_SIZE;
3116 pandecode_primitive_size(v->primitive_size, !has_primitive_pointer);
3117
3118 pandecode_indent--;
3119 pandecode_log("};\n");
3120
3121 return sizeof(*v);
3122 }
3123
3124 static int
3125 pandecode_fragment_job(const struct pandecode_mapped_memory *mem,
3126 mali_ptr payload, int job_no,
3127 bool is_bifrost, unsigned gpu_id)
3128 {
3129 const struct mali_payload_fragment *PANDECODE_PTR_VAR(s, mem, payload);
3130
3131 bool is_mfbd = s->framebuffer & MALI_MFBD;
3132
3133 if (!is_mfbd && is_bifrost)
3134 pandecode_msg("XXX: Bifrost fragment must use MFBD\n");
3135
3136 struct pandecode_fbd info;
3137
3138 if (is_mfbd)
3139 info = pandecode_mfbd_bfr(s->framebuffer & FBD_MASK, job_no, true, false, is_bifrost);
3140 else
3141 info = pandecode_sfbd(s->framebuffer & FBD_MASK, job_no, true, gpu_id);
3142
3143 /* Compute the tag for the tagged pointer. This contains the type of
3144 * FBD (MFBD/SFBD), and in the case of an MFBD, information about which
3145 * additional structures follow the MFBD header (an extra payload or
3146 * not, as well as a count of render targets) */
3147
3148 unsigned expected_tag = is_mfbd ? MALI_MFBD : 0;
3149
3150 if (is_mfbd) {
3151 if (info.has_extra)
3152 expected_tag |= MALI_MFBD_TAG_EXTRA;
3153
3154 expected_tag |= (MALI_POSITIVE(info.rt_count) << 2);
3155 }
3156
3157 if ((s->min_tile_coord | s->max_tile_coord) & ~(MALI_X_COORD_MASK | MALI_Y_COORD_MASK)) {
3158 pandecode_msg("XXX: unexpected tile coordinate bits\n");
3159 pandecode_prop("min_tile_coord = 0x%X\n", s->min_tile_coord);
3160 pandecode_prop("max_tile_coord = 0x%X\n", s->max_tile_coord);
3161 }
3162
3163 /* Extract tile coordinates */
3164
3165 unsigned min_x = MALI_TILE_COORD_X(s->min_tile_coord) << MALI_TILE_SHIFT;
3166 unsigned min_y = MALI_TILE_COORD_Y(s->min_tile_coord) << MALI_TILE_SHIFT;
3167
3168 unsigned max_x = (MALI_TILE_COORD_X(s->max_tile_coord) + 1) << MALI_TILE_SHIFT;
3169 unsigned max_y = (MALI_TILE_COORD_Y(s->max_tile_coord) + 1) << MALI_TILE_SHIFT;
3170
3171 /* For the max, we also want the floored (rather than ceiled) version for checking */
3172
3173 unsigned max_x_f = (MALI_TILE_COORD_X(s->max_tile_coord)) << MALI_TILE_SHIFT;
3174 unsigned max_y_f = (MALI_TILE_COORD_Y(s->max_tile_coord)) << MALI_TILE_SHIFT;
3175
3176 /* Validate the coordinates are well-ordered */
3177
3178 if (min_x == max_x)
3179 pandecode_msg("XXX: empty X coordinates (%u = %u)\n", min_x, max_x);
3180 else if (min_x > max_x)
3181 pandecode_msg("XXX: misordered X coordinates (%u > %u)\n", min_x, max_x);
3182
3183 if (min_y == max_y)
3184 pandecode_msg("XXX: empty X coordinates (%u = %u)\n", min_x, max_x);
3185 else if (min_y > max_y)
3186 pandecode_msg("XXX: misordered X coordinates (%u > %u)\n", min_x, max_x);
3187
3188 /* Validate the coordinates fit inside the framebuffer. We use floor,
3189 * rather than ceil, for the max coordinates, since the tile
3190 * coordinates for something like an 800x600 framebuffer will actually
3191 * resolve to 800x608, which would otherwise trigger a Y-overflow */
3192
3193 if ((min_x > info.width) || (max_x_f > info.width))
3194 pandecode_msg("XXX: tile coordinates overflow in X direction\n");
3195
3196 if ((min_y > info.height) || (max_y_f > info.height))
3197 pandecode_msg("XXX: tile coordinates overflow in Y direction\n");
3198
3199 /* After validation, we print */
3200
3201 pandecode_log("fragment (%u, %u) ... (%u, %u)\n\n", min_x, min_y, max_x, max_y);
3202
3203 /* The FBD is a tagged pointer */
3204
3205 unsigned tag = (s->framebuffer & ~FBD_MASK);
3206
3207 if (tag != expected_tag)
3208 pandecode_msg("XXX: expected FBD tag %X but got %X\n", expected_tag, tag);
3209
3210 return sizeof(*s);
3211 }
3212
3213 /* Entrypoint to start tracing. jc_gpu_va is the GPU address for the first job
3214 * in the chain; later jobs are found by walking the chain. Bifrost is, well,
3215 * if it's bifrost or not. GPU ID is the more finegrained ID (at some point, we
3216 * might wish to combine this with the bifrost parameter) because some details
3217 * are model-specific even within a particular architecture. Minimal traces
3218 * *only* examine the job descriptors, skipping printing entirely if there is
3219 * no faults, and only descends into the payload if there are faults. This is
3220 * useful for looking for faults without the overhead of invasive traces. */
3221
3222 void
3223 pandecode_jc(mali_ptr jc_gpu_va, bool bifrost, unsigned gpu_id, bool minimal)
3224 {
3225 pandecode_dump_file_open();
3226
3227 struct mali_job_descriptor_header *h;
3228 unsigned job_descriptor_number = 0;
3229
3230 do {
3231 struct pandecode_mapped_memory *mem =
3232 pandecode_find_mapped_gpu_mem_containing(jc_gpu_va);
3233
3234 void *payload;
3235
3236 h = PANDECODE_PTR(mem, jc_gpu_va, struct mali_job_descriptor_header);
3237
3238 /* On Midgard, for 32-bit jobs except for fragment jobs, the
3239 * high 32-bits of the 64-bit pointer are reused to store
3240 * something else.
3241 */
3242 int offset = h->job_descriptor_size == MALI_JOB_32 &&
3243 h->job_type != MALI_JOB_TYPE_FRAGMENT ? 4 : 0;
3244 mali_ptr payload_ptr = jc_gpu_va + sizeof(*h) - offset;
3245
3246 payload = pandecode_fetch_gpu_mem(mem, payload_ptr, 256);
3247
3248 int job_no = job_descriptor_number++;
3249
3250 /* If the job is good to go, skip it in minimal mode */
3251 if (minimal && (h->exception_status == 0x0 || h->exception_status == 0x1))
3252 continue;
3253
3254 pandecode_log("struct mali_job_descriptor_header job_%"PRIx64"_%d = {\n", jc_gpu_va, job_no);
3255 pandecode_indent++;
3256
3257 pandecode_prop("job_type = %s", mali_job_type_as_str(h->job_type));
3258
3259 if (h->job_descriptor_size)
3260 pandecode_prop("job_descriptor_size = %d", h->job_descriptor_size);
3261
3262 if (h->exception_status && h->exception_status != 0x1)
3263 pandecode_prop("exception_status = %x (source ID: 0x%x access: %s exception: 0x%x)",
3264 h->exception_status,
3265 (h->exception_status >> 16) & 0xFFFF,
3266 pandecode_exception_access((h->exception_status >> 8) & 0x3),
3267 h->exception_status & 0xFF);
3268
3269 if (h->first_incomplete_task)
3270 pandecode_prop("first_incomplete_task = %d", h->first_incomplete_task);
3271
3272 if (h->fault_pointer)
3273 pandecode_prop("fault_pointer = 0x%" PRIx64, h->fault_pointer);
3274
3275 if (h->job_barrier)
3276 pandecode_prop("job_barrier = %d", h->job_barrier);
3277
3278 pandecode_prop("job_index = %d", h->job_index);
3279
3280 if (h->unknown_flags)
3281 pandecode_prop("unknown_flags = %d", h->unknown_flags);
3282
3283 if (h->job_dependency_index_1)
3284 pandecode_prop("job_dependency_index_1 = %d", h->job_dependency_index_1);
3285
3286 if (h->job_dependency_index_2)
3287 pandecode_prop("job_dependency_index_2 = %d", h->job_dependency_index_2);
3288
3289 pandecode_indent--;
3290 pandecode_log("};\n");
3291
3292 switch (h->job_type) {
3293 case MALI_JOB_TYPE_WRITE_VALUE: {
3294 struct mali_payload_write_value *s = payload;
3295 pandecode_log("struct mali_payload_write_value payload_%"PRIx64"_%d = {\n", payload_ptr, job_no);
3296 pandecode_indent++;
3297 MEMORY_PROP(s, address);
3298
3299 if (s->value_descriptor != MALI_WRITE_VALUE_ZERO) {
3300 pandecode_msg("XXX: unknown value descriptor\n");
3301 pandecode_prop("value_descriptor = 0x%" PRIX32, s->value_descriptor);
3302 }
3303
3304 if (s->reserved) {
3305 pandecode_msg("XXX: set value tripped\n");
3306 pandecode_prop("reserved = 0x%" PRIX32, s->reserved);
3307 }
3308
3309 pandecode_prop("immediate = 0x%" PRIX64, s->immediate);
3310 pandecode_indent--;
3311 pandecode_log("};\n");
3312
3313 break;
3314 }
3315
3316 case MALI_JOB_TYPE_TILER:
3317 case MALI_JOB_TYPE_VERTEX:
3318 case MALI_JOB_TYPE_COMPUTE:
3319 if (bifrost) {
3320 if (h->job_type == MALI_JOB_TYPE_TILER)
3321 pandecode_tiler_job_bfr(h, mem, payload_ptr, job_no, gpu_id);
3322 else
3323 pandecode_vertex_job_bfr(h, mem, payload_ptr, job_no, gpu_id);
3324 } else
3325 pandecode_vertex_or_tiler_job_mdg(h, mem, payload_ptr, job_no, gpu_id);
3326
3327 break;
3328
3329 case MALI_JOB_TYPE_FRAGMENT:
3330 pandecode_fragment_job(mem, payload_ptr, job_no, bifrost, gpu_id);
3331 break;
3332
3333 default:
3334 break;
3335 }
3336 } while ((jc_gpu_va = h->next_job));
3337
3338 pandecode_map_read_write();
3339 }