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25 #include "util/u_math.h"
26 #include "midgard_pack.h"
27 #include "pan_encoder.h"
29 /* This file handles attribute descriptors. The
30 * bulk of the complexity is from instancing. See mali_job for
31 * notes on how this works. But basically, for small vertex
32 * counts, we have a lookup table, and for large vertex counts,
33 * we look at the high bits as a heuristic. This has to match
34 * exactly how the hardware calculates this (which is why the
35 * algorithm is so weird) or else instancing will break. */
37 /* Given an odd number (of the form 2k + 1), compute k */
38 #define ODD(odd) ((odd - 1) >> 1)
41 panfrost_small_padded_vertex_count(unsigned idx
)
43 if (idx
== 11 || idx
== 13 || idx
== 15 || idx
== 19)
50 panfrost_large_padded_vertex_count(uint32_t vertex_count
)
52 /* First, we have to find the highest set one */
53 unsigned highest
= 32 - __builtin_clz(vertex_count
);
55 /* Using that, we mask out the highest 4-bits */
56 unsigned n
= highest
- 4;
57 unsigned nibble
= (vertex_count
>> n
) & 0xF;
59 /* Great, we have the nibble. Now we can just try possibilities. Note
60 * that we don't care about the bottom most bit in most cases, and we
61 * know the top bit must be 1 */
63 unsigned middle_two
= (nibble
>> 1) & 0x3;
70 return (1 << (n
+ 1)) * 5;
72 return (1 << (n
+ 2)) * 3;
74 return (1 << (n
+ 1)) * 7;
76 return (1 << (n
+ 4));
78 return 0; /* unreachable */
83 panfrost_padded_vertex_count(unsigned vertex_count
)
85 if (vertex_count
< 20)
86 return panfrost_small_padded_vertex_count(vertex_count
);
88 return panfrost_large_padded_vertex_count(vertex_count
);
91 /* The much, much more irritating case -- instancing is enabled. See
92 * panfrost_job.h for notes on how this works */
95 panfrost_compute_magic_divisor(unsigned hw_divisor
, unsigned *o_shift
, unsigned *extra_flags
)
97 /* We have a NPOT divisor. Here's the fun one (multipling by
98 * the inverse and shifting) */
101 unsigned shift
= util_logbase2(hw_divisor
);
103 /* m = ceil(2^(32 + shift) / d) */
104 uint64_t shift_hi
= 32 + shift
;
105 uint64_t t
= 1ll << shift_hi
;
107 double hw_divisor_d
= hw_divisor
;
108 double m_f
= ceil(t_f
/ hw_divisor_d
);
112 uint32_t magic_divisor
= m
;
114 /* e = 2^(shift + 32) % d */
115 uint64_t e
= t
% hw_divisor
;
117 /* Apply round-down algorithm? e <= 2^shift?. XXX: The blob
118 * seems to use a different condition */
119 if (e
<= (1ll << shift
)) {
120 magic_divisor
= m
- 1;
124 /* Top flag implicitly set */
125 assert(magic_divisor
& (1u << 31));
126 magic_divisor
&= ~(1u << 31);
129 return magic_divisor
;
132 /* Records for gl_VertexID and gl_InstanceID use a slightly special encoding,
133 * but the idea is the same */
137 unsigned padded_count
,
138 struct mali_attribute_buffer_packed
*attr
,
141 /* We factor the padded count as shift/odd and that's it */
142 pan_pack(attr
, ATTRIBUTE_BUFFER
, cfg
) {
143 cfg
.special
= MALI_ATTRIBUTE_SPECIAL_VERTEX_ID
;
147 cfg
.divisor_r
= __builtin_ctz(padded_count
);
148 cfg
.divisor_p
= padded_count
>> (cfg
.divisor_r
+ 1);
150 /* Match the blob... */
151 cfg
.divisor_r
= 0x1F;
158 panfrost_instance_id(
159 unsigned padded_count
,
160 struct mali_attribute_buffer_packed
*attr
,
163 pan_pack(attr
, ATTRIBUTE_BUFFER
, cfg
) {
164 cfg
.special
= MALI_ATTRIBUTE_SPECIAL_INSTANCE_ID
;
167 /* POT records have just a shift directly with an off-by-one for
168 * unclear reasons. NPOT records have a magic divisor smushed into the
169 * stride field (which is unused for these special records) */
171 if (!instanced
|| padded_count
<= 1) {
172 /* Match the blob... */
173 cfg
.stride
= ((1u << 31) - 1);
174 cfg
.divisor_r
= 0x1F;
176 } else if(util_is_power_of_two_or_zero(padded_count
)) {
177 /* By above, padded_count > 1 => padded_count >= 2 so
178 * since we're a power of two, ctz(padded_count) =
179 * log2(padded_count) >= log2(2) = 1, so
180 * ctz(padded_count) - 1 >= 0, so this can't underflow
183 cfg
.divisor_r
= __builtin_ctz(padded_count
) - 1;
185 cfg
.stride
= panfrost_compute_magic_divisor(padded_count
,
186 &cfg
.divisor_r
, &cfg
.divisor_e
);