src/panfrost/midgard/disassemble.c

   1 /* Author(s):
   2  *   Connor Abbott
   3  *   Alyssa Rosenzweig
   4  *
   5  * Copyright (c) 2013 Connor Abbott (connor@abbott.cx)
   6  * Copyright (c) 2018 Alyssa Rosenzweig (alyssa@rosenzweig.io)
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a copy
   9  * of this software and associated documentation files (the "Software"), to deal
  10  * in the Software without restriction, including without limitation the rights
  11  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12  * copies of the Software, and to permit persons to whom the Software is
  13  * furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice shall be included in
  16  * all copies or substantial portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  21  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24  * THE SOFTWARE.
  25  */
  26
  27 #include <stdio.h>
  28 #include <stdint.h>
  29 #include <stdlib.h>
  30 #include <assert.h>
  31 #include <inttypes.h>
  32 #include <ctype.h>
  33 #include <string.h>
  34 #include "midgard.h"
  35 #include "midgard-parse.h"
  36 #include "midgard_ops.h"
  37 #include "disassemble.h"
  38 #include "helpers.h"
  39 #include "util/half_float.h"
  40 #include "util/u_math.h"
  41
  42 #define DEFINE_CASE(define, str) case define: { printf(str); break; }
  43
  44 static unsigned *midg_tags;
  45 static bool is_instruction_int = false;
  46
  47 /* Stats */
  48
  49 static struct midgard_disasm_stats midg_stats;
  50
  51 /* Prints a short form of the tag for branching, the minimum needed to be
  52  * legible and unambiguous */
  53
  54 static void
  55 print_tag_short(unsigned tag)
  56 {
  57         switch (midgard_word_types[tag]) {
  58         case midgard_word_type_texture:
  59                 printf("tex/%X", tag);
  60                 break;
  61
  62         case midgard_word_type_load_store:
  63                 printf("ldst");
  64                 break;
  65
  66         case midgard_word_type_alu:
  67                 printf("alu%u/%X", midgard_word_size[tag], tag);
  68                 break;
  69
  70         default:
  71                 printf("%s%X", (tag > 0) ? "" : "unk", tag);
  72                 break;
  73         }
  74 }
  75
  76 static void
  77 print_alu_opcode(midgard_alu_op op)
  78 {
  79         bool int_op = false;
  80
  81         if (alu_opcode_props[op].name) {
  82                 printf("%s", alu_opcode_props[op].name);
  83
  84                 int_op = midgard_is_integer_op(op);
  85         } else
  86                 printf("alu_op_%02X", op);
  87
  88         /* For constant analysis */
  89         is_instruction_int = int_op;
  90 }
  91
  92 static void
  93 print_ld_st_opcode(midgard_load_store_op op)
  94 {
  95         if (load_store_opcode_props[op].name)
  96                 printf("%s", load_store_opcode_props[op].name);
  97         else
  98                 printf("ldst_op_%02X", op);
  99 }
 100
 101 static bool is_embedded_constant_half = false;
 102 static bool is_embedded_constant_int = false;
 103
 104 static char
 105 prefix_for_bits(unsigned bits)
 106 {
 107         switch (bits) {
 108         case 8:
 109                 return 'q';
 110         case 16:
 111                 return 'h';
 112         case 64:
 113                 return 'd';
 114         default:
 115                 return 0;
 116         }
 117 }
 118
 119 /* For static analysis to ensure all registers are written at least once before
 120  * use along the source code path (TODO: does this break done for complex CF?)
 121  */
 122
 123 uint16_t midg_ever_written = 0;
 124
 125 static void
 126 print_reg(unsigned reg, unsigned bits)
 127 {
 128         /* Perform basic static analysis for expanding constants correctly */
 129
 130         if (reg == 26) {
 131                 is_embedded_constant_int = is_instruction_int;
 132                 is_embedded_constant_half = (bits < 32);
 133         }
 134
 135         unsigned uniform_reg = 23 - reg;
 136         bool is_uniform = false;
 137
 138         /* For r8-r15, it could be a work or uniform. We distinguish based on
 139          * the fact work registers are ALWAYS written before use, but uniform
 140          * registers are NEVER written before use. */
 141
 142         if ((reg >= 8 && reg < 16) && !(midg_ever_written & (1 << reg)))
 143                 is_uniform = true;
 144
 145         /* r16-r23 are always uniform */
 146
 147         if (reg >= 16 && reg <= 23)
 148                 is_uniform = true;
 149
 150         /* Update the uniform count appropriately */
 151
 152         if (is_uniform)
 153                 midg_stats.uniform_count =
 154                         MAX2(uniform_reg + 1, midg_stats.uniform_count);
 155
 156         char prefix = prefix_for_bits(bits);
 157
 158         if (prefix)
 159                 putchar(prefix);
 160
 161         printf("r%u", reg);
 162 }
 163
 164 static char *outmod_names_float[4] = {
 165         "",
 166         ".pos",
 167         ".unk2",
 168         ".sat"
 169 };
 170
 171 static char *outmod_names_int[4] = {
 172         ".isat",
 173         ".usat",
 174         "",
 175         ".hi"
 176 };
 177
 178 static char *srcmod_names_int[4] = {
 179         "sext(",
 180         "zext(",
 181         "",
 182         "("
 183 };
 184
 185 static void
 186 print_outmod(unsigned outmod, bool is_int)
 187 {
 188         printf("%s", is_int ? outmod_names_int[outmod] :
 189                outmod_names_float[outmod]);
 190 }
 191
 192 static void
 193 print_quad_word(uint32_t *words, unsigned tabs)
 194 {
 195         unsigned i;
 196
 197         for (i = 0; i < 4; i++)
 198                 printf("0x%08X%s ", words[i], i == 3 ? "" : ",");
 199
 200         printf("\n");
 201 }
 202
 203 static const char components[16] = "xyzwefghijklmnop";
 204
 205 /* Helper to print 4 chars of a swizzle */
 206 static void
 207 print_swizzle_helper(unsigned swizzle, bool upper)
 208 {
 209         for (unsigned i = 0; i < 4; ++i) {
 210                 unsigned c = (swizzle >> (i * 2)) & 3;
 211                 c += upper*4;
 212                 printf("%c", components[c]);
 213         }
 214 }
 215
 216 /* Helper to print 8 chars of a swizzle, duplicating over */
 217 static void
 218 print_swizzle_helper_8(unsigned swizzle, bool upper)
 219 {
 220         for (unsigned i = 0; i < 4; ++i) {
 221                 unsigned c = (swizzle >> (i * 2)) & 3;
 222                 c *= 2;
 223                 c += upper*8;
 224                 printf("%c%c", components[c], components[c+1]);
 225         }
 226 }
 227
 228 static void
 229 print_swizzle_vec16(unsigned swizzle, bool rep_high, bool rep_low,
 230                     midgard_dest_override override)
 231 {
 232         printf(".");
 233
 234         if (override == midgard_dest_override_upper) {
 235                 if (rep_high)
 236                         printf(" /* rep_high */ ");
 237                 if (rep_low)
 238                         printf(" /* rep_low */ ");
 239
 240                 if (!rep_high && rep_low)
 241                         print_swizzle_helper_8(swizzle, true);
 242                 else
 243                         print_swizzle_helper_8(swizzle, false);
 244         } else {
 245                 print_swizzle_helper_8(swizzle, rep_high & 1);
 246                 print_swizzle_helper_8(swizzle, !(rep_low & 1));
 247         }
 248 }
 249
 250 static void
 251 print_swizzle_vec8(unsigned swizzle, bool rep_high, bool rep_low)
 252 {
 253         printf(".");
 254
 255         print_swizzle_helper(swizzle, rep_high & 1);
 256         print_swizzle_helper(swizzle, !(rep_low & 1));
 257 }
 258
 259 static void
 260 print_swizzle_vec4(unsigned swizzle, bool rep_high, bool rep_low)
 261 {
 262         if (rep_high)
 263                 printf(" /* rep_high */ ");
 264         if (rep_low)
 265                 printf(" /* rep_low */ ");
 266
 267         if (swizzle == 0xE4) return; /* xyzw */
 268
 269         printf(".");
 270         print_swizzle_helper(swizzle, 0);
 271 }
 272 static void
 273 print_swizzle_vec2(unsigned swizzle, bool rep_high, bool rep_low)
 274 {
 275         if (rep_high)
 276                 printf(" /* rep_high */ ");
 277         if (rep_low)
 278                 printf(" /* rep_low */ ");
 279
 280         if (swizzle == 0xE4) return; /* XY */
 281
 282         printf(".");
 283
 284         for (unsigned i = 0; i < 4; i += 2) {
 285                 unsigned a = (swizzle >> (i * 2)) & 3;
 286                 unsigned b = (swizzle >> ((i+1) * 2)) & 3;
 287
 288                 /* Normally we're adjacent, but if there's an issue, don't make
 289                  * it ambiguous */
 290
 291                 if (a & 0x1)
 292                         printf("[%c%c]", components[a], components[b]);
 293                 else if (a == b)
 294                         printf("%c", components[a >> 1]);
 295                 else if (b == (a + 1))
 296                         printf("%c", "XY"[a >> 1]);
 297                 else
 298                         printf("[%c%c]", components[a], components[b]);
 299         }
 300 }
 301
 302 static int
 303 bits_for_mode(midgard_reg_mode mode)
 304 {
 305         switch (mode) {
 306         case midgard_reg_mode_8:
 307                 return 8;
 308         case midgard_reg_mode_16:
 309                 return 16;
 310         case midgard_reg_mode_32:
 311                 return 32;
 312         case midgard_reg_mode_64:
 313                 return 64;
 314         default:
 315                 unreachable("Invalid reg mode");
 316                 return 0;
 317         }
 318 }
 319
 320 static int
 321 bits_for_mode_halved(midgard_reg_mode mode, bool half)
 322 {
 323         unsigned bits = bits_for_mode(mode);
 324
 325         if (half)
 326                 bits >>= 1;
 327
 328         return bits;
 329 }
 330
 331 static void
 332 print_vector_src(unsigned src_binary,
 333                  midgard_reg_mode mode, unsigned reg,
 334                  midgard_dest_override override, bool is_int)
 335 {
 336         midgard_vector_alu_src *src = (midgard_vector_alu_src *)&src_binary;
 337
 338         /* Modifiers change meaning depending on the op's context */
 339
 340         midgard_int_mod int_mod = src->mod;
 341
 342         if (is_int) {
 343                 printf("%s", srcmod_names_int[int_mod]);
 344         } else {
 345                 if (src->mod & MIDGARD_FLOAT_MOD_NEG)
 346                         printf("-");
 347
 348                 if (src->mod & MIDGARD_FLOAT_MOD_ABS)
 349                         printf("abs(");
 350         }
 351
 352         //register
 353         unsigned bits = bits_for_mode_halved(mode, src->half);
 354         print_reg(reg, bits);
 355
 356         //swizzle
 357         if (bits == 16) {
 358                 /* When the mode of the instruction is itself 16-bit,
 359                  * rep_low/high work more or less as expected. But if the mode
 360                  * is 32-bit and we're stepping down, you only have vec4 and
 361                  * the meaning shifts to rep_low as higher-half and rep_high is
 362                  * never seen. TODO: are other modes similar? */
 363
 364                 if (mode == midgard_reg_mode_32) {
 365                         printf(".");
 366                         print_swizzle_helper(src->swizzle, src->rep_low);
 367                         assert(!src->rep_high);
 368                 } else {
 369                         print_swizzle_vec8(src->swizzle, src->rep_high, src->rep_low);
 370                 }
 371         } else if (bits == 8)
 372                 print_swizzle_vec16(src->swizzle, src->rep_high, src->rep_low, override);
 373         else if (bits == 32)
 374                 print_swizzle_vec4(src->swizzle, src->rep_high, src->rep_low);
 375         else if (bits == 64)
 376                 print_swizzle_vec2(src->swizzle, src->rep_high, src->rep_low);
 377
 378         /* Since we wrapped with a function-looking thing */
 379
 380         if (is_int && int_mod == midgard_int_shift)
 381                 printf(") << %u", bits);
 382         else if ((is_int && (int_mod != midgard_int_normal))
 383                  || (!is_int && src->mod & MIDGARD_FLOAT_MOD_ABS))
 384                 printf(")");
 385 }
 386
 387 static uint16_t
 388 decode_vector_imm(unsigned src2_reg, unsigned imm)
 389 {
 390         uint16_t ret;
 391         ret = src2_reg << 11;
 392         ret |= (imm & 0x7) << 8;
 393         ret |= (imm >> 3) & 0xFF;
 394         return ret;
 395 }
 396
 397 static void
 398 print_immediate(uint16_t imm)
 399 {
 400         if (is_instruction_int)
 401                 printf("#%u", imm);
 402         else
 403                 printf("#%g", _mesa_half_to_float(imm));
 404 }
 405
 406 static void
 407 update_dest(unsigned reg)
 408 {
 409         /* We should record writes as marking this as a work register. Store
 410          * the max register in work_count; we'll add one at the end */
 411
 412         if (reg < 16) {
 413                 midg_stats.work_count = MAX2(reg, midg_stats.work_count);
 414                 midg_ever_written |= (1 << reg);
 415         }
 416 }
 417
 418 static void
 419 print_dest(unsigned reg, midgard_reg_mode mode, midgard_dest_override override)
 420 {
 421         /* Depending on the mode and override, we determine the type of
 422          * destination addressed. Absent an override, we address just the
 423          * type of the operation itself */
 424
 425         unsigned bits = bits_for_mode(mode);
 426
 427         if (override != midgard_dest_override_none)
 428                 bits /= 2;
 429
 430         update_dest(reg);
 431         print_reg(reg, bits);
 432 }
 433
 434 static void
 435 print_mask_vec16(uint8_t mask, midgard_dest_override override)
 436 {
 437         printf(".");
 438
 439         for (unsigned i = 0; i < 8; i++) {
 440                 if (mask & (1 << i))
 441                         printf("%c%c",
 442                                components[i*2 + 0],
 443                                components[i*2 + 1]);
 444         }
 445 }
 446
 447 /* For 16-bit+ masks, we read off from the 8-bit mask field. For 16-bit (vec8),
 448  * it's just one bit per channel, easy peasy. For 32-bit (vec4), it's one bit
 449  * per channel with one duplicate bit in the middle. For 64-bit (vec2), it's
 450  * one-bit per channel with _3_ duplicate bits in the middle. Basically, just
 451  * subdividing the 128-bit word in 16-bit increments. For 64-bit, we uppercase
 452  * the mask to make it obvious what happened */
 453
 454 static void
 455 print_mask(uint8_t mask, unsigned bits, midgard_dest_override override)
 456 {
 457         if (bits == 8) {
 458                 print_mask_vec16(mask, override);
 459                 return;
 460         }
 461
 462         /* Skip 'complete' masks */
 463
 464         if (override == midgard_dest_override_none) {
 465                 if (bits >= 32 && mask == 0xFF) return;
 466
 467                 if (bits == 16) {
 468                         if (mask == 0x0F)
 469                                 return;
 470                         else if (mask == 0xF0) {
 471                                 printf("'");
 472                                 return;
 473                         }
 474                 }
 475         }
 476
 477         printf(".");
 478
 479         unsigned skip = (bits / 16);
 480         bool uppercase = bits > 32;
 481         bool tripped = false;
 482
 483         /* To apply an upper destination override, we "shift" the alphabet.
 484          * E.g. with an upper override on 32-bit, instead of xyzw, print efgh.
 485          * For upper 16-bit, instead of xyzwefgh, print ijklmnop */
 486
 487         const char *alphabet = components;
 488
 489         if (override == midgard_dest_override_upper) {
 490                 unsigned components = 128 / bits;
 491                 alphabet += components;
 492         }
 493
 494         for (unsigned i = 0; i < 8; i += skip) {
 495                 bool a = (mask & (1 << i)) != 0;
 496
 497                 for (unsigned j = 1; j < skip; ++j) {
 498                         bool dupe = (mask & (1 << (i + j))) != 0;
 499                         tripped |= (dupe != a);
 500                 }
 501
 502                 if (a) {
 503                         char c = alphabet[i / skip];
 504
 505                         if (uppercase)
 506                                 c = toupper(c);
 507
 508                         printf("%c", c);
 509                 }
 510         }
 511
 512         if (tripped)
 513                 printf(" /* %X */", mask);
 514 }
 515
 516 /* Prints the 4-bit masks found in texture and load/store ops, as opposed to
 517  * the 8-bit masks found in (vector) ALU ops. Supports texture-style 16-bit
 518  * mode as well, but not load/store-style 16-bit mode. */
 519
 520 static void
 521 print_mask_4(unsigned mask, bool upper)
 522 {
 523         if (mask == 0xF) {
 524                 if (upper)
 525                         printf("'");
 526
 527                 return;
 528         }
 529
 530         printf(".");
 531
 532         for (unsigned i = 0; i < 4; ++i) {
 533                 bool a = (mask & (1 << i)) != 0;
 534                 if (a)
 535                         printf("%c", components[i + (upper ? 4 : 0)]);
 536         }
 537 }
 538
 539 static void
 540 print_vector_field(const char *name, uint16_t *words, uint16_t reg_word,
 541                    unsigned tabs)
 542 {
 543         midgard_reg_info *reg_info = (midgard_reg_info *)&reg_word;
 544         midgard_vector_alu *alu_field = (midgard_vector_alu *) words;
 545         midgard_reg_mode mode = alu_field->reg_mode;
 546         unsigned override = alu_field->dest_override;
 547
 548         /* For now, prefix instruction names with their unit, until we
 549          * understand how this works on a deeper level */
 550         printf("%s.", name);
 551
 552         print_alu_opcode(alu_field->op);
 553
 554         /* Postfix with the size to disambiguate if necessary */
 555         char postfix = prefix_for_bits(bits_for_mode(mode));
 556         bool size_ambiguous = override != midgard_dest_override_none;
 557
 558         if (size_ambiguous)
 559                 printf("%c", postfix ? postfix : 'r');
 560
 561         /* Print the outmod, if there is one */
 562         print_outmod(alu_field->outmod,
 563                      midgard_is_integer_out_op(alu_field->op));
 564
 565         printf(" ");
 566
 567         /* Mask denoting status of 8-lanes */
 568         uint8_t mask = alu_field->mask;
 569
 570         /* First, print the destination */
 571         print_dest(reg_info->out_reg, mode, alu_field->dest_override);
 572
 573         if (override != midgard_dest_override_none) {
 574                 bool modeable = (mode != midgard_reg_mode_8);
 575                 bool known = override != 0x3; /* Unused value */
 576
 577                 if (!(modeable && known))
 578                         printf("/* do%u */ ", override);
 579         }
 580
 581         print_mask(mask, bits_for_mode(mode), override);
 582
 583         printf(", ");
 584
 585         bool is_int = midgard_is_integer_op(alu_field->op);
 586         print_vector_src(alu_field->src1, mode, reg_info->src1_reg, override, is_int);
 587
 588         printf(", ");
 589
 590         if (reg_info->src2_imm) {
 591                 uint16_t imm = decode_vector_imm(reg_info->src2_reg, alu_field->src2 >> 2);
 592                 print_immediate(imm);
 593         } else {
 594                 print_vector_src(alu_field->src2, mode,
 595                                  reg_info->src2_reg, override, is_int);
 596         }
 597
 598         midg_stats.instruction_count++;
 599         printf("\n");
 600 }
 601
 602 static void
 603 print_scalar_src(unsigned src_binary, unsigned reg)
 604 {
 605         midgard_scalar_alu_src *src = (midgard_scalar_alu_src *)&src_binary;
 606
 607         if (src->negate)
 608                 printf("-");
 609
 610         if (src->abs)
 611                 printf("abs(");
 612
 613         print_reg(reg, src->full ? 32 : 16);
 614
 615         unsigned c = src->component;
 616
 617         if (src->full) {
 618                 assert((c & 1) == 0);
 619                 c >>= 1;
 620         }
 621
 622         printf(".%c", components[c]);
 623
 624         if (src->abs)
 625                 printf(")");
 626
 627 }
 628
 629 static uint16_t
 630 decode_scalar_imm(unsigned src2_reg, unsigned imm)
 631 {
 632         uint16_t ret;
 633         ret = src2_reg << 11;
 634         ret |= (imm & 3) << 9;
 635         ret |= (imm & 4) << 6;
 636         ret |= (imm & 0x38) << 2;
 637         ret |= imm >> 6;
 638         return ret;
 639 }
 640
 641 static void
 642 print_scalar_field(const char *name, uint16_t *words, uint16_t reg_word,
 643                    unsigned tabs)
 644 {
 645         midgard_reg_info *reg_info = (midgard_reg_info *)&reg_word;
 646         midgard_scalar_alu *alu_field = (midgard_scalar_alu *) words;
 647
 648         if (alu_field->unknown)
 649                 printf("scalar ALU unknown bit set\n");
 650
 651         printf("%s.", name);
 652         print_alu_opcode(alu_field->op);
 653         print_outmod(alu_field->outmod,
 654                      midgard_is_integer_out_op(alu_field->op));
 655         printf(" ");
 656
 657         bool full = alu_field->output_full;
 658         update_dest(reg_info->out_reg);
 659         print_reg(reg_info->out_reg, full ? 32 : 16);
 660         unsigned c = alu_field->output_component;
 661
 662         if (full) {
 663                 assert((c & 1) == 0);
 664                 c >>= 1;
 665         }
 666
 667         printf(".%c, ", components[c]);
 668
 669         print_scalar_src(alu_field->src1, reg_info->src1_reg);
 670
 671         printf(", ");
 672
 673         if (reg_info->src2_imm) {
 674                 uint16_t imm = decode_scalar_imm(reg_info->src2_reg,
 675                                                  alu_field->src2);
 676                 print_immediate(imm);
 677         } else
 678                 print_scalar_src(alu_field->src2, reg_info->src2_reg);
 679
 680         midg_stats.instruction_count++;
 681         printf("\n");
 682 }
 683
 684 static void
 685 print_branch_op(unsigned op)
 686 {
 687         switch (op) {
 688         case midgard_jmp_writeout_op_branch_uncond:
 689                 printf("uncond.");
 690                 break;
 691
 692         case midgard_jmp_writeout_op_branch_cond:
 693                 printf("cond.");
 694                 break;
 695
 696         case midgard_jmp_writeout_op_writeout:
 697                 printf("write.");
 698                 break;
 699
 700         case midgard_jmp_writeout_op_tilebuffer_pending:
 701                 printf("tilebuffer.");
 702                 break;
 703
 704         case midgard_jmp_writeout_op_discard:
 705                 printf("discard.");
 706                 break;
 707
 708         default:
 709                 printf("unk%u.", op);
 710                 break;
 711         }
 712 }
 713
 714 static void
 715 print_branch_cond(int cond)
 716 {
 717         switch (cond) {
 718         case midgard_condition_write0:
 719                 printf("write0");
 720                 break;
 721
 722         case midgard_condition_false:
 723                 printf("false");
 724                 break;
 725
 726         case midgard_condition_true:
 727                 printf("true");
 728                 break;
 729
 730         case midgard_condition_always:
 731                 printf("always");
 732                 break;
 733
 734         default:
 735                 printf("unk%X", cond);
 736                 break;
 737         }
 738 }
 739
 740 static void
 741 print_compact_branch_writeout_field(uint16_t word)
 742 {
 743         midgard_jmp_writeout_op op = word & 0x7;
 744
 745         switch (op) {
 746         case midgard_jmp_writeout_op_branch_uncond: {
 747                 midgard_branch_uncond br_uncond;
 748                 memcpy((char *) &br_uncond, (char *) &word, sizeof(br_uncond));
 749                 printf("br.uncond ");
 750
 751                 if (br_uncond.unknown != 1)
 752                         printf("unknown:%u, ", br_uncond.unknown);
 753
 754                 if (br_uncond.offset >= 0)
 755                         printf("+");
 756
 757                 printf("%d -> ", br_uncond.offset);
 758                 print_tag_short(br_uncond.dest_tag);
 759                 printf("\n");
 760
 761                 break;
 762         }
 763
 764         case midgard_jmp_writeout_op_branch_cond:
 765         case midgard_jmp_writeout_op_writeout:
 766         case midgard_jmp_writeout_op_discard:
 767         default: {
 768                 midgard_branch_cond br_cond;
 769                 memcpy((char *) &br_cond, (char *) &word, sizeof(br_cond));
 770
 771                 printf("br.");
 772
 773                 print_branch_op(br_cond.op);
 774                 print_branch_cond(br_cond.cond);
 775
 776                 printf(" ");
 777
 778                 if (br_cond.offset >= 0)
 779                         printf("+");
 780
 781                 printf("%d -> ", br_cond.offset);
 782                 print_tag_short(br_cond.dest_tag);
 783                 printf("\n");
 784
 785                 break;
 786         }
 787         }
 788
 789         midg_stats.instruction_count++;
 790 }
 791
 792 static void
 793 print_extended_branch_writeout_field(uint8_t *words, unsigned next)
 794 {
 795         midgard_branch_extended br;
 796         memcpy((char *) &br, (char *) words, sizeof(br));
 797
 798         printf("brx.");
 799
 800         print_branch_op(br.op);
 801
 802         /* Condition codes are a LUT in the general case, but simply repeated 8 times for single-channel conditions.. Check this. */
 803
 804         bool single_channel = true;
 805
 806         for (unsigned i = 0; i < 16; i += 2) {
 807                 single_channel &= (((br.cond >> i) & 0x3) == (br.cond & 0x3));
 808         }
 809
 810         if (single_channel)
 811                 print_branch_cond(br.cond & 0x3);
 812         else
 813                 printf("lut%X", br.cond);
 814
 815         if (br.unknown)
 816                 printf(".unknown%u", br.unknown);
 817
 818         printf(" ");
 819
 820         if (br.offset >= 0)
 821                 printf("+");
 822
 823         printf("%d -> ", br.offset);
 824         print_tag_short(br.dest_tag);
 825         printf("\n");
 826
 827         unsigned I = next + br.offset * 4;
 828
 829         if (midg_tags[I] && midg_tags[I] != br.dest_tag) {
 830                 printf("\t/* XXX TAG ERROR: jumping to ");
 831                 print_tag_short(br.dest_tag);
 832                 printf(" but tagged ");
 833                 print_tag_short(midg_tags[I]);
 834                 printf(" */\n");
 835         }
 836
 837         midg_tags[I] = br.dest_tag;
 838
 839         midg_stats.instruction_count++;
 840 }
 841
 842 static unsigned
 843 num_alu_fields_enabled(uint32_t control_word)
 844 {
 845         unsigned ret = 0;
 846
 847         if ((control_word >> 17) & 1)
 848                 ret++;
 849
 850         if ((control_word >> 19) & 1)
 851                 ret++;
 852
 853         if ((control_word >> 21) & 1)
 854                 ret++;
 855
 856         if ((control_word >> 23) & 1)
 857                 ret++;
 858
 859         if ((control_word >> 25) & 1)
 860                 ret++;
 861
 862         return ret;
 863 }
 864
 865 static float
 866 float_bitcast(uint32_t integer)
 867 {
 868         union {
 869                 uint32_t i;
 870                 float f;
 871         } v;
 872
 873         v.i = integer;
 874         return v.f;
 875 }
 876
 877 static void
 878 print_alu_word(uint32_t *words, unsigned num_quad_words,
 879                unsigned tabs, unsigned next)
 880 {
 881         uint32_t control_word = words[0];
 882         uint16_t *beginning_ptr = (uint16_t *)(words + 1);
 883         unsigned num_fields = num_alu_fields_enabled(control_word);
 884         uint16_t *word_ptr = beginning_ptr + num_fields;
 885         unsigned num_words = 2 + num_fields;
 886
 887         if ((control_word >> 16) & 1)
 888                 printf("unknown bit 16 enabled\n");
 889
 890         if ((control_word >> 17) & 1) {
 891                 print_vector_field("vmul", word_ptr, *beginning_ptr, tabs);
 892                 beginning_ptr += 1;
 893                 word_ptr += 3;
 894                 num_words += 3;
 895         }
 896
 897         if ((control_word >> 18) & 1)
 898                 printf("unknown bit 18 enabled\n");
 899
 900         if ((control_word >> 19) & 1) {
 901                 print_scalar_field("sadd", word_ptr, *beginning_ptr, tabs);
 902                 beginning_ptr += 1;
 903                 word_ptr += 2;
 904                 num_words += 2;
 905         }
 906
 907         if ((control_word >> 20) & 1)
 908                 printf("unknown bit 20 enabled\n");
 909
 910         if ((control_word >> 21) & 1) {
 911                 print_vector_field("vadd", word_ptr, *beginning_ptr, tabs);
 912                 beginning_ptr += 1;
 913                 word_ptr += 3;
 914                 num_words += 3;
 915         }
 916
 917         if ((control_word >> 22) & 1)
 918                 printf("unknown bit 22 enabled\n");
 919
 920         if ((control_word >> 23) & 1) {
 921                 print_scalar_field("smul", word_ptr, *beginning_ptr, tabs);
 922                 beginning_ptr += 1;
 923                 word_ptr += 2;
 924                 num_words += 2;
 925         }
 926
 927         if ((control_word >> 24) & 1)
 928                 printf("unknown bit 24 enabled\n");
 929
 930         if ((control_word >> 25) & 1) {
 931                 print_vector_field("lut", word_ptr, *beginning_ptr, tabs);
 932                 word_ptr += 3;
 933                 num_words += 3;
 934         }
 935
 936         if ((control_word >> 26) & 1) {
 937                 print_compact_branch_writeout_field(*word_ptr);
 938                 word_ptr += 1;
 939                 num_words += 1;
 940         }
 941
 942         if ((control_word >> 27) & 1) {
 943                 print_extended_branch_writeout_field((uint8_t *) word_ptr, next);
 944                 word_ptr += 3;
 945                 num_words += 3;
 946         }
 947
 948         if (num_quad_words > (num_words + 7) / 8) {
 949                 assert(num_quad_words == (num_words + 15) / 8);
 950                 //Assume that the extra quadword is constants
 951                 void *consts = words + (4 * num_quad_words - 4);
 952
 953                 if (is_embedded_constant_int) {
 954                         if (is_embedded_constant_half) {
 955                                 int16_t *sconsts = (int16_t *) consts;
 956                                 printf("sconstants %d, %d, %d, %d\n",
 957                                        sconsts[0],
 958                                        sconsts[1],
 959                                        sconsts[2],
 960                                        sconsts[3]);
 961                         } else {
 962                                 uint32_t *iconsts = (uint32_t *) consts;
 963                                 printf("iconstants 0x%X, 0x%X, 0x%X, 0x%X\n",
 964                                        iconsts[0],
 965                                        iconsts[1],
 966                                        iconsts[2],
 967                                        iconsts[3]);
 968                         }
 969                 } else {
 970                         if (is_embedded_constant_half) {
 971                                 uint16_t *hconsts = (uint16_t *) consts;
 972                                 printf("hconstants %g, %g, %g, %g\n",
 973                                        _mesa_half_to_float(hconsts[0]),
 974                                        _mesa_half_to_float(hconsts[1]),
 975                                        _mesa_half_to_float(hconsts[2]),
 976                                        _mesa_half_to_float(hconsts[3]));
 977                         } else {
 978                                 uint32_t *fconsts = (uint32_t *) consts;
 979                                 printf("fconstants %g, %g, %g, %g\n",
 980                                        float_bitcast(fconsts[0]),
 981                                        float_bitcast(fconsts[1]),
 982                                        float_bitcast(fconsts[2]),
 983                                        float_bitcast(fconsts[3]));
 984                         }
 985
 986                 }
 987         }
 988 }
 989
 990 static void
 991 print_varying_parameters(midgard_load_store_word *word)
 992 {
 993         midgard_varying_parameter param;
 994         unsigned v = word->varying_parameters;
 995         memcpy(&param, &v, sizeof(param));
 996
 997         if (param.is_varying) {
 998                 /* If a varying, there are qualifiers */
 999                 if (param.flat)
1000                         printf(".flat");
1001
1002                 if (param.interpolation != midgard_interp_default) {
1003                         if (param.interpolation == midgard_interp_centroid)
1004                                 printf(".centroid");
1005                         else
1006                                 printf(".interp%d", param.interpolation);
1007                 }
1008
1009                 if (param.modifier != midgard_varying_mod_none) {
1010                         if (param.modifier == midgard_varying_mod_perspective_w)
1011                                 printf(".perspectivew");
1012                         else if (param.modifier == midgard_varying_mod_perspective_z)
1013                                 printf(".perspectivez");
1014                         else
1015                                 printf(".mod%d", param.modifier);
1016                 }
1017         } else if (param.flat || param.interpolation || param.modifier) {
1018                 printf(" /* is_varying not set but varying metadata attached */");
1019         }
1020
1021         if (param.zero0 || param.zero1 || param.zero2)
1022                 printf(" /* zero tripped, %u %u %u */ ", param.zero0, param.zero1, param.zero2);
1023 }
1024
1025 static bool
1026 is_op_varying(unsigned op)
1027 {
1028         switch (op) {
1029         case midgard_op_st_vary_16:
1030         case midgard_op_st_vary_32:
1031         case midgard_op_st_vary_32i:
1032         case midgard_op_st_vary_32u:
1033         case midgard_op_ld_vary_16:
1034         case midgard_op_ld_vary_32:
1035         case midgard_op_ld_vary_32i:
1036         case midgard_op_ld_vary_32u:
1037                 return true;
1038         }
1039
1040         return false;
1041 }
1042
1043 static bool
1044 is_op_attribute(unsigned op)
1045 {
1046         switch (op) {
1047         case midgard_op_ld_attr_16:
1048         case midgard_op_ld_attr_32:
1049         case midgard_op_ld_attr_32i:
1050         case midgard_op_ld_attr_32u:
1051                 return true;
1052         }
1053
1054         return false;
1055 }
1056
1057 static void
1058 print_load_store_arg(uint8_t arg, unsigned index)
1059 {
1060         /* Try to interpret as a register */
1061         midgard_ldst_register_select sel;
1062         memcpy(&sel, &arg, sizeof(arg));
1063
1064         /* If unknown is set, we're not sure what this is or how to
1065          * interpret it. But if it's zero, we get it. */
1066
1067         if (sel.unknown) {
1068                 printf("0x%02X", arg);
1069                 return;
1070         }
1071
1072         unsigned reg = REGISTER_LDST_BASE + sel.select;
1073         char comp = components[sel.component];
1074
1075         printf("r%u.%c", reg, comp);
1076
1077         /* Only print a shift if it's non-zero. Shifts only make sense for the
1078          * second index. For the first, we're not sure what it means yet */
1079
1080         if (index == 1) {
1081                 if (sel.shift)
1082                         printf(" << %u", sel.shift);
1083         } else {
1084                 printf(" /* %X */", sel.shift);
1085         }
1086 }
1087
1088 static void
1089 update_stats(signed *stat, unsigned address)
1090 {
1091         if (*stat >= 0)
1092                 *stat = MAX2(*stat, address + 1);
1093 }
1094
1095 static void
1096 print_load_store_instr(uint64_t data,
1097                        unsigned tabs)
1098 {
1099         midgard_load_store_word *word = (midgard_load_store_word *) &data;
1100
1101         print_ld_st_opcode(word->op);
1102
1103         unsigned address = word->address;
1104
1105         if (is_op_varying(word->op)) {
1106                 print_varying_parameters(word);
1107
1108                 /* Do some analysis: check if direct cacess */
1109
1110                 if ((word->arg_2 == 0x1E) && midg_stats.varying_count >= 0)
1111                         update_stats(&midg_stats.varying_count, address);
1112                 else
1113                         midg_stats.varying_count = -16;
1114         } else if (is_op_attribute(word->op)) {
1115                 if ((word->arg_2 == 0x1E) && midg_stats.attribute_count >= 0)
1116                         update_stats(&midg_stats.attribute_count, address);
1117                 else
1118                         midg_stats.attribute_count = -16;
1119         }
1120
1121         printf(" r%u", word->reg);
1122         print_mask_4(word->mask, false);
1123
1124         if (!OP_IS_STORE(word->op))
1125                 update_dest(word->reg);
1126
1127         bool is_ubo = OP_IS_UBO_READ(word->op);
1128
1129         if (is_ubo) {
1130                 /* UBOs use their own addressing scheme */
1131
1132                 int lo = word->varying_parameters >> 7;
1133                 int hi = word->address;
1134
1135                 /* TODO: Combine fields logically */
1136                 address = (hi << 3) | lo;
1137         }
1138
1139         printf(", %u", address);
1140
1141         print_swizzle_vec4(word->swizzle, false, false);
1142
1143         printf(", ");
1144
1145         if (is_ubo) {
1146                 printf("ubo%u", word->arg_1);
1147                 update_stats(&midg_stats.uniform_buffer_count, word->arg_1);
1148         } else
1149                 print_load_store_arg(word->arg_1, 0);
1150
1151         printf(", ");
1152         print_load_store_arg(word->arg_2, 1);
1153         printf(" /* %X */\n", word->varying_parameters);
1154
1155         midg_stats.instruction_count++;
1156 }
1157
1158 static void
1159 print_load_store_word(uint32_t *word, unsigned tabs)
1160 {
1161         midgard_load_store *load_store = (midgard_load_store *) word;
1162
1163         if (load_store->word1 != 3) {
1164                 print_load_store_instr(load_store->word1, tabs);
1165         }
1166
1167         if (load_store->word2 != 3) {
1168                 print_load_store_instr(load_store->word2, tabs);
1169         }
1170 }
1171
1172 static void
1173 print_texture_reg_select(uint8_t u, unsigned base)
1174 {
1175         midgard_tex_register_select sel;
1176         memcpy(&sel, &u, sizeof(u));
1177
1178         if (!sel.full)
1179                 printf("h");
1180
1181         printf("r%u", base + sel.select);
1182
1183         unsigned component = sel.component;
1184
1185         /* Use the upper half in half-reg mode */
1186         if (sel.upper) {
1187                 assert(!sel.full);
1188                 component += 4;
1189         }
1190
1191         printf(".%c", components[component]);
1192
1193         assert(sel.zero == 0);
1194 }
1195
1196 static void
1197 print_texture_format(int format)
1198 {
1199         /* Act like a modifier */
1200         printf(".");
1201
1202         switch (format) {
1203                 DEFINE_CASE(MALI_TEX_1D, "1d");
1204                 DEFINE_CASE(MALI_TEX_2D, "2d");
1205                 DEFINE_CASE(MALI_TEX_3D, "3d");
1206                 DEFINE_CASE(MALI_TEX_CUBE, "cube");
1207
1208         default:
1209                 unreachable("Bad format");
1210         }
1211 }
1212
1213 static bool
1214 midgard_op_has_helpers(unsigned op, bool gather)
1215 {
1216         if (gather)
1217                 return true;
1218
1219         switch (op) {
1220         case TEXTURE_OP_NORMAL:
1221         case TEXTURE_OP_DFDX:
1222         case TEXTURE_OP_DFDY:
1223                 return true;
1224         default:
1225                 return false;
1226         }
1227 }
1228
1229 static void
1230 print_texture_op(unsigned op, bool gather)
1231 {
1232         /* Act like a bare name, like ESSL functions */
1233
1234         if (gather) {
1235                 printf("textureGather");
1236
1237                 unsigned component = op >> 4;
1238                 unsigned bottom = op & 0xF;
1239
1240                 if (bottom != 0x2)
1241                         printf("_unk%u", bottom);
1242
1243                 printf(".%c", components[component]);
1244                 return;
1245         }
1246
1247         switch (op) {
1248                 DEFINE_CASE(TEXTURE_OP_NORMAL, "texture");
1249                 DEFINE_CASE(TEXTURE_OP_LOD, "textureLod");
1250                 DEFINE_CASE(TEXTURE_OP_TEXEL_FETCH, "texelFetch");
1251                 DEFINE_CASE(TEXTURE_OP_DFDX, "dFdx");
1252                 DEFINE_CASE(TEXTURE_OP_DFDY, "dFdy");
1253
1254         default:
1255                 printf("tex_%X", op);
1256                 break;
1257         }
1258 }
1259
1260 static bool
1261 texture_op_takes_bias(unsigned op)
1262 {
1263         return op == TEXTURE_OP_NORMAL;
1264 }
1265
1266 static char
1267 sampler_type_name(enum mali_sampler_type t)
1268 {
1269         switch (t) {
1270         case MALI_SAMPLER_FLOAT:
1271                 return 'f';
1272         case MALI_SAMPLER_UNSIGNED:
1273                 return 'u';
1274         case MALI_SAMPLER_SIGNED:
1275                 return 'i';
1276         default:
1277                 return '?';
1278         }
1279
1280 }
1281
1282 #undef DEFINE_CASE
1283
1284 static void
1285 print_texture_word(uint32_t *word, unsigned tabs, unsigned in_reg_base, unsigned out_reg_base)
1286 {
1287         midgard_texture_word *texture = (midgard_texture_word *) word;
1288
1289         midg_stats.helper_invocations |=
1290                 midgard_op_has_helpers(texture->op, texture->is_gather);
1291
1292         /* Broad category of texture operation in question */
1293         print_texture_op(texture->op, texture->is_gather);
1294
1295         /* Specific format in question */
1296         print_texture_format(texture->format);
1297
1298         /* Instruction "modifiers" parallel the ALU instructions. */
1299
1300         if (texture->shadow)
1301                 printf(".shadow");
1302
1303         if (texture->cont)
1304                 printf(".cont");
1305
1306         if (texture->last)
1307                 printf(".last");
1308
1309         /* Output modifiers are always interpreted floatly */
1310         print_outmod(texture->outmod, false);
1311
1312         printf(" %sr%d", texture->out_full ? "" : "h",
1313                         out_reg_base + texture->out_reg_select);
1314         print_mask_4(texture->mask, texture->out_upper);
1315         assert(!(texture->out_full && texture->out_upper));
1316         printf(", ");
1317
1318         /* Depending on whether we read from textures directly or indirectly,
1319          * we may be able to update our analysis */
1320
1321         if (texture->texture_register) {
1322                 printf("texture[");
1323                 print_texture_reg_select(texture->texture_handle, in_reg_base);
1324                 printf("], ");
1325
1326                 /* Indirect, tut tut */
1327                 midg_stats.texture_count = -16;
1328         } else {
1329                 printf("texture%u, ", texture->texture_handle);
1330                 update_stats(&midg_stats.texture_count, texture->texture_handle);
1331         }
1332
1333         /* Print the type, GL style */
1334         printf("%csampler", sampler_type_name(texture->sampler_type));
1335
1336         if (texture->sampler_register) {
1337                 printf("[");
1338                 print_texture_reg_select(texture->sampler_handle, in_reg_base);
1339                 printf("]");
1340
1341                 midg_stats.sampler_count = -16;
1342         } else {
1343                 printf("%u", texture->sampler_handle);
1344                 update_stats(&midg_stats.sampler_count, texture->sampler_handle);
1345         }
1346
1347         print_swizzle_vec4(texture->swizzle, false, false);
1348         printf(", %sr%d", texture->in_reg_full ? "" : "h", in_reg_base + texture->in_reg_select);
1349         assert(!(texture->in_reg_full && texture->in_reg_upper));
1350
1351         /* TODO: integrate with swizzle */
1352         if (texture->in_reg_upper)
1353                 printf("'");
1354
1355         print_swizzle_vec4(texture->in_reg_swizzle, false, false);
1356
1357         /* There is *always* an offset attached. Of
1358          * course, that offset is just immediate #0 for a
1359          * GLES call that doesn't take an offset. If there
1360          * is a non-negative non-zero offset, this is
1361          * specified in immediate offset mode, with the
1362          * values in the offset_* fields as immediates. If
1363          * this is a negative offset, we instead switch to
1364          * a register offset mode, where the offset_*
1365          * fields become register triplets */
1366
1367         if (texture->offset_register) {
1368                 printf(" + ");
1369
1370                 bool full = texture->offset_x & 1;
1371                 bool select = texture->offset_x & 2;
1372                 bool upper = texture->offset_x & 4;
1373
1374                 printf("%sr%d", full ? "" : "h", in_reg_base + select);
1375                 assert(!(texture->out_full && texture->out_upper));
1376
1377                 /* TODO: integrate with swizzle */
1378                 if (upper)
1379                         printf("'");
1380
1381                 /* The less questions you ask, the better. */
1382
1383                 unsigned swizzle_lo, swizzle_hi;
1384                 unsigned orig_y = texture->offset_y;
1385                 unsigned orig_z = texture->offset_z;
1386
1387                 memcpy(&swizzle_lo, &orig_y, sizeof(unsigned));
1388                 memcpy(&swizzle_hi, &orig_z, sizeof(unsigned));
1389
1390                 /* Duplicate hi swizzle over */
1391                 assert(swizzle_hi < 4);
1392                 swizzle_hi = (swizzle_hi << 2) | swizzle_hi;
1393
1394                 unsigned swiz = (swizzle_lo << 4) | swizzle_hi;
1395                 unsigned reversed = util_bitreverse(swiz) >> 24;
1396                 print_swizzle_vec4(reversed, false, false);
1397
1398                 printf(", ");
1399         } else if (texture->offset_x || texture->offset_y || texture->offset_z) {
1400                 /* Only select ops allow negative immediate offsets, verify */
1401
1402                 bool neg_x = texture->offset_x < 0;
1403                 bool neg_y = texture->offset_y < 0;
1404                 bool neg_z = texture->offset_z < 0;
1405                 bool any_neg = neg_x || neg_y || neg_z;
1406
1407                 if (any_neg && texture->op != TEXTURE_OP_TEXEL_FETCH)
1408                         printf("/* invalid negative */ ");
1409
1410                 /* Regardless, just print the immediate offset */
1411
1412                 printf(" + <%d, %d, %d>, ",
1413                        texture->offset_x,
1414                        texture->offset_y,
1415                        texture->offset_z);
1416         } else {
1417                 printf(", ");
1418         }
1419
1420         char lod_operand = texture_op_takes_bias(texture->op) ? '+' : '=';
1421
1422         if (texture->lod_register) {
1423                 printf("lod %c ", lod_operand);
1424                 print_texture_reg_select(texture->bias, in_reg_base);
1425                 printf(", ");
1426
1427                 if (texture->bias_int)
1428                         printf(" /* bias_int = 0x%X */", texture->bias_int);
1429         } else if (texture->op == TEXTURE_OP_TEXEL_FETCH) {
1430                 /* For texel fetch, the int LOD is in the fractional place and
1431                  * there is no fraction / possibility of bias. We *always* have
1432                  * an explicit LOD, even if it's zero. */
1433
1434                 if (texture->bias_int)
1435                         printf(" /* bias_int = 0x%X */ ", texture->bias_int);
1436
1437                 printf("lod = %u, ", texture->bias);
1438         } else if (texture->bias || texture->bias_int) {
1439                 signed bias_int = texture->bias_int;
1440                 float bias_frac = texture->bias / 256.0f;
1441                 float bias = bias_int + bias_frac;
1442
1443                 bool is_bias = texture_op_takes_bias(texture->op);
1444                 char sign = (bias >= 0.0) ? '+' : '-';
1445                 char operand = is_bias ? sign : '=';
1446
1447                 printf("lod %c %f, ", operand, fabsf(bias));
1448         }
1449
1450         printf("\n");
1451
1452         /* While not zero in general, for these simple instructions the
1453          * following unknowns are zero, so we don't include them */
1454
1455         if (texture->unknown4 ||
1456             texture->unknownA ||
1457             texture->unknown8) {
1458                 printf("// unknown4 = 0x%x\n", texture->unknown4);
1459                 printf("// unknownA = 0x%x\n", texture->unknownA);
1460                 printf("// unknown8 = 0x%x\n", texture->unknown8);
1461         }
1462
1463         midg_stats.instruction_count++;
1464 }
1465
1466 struct midgard_disasm_stats
1467 disassemble_midgard(uint8_t *code, size_t size, unsigned gpu_id, gl_shader_stage stage)
1468 {
1469         uint32_t *words = (uint32_t *) code;
1470         unsigned num_words = size / 4;
1471         int tabs = 0;
1472
1473         bool prefetch_flag = false;
1474
1475         int last_next_tag = -1;
1476
1477         unsigned i = 0;
1478
1479         midg_tags = calloc(sizeof(midg_tags[0]), num_words);
1480
1481         /* Stats for shader-db */
1482         memset(&midg_stats, 0, sizeof(midg_stats));
1483         midg_ever_written = 0;
1484
1485         while (i < num_words) {
1486                 unsigned tag = words[i] & 0xF;
1487                 unsigned next_tag = (words[i] >> 4) & 0xF;
1488                 unsigned num_quad_words = midgard_word_size[tag];
1489
1490                 if (midg_tags[i] && midg_tags[i] != tag) {
1491                         printf("\t/* XXX: TAG ERROR branch, got ");
1492                         print_tag_short(tag);
1493                         printf(" expected ");
1494                         print_tag_short(midg_tags[i]);
1495                         printf(" */\n");
1496                 }
1497
1498                 midg_tags[i] = tag;
1499
1500                 /* Check the tag */
1501                 if (last_next_tag > 1) {
1502                         if (last_next_tag != tag) {
1503                                 printf("\t/* XXX: TAG ERROR sequence, got ");
1504                                 print_tag_short(tag);
1505                                 printf(" expected ");
1506                                 print_tag_short(last_next_tag);
1507                                 printf(" */\n");
1508                         }
1509                 } else {
1510                         /* TODO: Check ALU case */
1511                 }
1512
1513                 last_next_tag = next_tag;
1514
1515                 switch (midgard_word_types[tag]) {
1516                 case midgard_word_type_texture: {
1517                         /* Texturing uses ldst/work space on T720 */
1518                         bool has_texture_pipeline = gpu_id != 0x0720;
1519                         print_texture_word(&words[i], tabs,
1520                                         has_texture_pipeline ? REG_TEX_BASE : 0,
1521                                         has_texture_pipeline ? REG_TEX_BASE : REGISTER_LDST_BASE);
1522                         break;
1523                 }
1524
1525                 case midgard_word_type_load_store:
1526                         print_load_store_word(&words[i], tabs);
1527                         break;
1528
1529                 case midgard_word_type_alu:
1530                         print_alu_word(&words[i], num_quad_words, tabs, i + 4*num_quad_words);
1531
1532                         /* Reset word static analysis state */
1533                         is_embedded_constant_half = false;
1534                         is_embedded_constant_int = false;
1535
1536                         break;
1537
1538                 default:
1539                         printf("Unknown word type %u:\n", words[i] & 0xF);
1540                         num_quad_words = 1;
1541                         print_quad_word(&words[i], tabs);
1542                         printf("\n");
1543                         break;
1544                 }
1545
1546                 if (prefetch_flag && midgard_word_types[tag] == midgard_word_type_alu)
1547                         break;
1548
1549                 printf("\n");
1550
1551                 unsigned next = (words[i] & 0xF0) >> 4;
1552
1553                 /* We are parsing per bundle anyway */
1554                 midg_stats.bundle_count++;
1555                 midg_stats.quadword_count += num_quad_words;
1556
1557                 /* Break based on instruction prefetch flag */
1558
1559                 if (i < num_words && next == 1) {
1560                         prefetch_flag = true;
1561
1562                         if (midgard_word_types[words[i] & 0xF] != midgard_word_type_alu)
1563                                 break;
1564                 }
1565
1566                 i += 4 * num_quad_words;
1567         }
1568
1569         /* We computed work_count as max_work_registers, so add one to get the
1570          * count. If no work registers are written, you still have one work
1571          * reported, which is exactly what the hardware expects */
1572
1573         midg_stats.work_count++;
1574
1575         return midg_stats;
1576 }