pan/decode: Hoist shader-db stats to shared decode
[mesa.git] / src / panfrost / midgard / disassemble.c
1 /* Author(s):
2 * Connor Abbott
3 * Alyssa Rosenzweig
4 *
5 * Copyright (c) 2013 Connor Abbott (connor@abbott.cx)
6 * Copyright (c) 2018 Alyssa Rosenzweig (alyssa@rosenzweig.io)
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
25 */
26
27 #include <stdio.h>
28 #include <stdint.h>
29 #include <assert.h>
30 #include <inttypes.h>
31 #include <ctype.h>
32 #include <string.h>
33 #include "midgard.h"
34 #include "midgard-parse.h"
35 #include "midgard_ops.h"
36 #include "disassemble.h"
37 #include "helpers.h"
38 #include "util/half_float.h"
39 #include "util/u_math.h"
40
41 #define DEFINE_CASE(define, str) case define: { printf(str); break; }
42
43 static bool is_instruction_int = false;
44
45 /* Stats */
46
47 static struct midgard_disasm_stats midg_stats;
48
49 /* Prints a short form of the tag for branching, the minimum needed to be
50 * legible and unambiguous */
51
52 static void
53 print_tag_short(unsigned tag)
54 {
55 switch (midgard_word_types[tag]) {
56 case midgard_word_type_texture:
57 printf("tex/%X", tag);
58 break;
59
60 case midgard_word_type_load_store:
61 printf("ldst");
62 break;
63
64 case midgard_word_type_alu:
65 printf("alu%d/%X", midgard_word_size[tag], tag);
66 break;
67
68 default:
69 printf("%s%X", (tag > 0) ? "" : "unk", tag);
70 break;
71 }
72 }
73
74 static void
75 print_alu_opcode(midgard_alu_op op)
76 {
77 bool int_op = false;
78
79 if (alu_opcode_props[op].name) {
80 printf("%s", alu_opcode_props[op].name);
81
82 int_op = midgard_is_integer_op(op);
83 } else
84 printf("alu_op_%02X", op);
85
86 /* For constant analysis */
87 is_instruction_int = int_op;
88 }
89
90 static void
91 print_ld_st_opcode(midgard_load_store_op op)
92 {
93 if (load_store_opcode_names[op])
94 printf("%s", load_store_opcode_names[op]);
95 else
96 printf("ldst_op_%02X", op);
97 }
98
99 static bool is_embedded_constant_half = false;
100 static bool is_embedded_constant_int = false;
101
102 static char
103 prefix_for_bits(unsigned bits)
104 {
105 switch (bits) {
106 case 8:
107 return 'q';
108 case 16:
109 return 'h';
110 case 64:
111 return 'd';
112 default:
113 return 0;
114 }
115 }
116
117 static void
118 print_reg(unsigned reg, unsigned bits)
119 {
120 /* Perform basic static analysis for expanding constants correctly */
121
122 if (reg == 26) {
123 is_embedded_constant_int = is_instruction_int;
124 is_embedded_constant_half = (bits < 32);
125 }
126
127 char prefix = prefix_for_bits(bits);
128
129 if (prefix)
130 putchar(prefix);
131
132 printf("r%u", reg);
133 }
134
135 static char *outmod_names_float[4] = {
136 "",
137 ".pos",
138 ".unk2",
139 ".sat"
140 };
141
142 static char *outmod_names_int[4] = {
143 ".isat",
144 ".usat",
145 "",
146 ".hi"
147 };
148
149 static char *srcmod_names_int[4] = {
150 "sext(",
151 "zext(",
152 "",
153 "("
154 };
155
156 static void
157 print_outmod(unsigned outmod, bool is_int)
158 {
159 printf("%s", is_int ? outmod_names_int[outmod] :
160 outmod_names_float[outmod]);
161 }
162
163 static void
164 print_quad_word(uint32_t *words, unsigned tabs)
165 {
166 unsigned i;
167
168 for (i = 0; i < 4; i++)
169 printf("0x%08X%s ", words[i], i == 3 ? "" : ",");
170
171 printf("\n");
172 }
173
174 static const char components[16] = "xyzwefghijklmnop";
175
176 /* Helper to print 4 chars of a swizzle */
177 static void
178 print_swizzle_helper(unsigned swizzle, bool upper)
179 {
180 for (unsigned i = 0; i < 4; ++i) {
181 unsigned c = (swizzle >> (i * 2)) & 3;
182 c += upper*4;
183 printf("%c", components[c]);
184 }
185 }
186
187 /* Helper to print 8 chars of a swizzle, duplicating over */
188 static void
189 print_swizzle_helper_8(unsigned swizzle, bool upper)
190 {
191 for (unsigned i = 0; i < 4; ++i) {
192 unsigned c = (swizzle >> (i * 2)) & 3;
193 c *= 2;
194 c += upper*8;
195 printf("%c%c", components[c], components[c+1]);
196 }
197 }
198
199 static void
200 print_swizzle_vec16(unsigned swizzle, bool rep_high, bool rep_low,
201 midgard_dest_override override)
202 {
203 printf(".");
204
205 if (override == midgard_dest_override_upper) {
206 if (rep_high)
207 printf(" /* rep_high */ ");
208 if (rep_low)
209 printf(" /* rep_low */ ");
210
211 if (!rep_high && rep_low)
212 print_swizzle_helper_8(swizzle, true);
213 else
214 print_swizzle_helper_8(swizzle, false);
215 } else {
216 print_swizzle_helper_8(swizzle, rep_high & 1);
217 print_swizzle_helper_8(swizzle, !rep_low & 1);
218 }
219 }
220
221 static void
222 print_swizzle_vec8(unsigned swizzle, bool rep_high, bool rep_low)
223 {
224 printf(".");
225
226 print_swizzle_helper(swizzle, rep_high & 1);
227 print_swizzle_helper(swizzle, !rep_low & 1);
228 }
229
230 static void
231 print_swizzle_vec4(unsigned swizzle, bool rep_high, bool rep_low)
232 {
233 if (rep_high)
234 printf(" /* rep_high */ ");
235 if (rep_low)
236 printf(" /* rep_low */ ");
237
238 if (swizzle == 0xE4) return; /* xyzw */
239
240 printf(".");
241 print_swizzle_helper(swizzle, 0);
242 }
243 static void
244 print_swizzle_vec2(unsigned swizzle, bool rep_high, bool rep_low)
245 {
246 if (rep_high)
247 printf(" /* rep_high */ ");
248 if (rep_low)
249 printf(" /* rep_low */ ");
250
251 if (swizzle == 0xE4) return; /* XY */
252
253 printf(".");
254
255 for (unsigned i = 0; i < 4; i += 2) {
256 unsigned a = (swizzle >> (i * 2)) & 3;
257 unsigned b = (swizzle >> ((i+1) * 2)) & 3;
258
259 /* Normally we're adjacent, but if there's an issue, don't make
260 * it ambiguous */
261
262 if (a & 0x1)
263 printf("[%c%c]", components[a], components[b]);
264 else if (a == b)
265 printf("%c", components[a >> 1]);
266 else if (b == (a + 1))
267 printf("%c", "XY"[a >> 1]);
268 else
269 printf("[%c%c]", components[a], components[b]);
270 }
271 }
272
273 static int
274 bits_for_mode(midgard_reg_mode mode)
275 {
276 switch (mode) {
277 case midgard_reg_mode_8:
278 return 8;
279 case midgard_reg_mode_16:
280 return 16;
281 case midgard_reg_mode_32:
282 return 32;
283 case midgard_reg_mode_64:
284 return 64;
285 default:
286 unreachable("Invalid reg mode");
287 return 0;
288 }
289 }
290
291 static int
292 bits_for_mode_halved(midgard_reg_mode mode, bool half)
293 {
294 unsigned bits = bits_for_mode(mode);
295
296 if (half)
297 bits >>= 1;
298
299 return bits;
300 }
301
302 static void
303 print_vector_src(unsigned src_binary,
304 midgard_reg_mode mode, unsigned reg,
305 midgard_dest_override override, bool is_int)
306 {
307 midgard_vector_alu_src *src = (midgard_vector_alu_src *)&src_binary;
308
309 /* Modifiers change meaning depending on the op's context */
310
311 midgard_int_mod int_mod = src->mod;
312
313 if (is_int) {
314 printf("%s", srcmod_names_int[int_mod]);
315 } else {
316 if (src->mod & MIDGARD_FLOAT_MOD_NEG)
317 printf("-");
318
319 if (src->mod & MIDGARD_FLOAT_MOD_ABS)
320 printf("abs(");
321 }
322
323 //register
324 unsigned bits = bits_for_mode_halved(mode, src->half);
325 print_reg(reg, bits);
326
327 //swizzle
328 if (bits == 16)
329 print_swizzle_vec8(src->swizzle, src->rep_high, src->rep_low);
330 else if (bits == 8)
331 print_swizzle_vec16(src->swizzle, src->rep_high, src->rep_low, override);
332 else if (bits == 32)
333 print_swizzle_vec4(src->swizzle, src->rep_high, src->rep_low);
334 else if (bits == 64)
335 print_swizzle_vec2(src->swizzle, src->rep_high, src->rep_low);
336
337 /* Since we wrapped with a function-looking thing */
338
339 if (is_int && int_mod == midgard_int_shift)
340 printf(") << %d", bits);
341 else if ((is_int && (int_mod != midgard_int_normal))
342 || (!is_int && src->mod & MIDGARD_FLOAT_MOD_ABS))
343 printf(")");
344 }
345
346 static uint16_t
347 decode_vector_imm(unsigned src2_reg, unsigned imm)
348 {
349 uint16_t ret;
350 ret = src2_reg << 11;
351 ret |= (imm & 0x7) << 8;
352 ret |= (imm >> 3) & 0xFF;
353 return ret;
354 }
355
356 static void
357 print_immediate(uint16_t imm)
358 {
359 if (is_instruction_int)
360 printf("#%d", imm);
361 else
362 printf("#%g", _mesa_half_to_float(imm));
363 }
364
365 static unsigned
366 print_dest(unsigned reg, midgard_reg_mode mode, midgard_dest_override override)
367 {
368 /* Depending on the mode and override, we determine the type of
369 * destination addressed. Absent an override, we address just the
370 * type of the operation itself */
371
372 unsigned bits = bits_for_mode(mode);
373
374 if (override != midgard_dest_override_none)
375 bits /= 2;
376
377 print_reg(reg, bits);
378
379 return bits;
380 }
381
382 static void
383 print_mask_vec16(uint8_t mask, midgard_dest_override override)
384 {
385 printf(".");
386
387 if (override == midgard_dest_override_none) {
388 for (unsigned i = 0; i < 8; i++) {
389 if (mask & (1 << i))
390 printf("%c%c",
391 components[i*2 + 0],
392 components[i*2 + 1]);
393 }
394 } else {
395 bool upper = (override == midgard_dest_override_upper);
396
397 for (unsigned i = 0; i < 8; i++) {
398 if (mask & (1 << i))
399 printf("%c", components[i + (upper ? 8 : 0)]);
400 }
401 }
402 }
403
404 /* For 16-bit+ masks, we read off from the 8-bit mask field. For 16-bit (vec8),
405 * it's just one bit per channel, easy peasy. For 32-bit (vec4), it's one bit
406 * per channel with one duplicate bit in the middle. For 64-bit (vec2), it's
407 * one-bit per channel with _3_ duplicate bits in the middle. Basically, just
408 * subdividing the 128-bit word in 16-bit increments. For 64-bit, we uppercase
409 * the mask to make it obvious what happened */
410
411 static void
412 print_mask(uint8_t mask, unsigned bits, midgard_dest_override override)
413 {
414 if (bits == 8) {
415 print_mask_vec16(mask, override);
416 return;
417 }
418
419 if (bits < 16) {
420 /* Shouldn't happen but with junk / out-of-spec shaders it
421 * would cause an infinite loop */
422
423 printf("/* XXX: bits = %d */", bits);
424 return;
425 }
426
427 /* Skip 'complete' masks */
428
429 if (bits >= 32 && mask == 0xFF) return;
430
431 if (bits == 16) {
432 if (mask == 0x0F)
433 return;
434 else if (mask == 0xF0) {
435 printf("'");
436 return;
437 }
438 }
439
440 printf(".");
441
442 unsigned skip = (bits / 16);
443 bool uppercase = bits > 32;
444 bool tripped = false;
445
446 for (unsigned i = 0; i < 8; i += skip) {
447 bool a = (mask & (1 << i)) != 0;
448
449 for (unsigned j = 1; j < skip; ++j) {
450 bool dupe = (mask & (1 << (i + j))) != 0;
451 tripped |= (dupe != a);
452 }
453
454 if (a) {
455 char c = components[i / skip];
456
457 if (uppercase)
458 c = toupper(c);
459
460 printf("%c", c);
461 }
462 }
463
464 if (tripped)
465 printf(" /* %X */", mask);
466 }
467
468 /* Prints the 4-bit masks found in texture and load/store ops, as opposed to
469 * the 8-bit masks found in (vector) ALU ops */
470
471 static void
472 print_mask_4(unsigned mask)
473 {
474 if (mask == 0xF) return;
475
476 printf(".");
477
478 for (unsigned i = 0; i < 4; ++i) {
479 bool a = (mask & (1 << i)) != 0;
480 if (a)
481 printf("%c", components[i]);
482 }
483 }
484
485 static void
486 print_vector_field(const char *name, uint16_t *words, uint16_t reg_word,
487 unsigned tabs)
488 {
489 midgard_reg_info *reg_info = (midgard_reg_info *)&reg_word;
490 midgard_vector_alu *alu_field = (midgard_vector_alu *) words;
491 midgard_reg_mode mode = alu_field->reg_mode;
492 unsigned override = alu_field->dest_override;
493
494 /* For now, prefix instruction names with their unit, until we
495 * understand how this works on a deeper level */
496 printf("%s.", name);
497
498 print_alu_opcode(alu_field->op);
499
500 /* Postfix with the size to disambiguate if necessary */
501 char postfix = prefix_for_bits(bits_for_mode(mode));
502 bool size_ambiguous = override != midgard_dest_override_none;
503
504 if (size_ambiguous)
505 printf("%c", postfix ? postfix : 'r');
506
507 /* Print the outmod, if there is one */
508 print_outmod(alu_field->outmod,
509 midgard_is_integer_out_op(alu_field->op));
510
511 printf(" ");
512
513 /* Mask denoting status of 8-lanes */
514 uint8_t mask = alu_field->mask;
515
516 /* First, print the destination */
517 unsigned dest_size =
518 print_dest(reg_info->out_reg, mode, alu_field->dest_override);
519
520 /* Apply the destination override to the mask */
521
522 if (mode == midgard_reg_mode_32 || mode == midgard_reg_mode_64) {
523 if (override == midgard_dest_override_lower)
524 mask &= 0x0F;
525 else if (override == midgard_dest_override_upper)
526 mask &= 0xF0;
527 } else if (mode == midgard_reg_mode_16
528 && override == midgard_dest_override_lower) {
529 /* stub */
530 }
531
532 if (override != midgard_dest_override_none) {
533 bool modeable = (mode != midgard_reg_mode_8);
534 bool known = override != 0x3; /* Unused value */
535
536 if (!(modeable && known))
537 printf("/* do%d */ ", override);
538 }
539
540 print_mask(mask, dest_size, override);
541
542 printf(", ");
543
544 bool is_int = midgard_is_integer_op(alu_field->op);
545 print_vector_src(alu_field->src1, mode, reg_info->src1_reg, override, is_int);
546
547 printf(", ");
548
549 if (reg_info->src2_imm) {
550 uint16_t imm = decode_vector_imm(reg_info->src2_reg, alu_field->src2 >> 2);
551 print_immediate(imm);
552 } else {
553 print_vector_src(alu_field->src2, mode,
554 reg_info->src2_reg, override, is_int);
555 }
556
557 midg_stats.instruction_count++;
558 printf("\n");
559 }
560
561 static void
562 print_scalar_src(unsigned src_binary, unsigned reg)
563 {
564 midgard_scalar_alu_src *src = (midgard_scalar_alu_src *)&src_binary;
565
566 if (src->negate)
567 printf("-");
568
569 if (src->abs)
570 printf("abs(");
571
572 print_reg(reg, src->full ? 32 : 16);
573
574 unsigned c = src->component;
575
576 if (src->full) {
577 assert((c & 1) == 0);
578 c >>= 1;
579 }
580
581 printf(".%c", components[c]);
582
583 if (src->abs)
584 printf(")");
585
586 }
587
588 static uint16_t
589 decode_scalar_imm(unsigned src2_reg, unsigned imm)
590 {
591 uint16_t ret;
592 ret = src2_reg << 11;
593 ret |= (imm & 3) << 9;
594 ret |= (imm & 4) << 6;
595 ret |= (imm & 0x38) << 2;
596 ret |= imm >> 6;
597 return ret;
598 }
599
600 static void
601 print_scalar_field(const char *name, uint16_t *words, uint16_t reg_word,
602 unsigned tabs)
603 {
604 midgard_reg_info *reg_info = (midgard_reg_info *)&reg_word;
605 midgard_scalar_alu *alu_field = (midgard_scalar_alu *) words;
606
607 if (alu_field->unknown)
608 printf("scalar ALU unknown bit set\n");
609
610 printf("%s.", name);
611 print_alu_opcode(alu_field->op);
612 print_outmod(alu_field->outmod,
613 midgard_is_integer_out_op(alu_field->op));
614 printf(" ");
615
616 bool full = alu_field->output_full;
617 print_reg(reg_info->out_reg, full ? 32 : 16);
618 unsigned c = alu_field->output_component;
619
620 if (full) {
621 assert((c & 1) == 0);
622 c >>= 1;
623 }
624
625 printf(".%c, ", components[c]);
626
627 print_scalar_src(alu_field->src1, reg_info->src1_reg);
628
629 printf(", ");
630
631 if (reg_info->src2_imm) {
632 uint16_t imm = decode_scalar_imm(reg_info->src2_reg,
633 alu_field->src2);
634 print_immediate(imm);
635 } else
636 print_scalar_src(alu_field->src2, reg_info->src2_reg);
637
638 midg_stats.instruction_count++;
639 printf("\n");
640 }
641
642 static void
643 print_branch_op(int op)
644 {
645 switch (op) {
646 case midgard_jmp_writeout_op_branch_uncond:
647 printf("uncond.");
648 break;
649
650 case midgard_jmp_writeout_op_branch_cond:
651 printf("cond.");
652 break;
653
654 case midgard_jmp_writeout_op_writeout:
655 printf("write.");
656 break;
657
658 case midgard_jmp_writeout_op_tilebuffer_pending:
659 printf("tilebuffer.");
660 break;
661
662 case midgard_jmp_writeout_op_discard:
663 printf("discard.");
664 break;
665
666 default:
667 printf("unk%d.", op);
668 break;
669 }
670 }
671
672 static void
673 print_branch_cond(int cond)
674 {
675 switch (cond) {
676 case midgard_condition_write0:
677 printf("write0");
678 break;
679
680 case midgard_condition_false:
681 printf("false");
682 break;
683
684 case midgard_condition_true:
685 printf("true");
686 break;
687
688 case midgard_condition_always:
689 printf("always");
690 break;
691
692 default:
693 printf("unk%X", cond);
694 break;
695 }
696 }
697
698 static void
699 print_compact_branch_writeout_field(uint16_t word)
700 {
701 midgard_jmp_writeout_op op = word & 0x7;
702
703 switch (op) {
704 case midgard_jmp_writeout_op_branch_uncond: {
705 midgard_branch_uncond br_uncond;
706 memcpy((char *) &br_uncond, (char *) &word, sizeof(br_uncond));
707 printf("br.uncond ");
708
709 if (br_uncond.unknown != 1)
710 printf("unknown:%d, ", br_uncond.unknown);
711
712 if (br_uncond.offset >= 0)
713 printf("+");
714
715 printf("%d -> ", br_uncond.offset);
716 print_tag_short(br_uncond.dest_tag);
717 printf("\n");
718
719 break;
720 }
721
722 case midgard_jmp_writeout_op_branch_cond:
723 case midgard_jmp_writeout_op_writeout:
724 case midgard_jmp_writeout_op_discard:
725 default: {
726 midgard_branch_cond br_cond;
727 memcpy((char *) &br_cond, (char *) &word, sizeof(br_cond));
728
729 printf("br.");
730
731 print_branch_op(br_cond.op);
732 print_branch_cond(br_cond.cond);
733
734 printf(" ");
735
736 if (br_cond.offset >= 0)
737 printf("+");
738
739 printf("%d -> ", br_cond.offset);
740 print_tag_short(br_cond.dest_tag);
741 printf("\n");
742
743 break;
744 }
745 }
746
747 midg_stats.instruction_count++;
748 }
749
750 static void
751 print_extended_branch_writeout_field(uint8_t *words)
752 {
753 midgard_branch_extended br;
754 memcpy((char *) &br, (char *) words, sizeof(br));
755
756 printf("brx.");
757
758 print_branch_op(br.op);
759
760 /* Condition codes are a LUT in the general case, but simply repeated 8 times for single-channel conditions.. Check this. */
761
762 bool single_channel = true;
763
764 for (unsigned i = 0; i < 16; i += 2) {
765 single_channel &= (((br.cond >> i) & 0x3) == (br.cond & 0x3));
766 }
767
768 if (single_channel)
769 print_branch_cond(br.cond & 0x3);
770 else
771 printf("lut%X", br.cond);
772
773 if (br.unknown)
774 printf(".unknown%d", br.unknown);
775
776 printf(" ");
777
778 if (br.offset >= 0)
779 printf("+");
780
781 printf("%d -> ", br.offset);
782 print_tag_short(br.dest_tag);
783 printf("\n");
784
785 midg_stats.instruction_count++;
786 }
787
788 static unsigned
789 num_alu_fields_enabled(uint32_t control_word)
790 {
791 unsigned ret = 0;
792
793 if ((control_word >> 17) & 1)
794 ret++;
795
796 if ((control_word >> 19) & 1)
797 ret++;
798
799 if ((control_word >> 21) & 1)
800 ret++;
801
802 if ((control_word >> 23) & 1)
803 ret++;
804
805 if ((control_word >> 25) & 1)
806 ret++;
807
808 return ret;
809 }
810
811 static float
812 float_bitcast(uint32_t integer)
813 {
814 union {
815 uint32_t i;
816 float f;
817 } v;
818
819 v.i = integer;
820 return v.f;
821 }
822
823 static void
824 print_alu_word(uint32_t *words, unsigned num_quad_words,
825 unsigned tabs)
826 {
827 uint32_t control_word = words[0];
828 uint16_t *beginning_ptr = (uint16_t *)(words + 1);
829 unsigned num_fields = num_alu_fields_enabled(control_word);
830 uint16_t *word_ptr = beginning_ptr + num_fields;
831 unsigned num_words = 2 + num_fields;
832
833 if ((control_word >> 16) & 1)
834 printf("unknown bit 16 enabled\n");
835
836 if ((control_word >> 17) & 1) {
837 print_vector_field("vmul", word_ptr, *beginning_ptr, tabs);
838 beginning_ptr += 1;
839 word_ptr += 3;
840 num_words += 3;
841 }
842
843 if ((control_word >> 18) & 1)
844 printf("unknown bit 18 enabled\n");
845
846 if ((control_word >> 19) & 1) {
847 print_scalar_field("sadd", word_ptr, *beginning_ptr, tabs);
848 beginning_ptr += 1;
849 word_ptr += 2;
850 num_words += 2;
851 }
852
853 if ((control_word >> 20) & 1)
854 printf("unknown bit 20 enabled\n");
855
856 if ((control_word >> 21) & 1) {
857 print_vector_field("vadd", word_ptr, *beginning_ptr, tabs);
858 beginning_ptr += 1;
859 word_ptr += 3;
860 num_words += 3;
861 }
862
863 if ((control_word >> 22) & 1)
864 printf("unknown bit 22 enabled\n");
865
866 if ((control_word >> 23) & 1) {
867 print_scalar_field("smul", word_ptr, *beginning_ptr, tabs);
868 beginning_ptr += 1;
869 word_ptr += 2;
870 num_words += 2;
871 }
872
873 if ((control_word >> 24) & 1)
874 printf("unknown bit 24 enabled\n");
875
876 if ((control_word >> 25) & 1) {
877 print_vector_field("lut", word_ptr, *beginning_ptr, tabs);
878 beginning_ptr += 1;
879 word_ptr += 3;
880 num_words += 3;
881 }
882
883 if ((control_word >> 26) & 1) {
884 print_compact_branch_writeout_field(*word_ptr);
885 word_ptr += 1;
886 num_words += 1;
887 }
888
889 if ((control_word >> 27) & 1) {
890 print_extended_branch_writeout_field((uint8_t *) word_ptr);
891 word_ptr += 3;
892 num_words += 3;
893 }
894
895 if (num_quad_words > (num_words + 7) / 8) {
896 assert(num_quad_words == (num_words + 15) / 8);
897 //Assume that the extra quadword is constants
898 void *consts = words + (4 * num_quad_words - 4);
899
900 if (is_embedded_constant_int) {
901 if (is_embedded_constant_half) {
902 int16_t *sconsts = (int16_t *) consts;
903 printf("sconstants %d, %d, %d, %d\n",
904 sconsts[0],
905 sconsts[1],
906 sconsts[2],
907 sconsts[3]);
908 } else {
909 int32_t *iconsts = (int32_t *) consts;
910 printf("iconstants %d, %d, %d, %d\n",
911 iconsts[0],
912 iconsts[1],
913 iconsts[2],
914 iconsts[3]);
915 }
916 } else {
917 if (is_embedded_constant_half) {
918 uint16_t *hconsts = (uint16_t *) consts;
919 printf("hconstants %g, %g, %g, %g\n",
920 _mesa_half_to_float(hconsts[0]),
921 _mesa_half_to_float(hconsts[1]),
922 _mesa_half_to_float(hconsts[2]),
923 _mesa_half_to_float(hconsts[3]));
924 } else {
925 uint32_t *fconsts = (uint32_t *) consts;
926 printf("fconstants %g, %g, %g, %g\n",
927 float_bitcast(fconsts[0]),
928 float_bitcast(fconsts[1]),
929 float_bitcast(fconsts[2]),
930 float_bitcast(fconsts[3]));
931 }
932
933 }
934 }
935 }
936
937 static void
938 print_varying_parameters(midgard_load_store_word *word)
939 {
940 midgard_varying_parameter param;
941 unsigned v = word->varying_parameters;
942 memcpy(&param, &v, sizeof(param));
943
944 if (param.is_varying) {
945 /* If a varying, there are qualifiers */
946 if (param.flat)
947 printf(".flat");
948
949 if (param.interpolation != midgard_interp_default) {
950 if (param.interpolation == midgard_interp_centroid)
951 printf(".centroid");
952 else
953 printf(".interp%d", param.interpolation);
954 }
955
956 if (param.modifier != midgard_varying_mod_none) {
957 if (param.modifier == midgard_varying_mod_perspective_w)
958 printf(".perspectivew");
959 else if (param.modifier == midgard_varying_mod_perspective_z)
960 printf(".perspectivez");
961 else
962 printf(".mod%d", param.modifier);
963 }
964 } else if (param.flat || param.interpolation || param.modifier) {
965 printf(" /* is_varying not set but varying metadata attached */");
966 }
967
968 if (param.zero0 || param.zero1 || param.zero2)
969 printf(" /* zero tripped, %d %d %d */ ", param.zero0, param.zero1, param.zero2);
970 }
971
972 static bool
973 is_op_varying(unsigned op)
974 {
975 switch (op) {
976 case midgard_op_st_vary_16:
977 case midgard_op_st_vary_32:
978 case midgard_op_st_vary_32i:
979 case midgard_op_st_vary_32u:
980 case midgard_op_ld_vary_16:
981 case midgard_op_ld_vary_32:
982 case midgard_op_ld_vary_32i:
983 case midgard_op_ld_vary_32u:
984 return true;
985 }
986
987 return false;
988 }
989
990 static void
991 print_load_store_arg(uint8_t arg, unsigned index)
992 {
993 /* Try to interpret as a register */
994 midgard_ldst_register_select sel;
995 memcpy(&sel, &arg, sizeof(arg));
996
997 /* If unknown is set, we're not sure what this is or how to
998 * interpret it. But if it's zero, we get it. */
999
1000 if (sel.unknown) {
1001 printf("0x%02X", arg);
1002 return;
1003 }
1004
1005 unsigned reg = REGISTER_LDST_BASE + sel.select;
1006 char comp = components[sel.component];
1007
1008 printf("r%d.%c", reg, comp);
1009
1010 /* Only print a shift if it's non-zero. Shifts only make sense for the
1011 * second index. For the first, we're not sure what it means yet */
1012
1013 if (index == 1) {
1014 if (sel.shift)
1015 printf(" << %d", sel.shift);
1016 } else {
1017 printf(" /* %X */", sel.shift);
1018 }
1019 }
1020
1021 static void
1022 print_load_store_instr(uint64_t data,
1023 unsigned tabs)
1024 {
1025 midgard_load_store_word *word = (midgard_load_store_word *) &data;
1026
1027 print_ld_st_opcode(word->op);
1028
1029 if (is_op_varying(word->op))
1030 print_varying_parameters(word);
1031
1032 printf(" r%d", word->reg);
1033 print_mask_4(word->mask);
1034
1035 int address = word->address;
1036
1037 bool is_ubo = OP_IS_UBO_READ(word->op);
1038
1039 if (is_ubo) {
1040 /* UBOs use their own addressing scheme */
1041
1042 int lo = word->varying_parameters >> 7;
1043 int hi = word->address;
1044
1045 /* TODO: Combine fields logically */
1046 address = (hi << 3) | lo;
1047 }
1048
1049 printf(", %d", address);
1050
1051 print_swizzle_vec4(word->swizzle, false, false);
1052
1053 printf(", ");
1054
1055 if (is_ubo)
1056 printf("ubo%d", word->arg_1);
1057 else
1058 print_load_store_arg(word->arg_1, 0);
1059
1060 printf(", ");
1061 print_load_store_arg(word->arg_2, 1);
1062 printf(" /* %X */\n", word->varying_parameters);
1063
1064 midg_stats.instruction_count++;
1065 }
1066
1067 static void
1068 print_load_store_word(uint32_t *word, unsigned tabs)
1069 {
1070 midgard_load_store *load_store = (midgard_load_store *) word;
1071
1072 if (load_store->word1 != 3) {
1073 print_load_store_instr(load_store->word1, tabs);
1074 }
1075
1076 if (load_store->word2 != 3) {
1077 print_load_store_instr(load_store->word2, tabs);
1078 }
1079 }
1080
1081 static void
1082 print_texture_reg(bool full, bool select, bool upper)
1083 {
1084 if (full)
1085 printf("r%d", REG_TEX_BASE + select);
1086 else
1087 printf("hr%d", (REG_TEX_BASE + select) * 2 + upper);
1088
1089 if (full && upper)
1090 printf("// error: out full / upper mutually exclusive\n");
1091
1092 }
1093
1094 static void
1095 print_texture_reg_triple(unsigned triple)
1096 {
1097 bool full = triple & 1;
1098 bool select = triple & 2;
1099 bool upper = triple & 4;
1100
1101 print_texture_reg(full, select, upper);
1102 }
1103
1104 static void
1105 print_texture_reg_select(uint8_t u)
1106 {
1107 midgard_tex_register_select sel;
1108 memcpy(&sel, &u, sizeof(u));
1109
1110 if (!sel.full)
1111 printf("h");
1112
1113 printf("r%d", REG_TEX_BASE + sel.select);
1114
1115 unsigned component = sel.component;
1116
1117 /* Use the upper half in half-reg mode */
1118 if (sel.upper) {
1119 assert(!sel.full);
1120 component += 4;
1121 }
1122
1123 printf(".%c", components[component]);
1124
1125 assert(sel.zero == 0);
1126 }
1127
1128 static void
1129 print_texture_format(int format)
1130 {
1131 /* Act like a modifier */
1132 printf(".");
1133
1134 switch (format) {
1135 DEFINE_CASE(MALI_TEX_1D, "1d");
1136 DEFINE_CASE(MALI_TEX_2D, "2d");
1137 DEFINE_CASE(MALI_TEX_3D, "3d");
1138 DEFINE_CASE(MALI_TEX_CUBE, "cube");
1139
1140 default:
1141 unreachable("Bad format");
1142 }
1143 }
1144
1145 static void
1146 print_texture_op(unsigned op, bool gather)
1147 {
1148 /* Act like a bare name, like ESSL functions */
1149
1150 if (gather) {
1151 printf("textureGather");
1152
1153 unsigned component = op >> 4;
1154 unsigned bottom = op & 0xF;
1155
1156 if (bottom != 0x2)
1157 printf("_unk%d", bottom);
1158
1159 printf(".%c", components[component]);
1160 return;
1161 }
1162
1163 switch (op) {
1164 DEFINE_CASE(TEXTURE_OP_NORMAL, "texture");
1165 DEFINE_CASE(TEXTURE_OP_LOD, "textureLod");
1166 DEFINE_CASE(TEXTURE_OP_TEXEL_FETCH, "texelFetch");
1167 DEFINE_CASE(TEXTURE_OP_DFDX, "dFdx");
1168 DEFINE_CASE(TEXTURE_OP_DFDY, "dFdy");
1169
1170 default:
1171 printf("tex_%X", op);
1172 break;
1173 }
1174 }
1175
1176 static bool
1177 texture_op_takes_bias(unsigned op)
1178 {
1179 return op == TEXTURE_OP_NORMAL;
1180 }
1181
1182 static char
1183 sampler_type_name(enum mali_sampler_type t)
1184 {
1185 switch (t) {
1186 case MALI_SAMPLER_FLOAT:
1187 return 'f';
1188 case MALI_SAMPLER_UNSIGNED:
1189 return 'u';
1190 case MALI_SAMPLER_SIGNED:
1191 return 'i';
1192 default:
1193 return '?';
1194 }
1195
1196 }
1197
1198 #undef DEFINE_CASE
1199
1200 static void
1201 print_texture_word(uint32_t *word, unsigned tabs)
1202 {
1203 midgard_texture_word *texture = (midgard_texture_word *) word;
1204
1205 /* Broad category of texture operation in question */
1206 print_texture_op(texture->op, texture->is_gather);
1207
1208 /* Specific format in question */
1209 print_texture_format(texture->format);
1210
1211 /* Instruction "modifiers" parallel the ALU instructions. */
1212
1213 if (texture->shadow)
1214 printf(".shadow");
1215
1216 if (texture->cont)
1217 printf(".cont");
1218
1219 if (texture->last)
1220 printf(".last");
1221
1222 /* Output modifiers are always interpreted floatly */
1223 print_outmod(texture->outmod, false);
1224
1225 printf(" ");
1226
1227 print_texture_reg(texture->out_full, texture->out_reg_select, texture->out_upper);
1228 print_mask_4(texture->mask);
1229 printf(", ");
1230
1231 if (texture->texture_register) {
1232 printf("texture[");
1233 print_texture_reg_select(texture->texture_handle);
1234 printf("], ");
1235 } else {
1236 printf("texture%d, ", texture->texture_handle);
1237 }
1238
1239 /* Print the type, GL style */
1240 printf("%csampler", sampler_type_name(texture->sampler_type));
1241
1242 if (texture->sampler_register) {
1243 printf("[");
1244 print_texture_reg_select(texture->sampler_handle);
1245 printf("]");
1246 } else {
1247 printf("%d", texture->sampler_handle);
1248 }
1249
1250 print_swizzle_vec4(texture->swizzle, false, false);
1251 printf(", ");
1252
1253 print_texture_reg(texture->in_reg_full, texture->in_reg_select, texture->in_reg_upper);
1254 print_swizzle_vec4(texture->in_reg_swizzle, false, false);
1255
1256 /* There is *always* an offset attached. Of
1257 * course, that offset is just immediate #0 for a
1258 * GLES call that doesn't take an offset. If there
1259 * is a non-negative non-zero offset, this is
1260 * specified in immediate offset mode, with the
1261 * values in the offset_* fields as immediates. If
1262 * this is a negative offset, we instead switch to
1263 * a register offset mode, where the offset_*
1264 * fields become register triplets */
1265
1266 if (texture->offset_register) {
1267 printf(" + ");
1268 print_texture_reg_triple(texture->offset_x);
1269
1270 /* The less questions you ask, the better. */
1271
1272 unsigned swizzle_lo, swizzle_hi;
1273 unsigned orig_y = texture->offset_y;
1274 unsigned orig_z = texture->offset_z;
1275
1276 memcpy(&swizzle_lo, &orig_y, sizeof(unsigned));
1277 memcpy(&swizzle_hi, &orig_z, sizeof(unsigned));
1278
1279 /* Duplicate hi swizzle over */
1280 assert(swizzle_hi < 4);
1281 swizzle_hi = (swizzle_hi << 2) | swizzle_hi;
1282
1283 unsigned swiz = (swizzle_lo << 4) | swizzle_hi;
1284 unsigned reversed = util_bitreverse(swiz) >> 24;
1285 print_swizzle_vec4(reversed, false, false);
1286
1287 printf(", ");
1288 } else if (texture->offset_x || texture->offset_y || texture->offset_z) {
1289 /* Only select ops allow negative immediate offsets, verify */
1290
1291 bool neg_x = texture->offset_x < 0;
1292 bool neg_y = texture->offset_y < 0;
1293 bool neg_z = texture->offset_z < 0;
1294 bool any_neg = neg_x || neg_y || neg_z;
1295
1296 if (any_neg && texture->op != TEXTURE_OP_TEXEL_FETCH)
1297 printf("/* invalid negative */ ");
1298
1299 /* Regardless, just print the immediate offset */
1300
1301 printf(" + <%d, %d, %d>, ",
1302 texture->offset_x,
1303 texture->offset_y,
1304 texture->offset_z);
1305 } else {
1306 printf(", ");
1307 }
1308
1309 char lod_operand = texture_op_takes_bias(texture->op) ? '+' : '=';
1310
1311 if (texture->lod_register) {
1312 printf("lod %c ", lod_operand);
1313 print_texture_reg_select(texture->bias);
1314 printf(", ");
1315
1316 if (texture->bias_int)
1317 printf(" /* bias_int = 0x%X */", texture->bias_int);
1318 } else if (texture->op == TEXTURE_OP_TEXEL_FETCH) {
1319 /* For texel fetch, the int LOD is in the fractional place and
1320 * there is no fraction / possibility of bias. We *always* have
1321 * an explicit LOD, even if it's zero. */
1322
1323 if (texture->bias_int)
1324 printf(" /* bias_int = 0x%X */ ", texture->bias_int);
1325
1326 printf("lod = %d, ", texture->bias);
1327 } else if (texture->bias || texture->bias_int) {
1328 signed bias_int = texture->bias_int;
1329 float bias_frac = texture->bias / 256.0f;
1330 float bias = bias_int + bias_frac;
1331
1332 bool is_bias = texture_op_takes_bias(texture->op);
1333 char sign = (bias >= 0.0) ? '+' : '-';
1334 char operand = is_bias ? sign : '=';
1335
1336 printf("lod %c %f, ", operand, fabsf(bias));
1337 }
1338
1339 printf("\n");
1340
1341 /* While not zero in general, for these simple instructions the
1342 * following unknowns are zero, so we don't include them */
1343
1344 if (texture->unknown4 ||
1345 texture->unknownA ||
1346 texture->unknown8) {
1347 printf("// unknown4 = 0x%x\n", texture->unknown4);
1348 printf("// unknownA = 0x%x\n", texture->unknownA);
1349 printf("// unknown8 = 0x%x\n", texture->unknown8);
1350 }
1351
1352 midg_stats.instruction_count++;
1353 }
1354
1355 struct midgard_disasm_stats
1356 disassemble_midgard(uint8_t *code, size_t size)
1357 {
1358 uint32_t *words = (uint32_t *) code;
1359 unsigned num_words = size / 4;
1360 int tabs = 0;
1361
1362 bool prefetch_flag = false;
1363
1364 int last_next_tag = -1;
1365
1366 unsigned i = 0;
1367
1368 /* Stats for shader-db */
1369 memset(&midg_stats, 0, sizeof(midg_stats));
1370
1371 while (i < num_words) {
1372 unsigned tag = words[i] & 0xF;
1373 unsigned next_tag = (words[i] >> 4) & 0xF;
1374 unsigned num_quad_words = midgard_word_size[tag];
1375
1376 /* Check the tag */
1377 if (last_next_tag > 1) {
1378 if (last_next_tag != tag) {
1379 printf("/* TAG ERROR got ");
1380 print_tag_short(tag);
1381 printf(" expected ");
1382 print_tag_short(last_next_tag);
1383 printf(" */ ");
1384 }
1385 } else {
1386 /* TODO: Check ALU case */
1387 }
1388
1389 last_next_tag = next_tag;
1390
1391 switch (midgard_word_types[tag]) {
1392 case midgard_word_type_texture:
1393 print_texture_word(&words[i], tabs);
1394 break;
1395
1396 case midgard_word_type_load_store:
1397 print_load_store_word(&words[i], tabs);
1398 break;
1399
1400 case midgard_word_type_alu:
1401 print_alu_word(&words[i], num_quad_words, tabs);
1402
1403 /* Reset word static analysis state */
1404 is_embedded_constant_half = false;
1405 is_embedded_constant_int = false;
1406
1407 break;
1408
1409 default:
1410 printf("Unknown word type %u:\n", words[i] & 0xF);
1411 num_quad_words = 1;
1412 print_quad_word(&words[i], tabs);
1413 printf("\n");
1414 break;
1415 }
1416
1417 if (prefetch_flag && midgard_word_types[tag] == midgard_word_type_alu)
1418 break;
1419
1420 printf("\n");
1421
1422 unsigned next = (words[i] & 0xF0) >> 4;
1423
1424 /* We are parsing per bundle anyway */
1425 midg_stats.bundle_count++;
1426 midg_stats.quadword_count += num_quad_words;
1427
1428 /* Break based on instruction prefetch flag */
1429
1430 if (i < num_words && next == 1) {
1431 prefetch_flag = true;
1432
1433 if (midgard_word_types[words[i] & 0xF] != midgard_word_type_alu)
1434 break;
1435 }
1436
1437 i += 4 * num_quad_words;
1438 }
1439
1440 return midg_stats;
1441 }