pan/decode: Fix awkward syntax
[mesa.git] / src / panfrost / midgard / midgard_opt_copy_prop.c
1 /*
2 * Copyright (C) 2018 Alyssa Rosenzweig
3 * Copyright (C) 2019 Collabora, Ltd.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24
25 #include "compiler.h"
26 #include "midgard_ops.h"
27
28 /* Special case for copypropagating the results of vectors */
29
30 static bool
31 midgard_opt_copy_prop_reg(compiler_context *ctx, midgard_block *block)
32 {
33 bool progress = false;
34
35 mir_foreach_instr_in_block_safe(block, ins) {
36 if (ins->type != TAG_ALU_4) continue;
37 if (!OP_IS_MOVE(ins->op)) continue;
38 if (ins->is_pack) continue;
39
40 unsigned from = ins->src[1];
41 unsigned to = ins->dest;
42
43 if (!(to & PAN_IS_REG)) continue;
44 if (from & PAN_IS_REG) continue;
45
46 if (ins->has_inline_constant) continue;
47 if (ins->has_constants) continue;
48 if (mir_nontrivial_mod(ins, 1, true)) continue;
49 if (mir_nontrivial_outmod(ins)) continue;
50 if (!mir_single_use(ctx, from)) continue;
51
52 /* Ensure mask is continguous from 0 */
53 if (!(ins->mask & (1 << COMPONENT_X))) continue;
54 if (ins->mask & (ins->mask + 1)) continue;
55
56 mir_rewrite_index_dst(ctx, from, ins->dest);
57 mir_remove_instruction(ins);
58 progress |= true;
59 }
60
61 return progress;
62 }
63
64 bool
65 midgard_opt_copy_prop(compiler_context *ctx, midgard_block *block)
66 {
67 bool progress = false;
68
69 mir_foreach_instr_in_block_safe(block, ins) {
70 if (ins->type != TAG_ALU_4) continue;
71 if (!OP_IS_MOVE(ins->op)) continue;
72 if (ins->is_pack) continue;
73
74 unsigned from = ins->src[1];
75 unsigned to = ins->dest;
76
77 /* We only work on pure SSA */
78
79 if (to & PAN_IS_REG) continue;
80 if (from & PAN_IS_REG) continue;
81
82 /* Constant propagation is not handled here, either */
83 if (ins->has_inline_constant) continue;
84 if (ins->has_constants) continue;
85
86 /* Modifier propagation is not handled here */
87 if (mir_nontrivial_mod(ins, 1, false)) continue;
88 if (mir_nontrivial_outmod(ins)) continue;
89
90 /* Shortened arguments (bias for textures, extra load/store
91 * arguments, etc.) do not get a swizzle, only a start
92 * component and even that is restricted. Fragment writeout
93 * doesn't even get that much */
94
95 bool skip = false;
96
97 mir_foreach_instr_global(ctx, q) {
98 bool is_tex = q->type == TAG_TEXTURE_4;
99 bool is_ldst = q->type == TAG_LOAD_STORE_4;
100 bool is_branch = q->compact_branch;
101
102 if (!(is_tex || is_ldst || is_branch)) continue;
103
104 /* For textures, we get a real swizzle for the
105 * coordinate and the content. For stores, we get one.
106 * For loads, we get none. */
107
108 unsigned start =
109 is_tex ? 2 :
110 OP_IS_STORE(q->op) ? 1 : 0;
111
112 mir_foreach_src(q, s) {
113 if ((s >= start) && q->src[s] == to) {
114 skip = true;
115 break;
116 }
117 }
118 }
119
120 if (skip)
121 continue;
122
123 if (ctx->blend_src1 == to)
124 ctx->blend_src1 = from;
125
126 /* We're clear -- rewrite, composing the swizzle */
127 mir_rewrite_index_src_swizzle(ctx, to, from, ins->swizzle[1]);
128 mir_remove_instruction(ins);
129 progress |= true;
130 }
131
132 return progress | midgard_opt_copy_prop_reg(ctx, block);
133 }