src/panfrost/midgard/midgard_print.c

   1 /*
   2  * Copyright (C) 2018-2019 Alyssa Rosenzweig <alyssa@rosenzweig.io>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  */
  23
  24 #include <math.h>
  25
  26 #include "util/bitscan.h"
  27 #include "util/half_float.h"
  28 #include "compiler.h"
  29 #include "helpers.h"
  30 #include "midgard_ops.h"
  31
  32 /* Pretty printer for Midgard IR, for use debugging compiler-internal
  33  * passes like register allocation. The output superficially resembles
  34  * Midgard assembly, with the exception that unit information and such is
  35  * (normally) omitted, and generic indices are usually used instead of
  36  * registers */
  37
  38 static void
  39 mir_print_index(int source)
  40 {
  41         if (source == ~0) {
  42                 printf("_");
  43                 return;
  44         }
  45
  46         if (source >= SSA_FIXED_MINIMUM) {
  47                 /* Specific register */
  48                 int reg = SSA_REG_FROM_FIXED(source);
  49
  50                 /* TODO: Moving threshold */
  51                 if (reg > 16 && reg < 24)
  52                         printf("u%d", 23 - reg);
  53                 else
  54                         printf("r%d", reg);
  55         } else {
  56                 printf("%d", source);
  57         }
  58 }
  59
  60 static const char components[16] = "xyzwefghijklmnop";
  61
  62 static void
  63 mir_print_mask(unsigned mask)
  64 {
  65         printf(".");
  66
  67         for (unsigned i = 0; i < 16; ++i) {
  68                 if (mask & (1 << i))
  69                         putchar(components[i]);
  70         }
  71 }
  72
  73 static void
  74 mir_print_swizzle(unsigned *swizzle, nir_alu_type T)
  75 {
  76         unsigned comps = mir_components_for_type(T);
  77
  78         printf(".");
  79
  80         for (unsigned i = 0; i < comps; ++i) {
  81                 unsigned C = swizzle[i];
  82                 assert(C < comps);
  83                 putchar(components[C]);
  84         }
  85 }
  86
  87 static const char *
  88 mir_get_unit(unsigned unit)
  89 {
  90         switch (unit) {
  91         case ALU_ENAB_VEC_MUL:
  92                 return "vmul";
  93         case ALU_ENAB_SCAL_ADD:
  94                 return "sadd";
  95         case ALU_ENAB_VEC_ADD:
  96                 return "vadd";
  97         case ALU_ENAB_SCAL_MUL:
  98                 return "smul";
  99         case ALU_ENAB_VEC_LUT:
 100                 return "lut";
 101         case ALU_ENAB_BR_COMPACT:
 102                 return "br";
 103         case ALU_ENAB_BRANCH:
 104                 return "brx";
 105         default:
 106                 return "???";
 107         }
 108 }
 109
 110 static void
 111 mir_print_embedded_constant(midgard_instruction *ins, unsigned src_idx)
 112 {
 113         assert(src_idx <= 1);
 114
 115         unsigned base_size = max_bitsize_for_alu(ins);
 116         unsigned sz = nir_alu_type_get_type_size(ins->src_types[src_idx]);
 117         bool half = (sz == (base_size >> 1));
 118         unsigned mod = mir_pack_mod(ins, src_idx, false);
 119         unsigned *swizzle = ins->swizzle[src_idx];
 120         midgard_reg_mode reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins));
 121         unsigned comp_mask = effective_writemask(ins->op, ins->mask);
 122         unsigned num_comp = util_bitcount(comp_mask);
 123         unsigned max_comp = mir_components_for_type(ins->dest_type);
 124         bool first = true;
 125
 126         printf("#");
 127
 128         if (num_comp > 1)
 129                 printf("vec%d(", num_comp);
 130
 131         for (unsigned comp = 0; comp < max_comp; comp++) {
 132                 if (!(comp_mask & (1 << comp)))
 133                         continue;
 134
 135                 if (first)
 136                         first = false;
 137                 else
 138                         printf(", ");
 139
 140                 mir_print_constant_component(stdout, &ins->constants,
 141                                              swizzle[comp], reg_mode,
 142                                              half, mod, ins->op);
 143         }
 144
 145         if (num_comp > 1)
 146                 printf(")");
 147 }
 148
 149 #define PRINT_SRC(ins, c) \
 150         do { mir_print_index(ins->src[c]); \
 151              if (ins->src[c] != ~0 && ins->src_types[c] != nir_type_invalid) { \
 152                      pan_print_alu_type(ins->src_types[c], stdout); \
 153                      mir_print_swizzle(ins->swizzle[c], ins->src_types[c]); \
 154              } } while (0)
 155
 156 void
 157 mir_print_instruction(midgard_instruction *ins)
 158 {
 159         printf("\t");
 160
 161         if (midgard_is_branch_unit(ins->unit)) {
 162                 const char *branch_target_names[] = {
 163                         "goto", "break", "continue", "discard"
 164                 };
 165
 166                 printf("%s.", mir_get_unit(ins->unit));
 167                 if (ins->branch.target_type == TARGET_DISCARD)
 168                         printf("discard.");
 169                 else if (ins->writeout)
 170                         printf("write.");
 171                 else if (ins->unit == ALU_ENAB_BR_COMPACT &&
 172                          !ins->branch.conditional)
 173                         printf("uncond.");
 174                 else
 175                         printf("cond.");
 176
 177                 if (!ins->branch.conditional)
 178                         printf("always");
 179                 else if (ins->branch.invert_conditional)
 180                         printf("false");
 181                 else
 182                         printf("true");
 183
 184                 if (ins->writeout) {
 185                         printf(" (c: ");
 186                         PRINT_SRC(ins, 0);
 187                         printf(", z: ");
 188                         PRINT_SRC(ins, 2);
 189                         printf(", s: ");
 190                         PRINT_SRC(ins, 3);
 191                         printf(")");
 192                 }
 193
 194                 if (ins->branch.target_type != TARGET_DISCARD)
 195                         printf(" %s -> block(%d)\n",
 196                                ins->branch.target_type < 4 ?
 197                                        branch_target_names[ins->branch.target_type] : "??",
 198                                ins->branch.target_block);
 199
 200                 return;
 201         }
 202
 203         switch (ins->type) {
 204         case TAG_ALU_4: {
 205                 midgard_alu_op op = ins->op;
 206                 const char *name = alu_opcode_props[op].name;
 207
 208                 if (ins->unit)
 209                         printf("%s.", mir_get_unit(ins->unit));
 210
 211                 printf("%s", name ? name : "??");
 212                 break;
 213         }
 214
 215         case TAG_LOAD_STORE_4: {
 216                 midgard_load_store_op op = ins->op;
 217                 const char *name = load_store_opcode_props[op].name;
 218
 219                 assert(name);
 220                 printf("%s", name);
 221                 break;
 222         }
 223
 224         case TAG_TEXTURE_4: {
 225                 printf("texture");
 226
 227                 if (ins->helper_terminate)
 228                         printf(".terminate");
 229
 230                 if (ins->helper_execute)
 231                         printf(".execute");
 232
 233                 break;
 234         }
 235
 236         default:
 237                 assert(0);
 238         }
 239
 240         if (ins->compact_branch && ins->branch.invert_conditional)
 241                 printf(".not");
 242
 243         printf(" ");
 244         mir_print_index(ins->dest);
 245
 246         if (ins->dest != ~0) {
 247                 pan_print_alu_type(ins->dest_type, stdout);
 248                 mir_print_mask(ins->mask);
 249         }
 250
 251         printf(", ");
 252
 253         unsigned r_constant = SSA_FIXED_REGISTER(REGISTER_CONSTANT);
 254
 255         if (ins->src[0] == r_constant)
 256                 mir_print_embedded_constant(ins, 0);
 257         else
 258                 PRINT_SRC(ins, 0);
 259
 260         printf(", ");
 261
 262         if (ins->has_inline_constant)
 263                 printf("#%d", ins->inline_constant);
 264         else if (ins->src[1] == r_constant)
 265                 mir_print_embedded_constant(ins, 1);
 266         else
 267                 PRINT_SRC(ins, 1);
 268
 269         for (unsigned c = 2; c <= 3; ++c) {
 270                 printf(", ");
 271                 PRINT_SRC(ins, c);
 272         }
 273
 274         if (ins->no_spill)
 275                 printf(" /* no spill */");
 276
 277         printf("\n");
 278 }
 279
 280 /* Dumps MIR for a block or entire shader respective */
 281
 282 void
 283 mir_print_block(midgard_block *block)
 284 {
 285         printf("block%u: {\n", block->base.name);
 286
 287         if (block->scheduled) {
 288                 mir_foreach_bundle_in_block(block, bundle) {
 289                         for (unsigned i = 0; i < bundle->instruction_count; ++i)
 290                                 mir_print_instruction(bundle->instructions[i]);
 291
 292                         printf("\n");
 293                 }
 294         } else {
 295                 mir_foreach_instr_in_block(block, ins) {
 296                         mir_print_instruction(ins);
 297                 }
 298         }
 299
 300         printf("}");
 301
 302         if (block->base.successors[0]) {
 303                 printf(" -> ");
 304                 pan_foreach_successor((&block->base), succ)
 305                         printf(" block%u ", succ->name);
 306         }
 307
 308         printf(" from { ");
 309         mir_foreach_predecessor(block, pred)
 310                 printf("block%u ", pred->base.name);
 311         printf("}");
 312
 313         printf("\n\n");
 314 }
 315
 316 void
 317 mir_print_shader(compiler_context *ctx)
 318 {
 319         mir_foreach_block(ctx, block) {
 320                 mir_print_block((midgard_block *) block);
 321         }
 322 }