src/util/u_math.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2008 VMware, Inc.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29
  30 #include "pipe/p_config.h"
  31 #include "util/u_math.h"
  32 #include "x86/common_x86_features.h"
  33
  34 #if defined(PIPE_ARCH_SSE)
  35 #include <xmmintrin.h>
  36 /* This is defined in pmmintrin.h, but it can only be included when -msse3 is
  37  * used, so just define it here to avoid further. */
  38 #define _MM_DENORMALS_ZERO_MASK 0x0040
  39 #endif
  40
  41
  42 /** 2^x, for x in [-1.0, 1.0) */
  43 float pow2_table[POW2_TABLE_SIZE];
  44
  45
  46 static void
  47 init_pow2_table(void)
  48 {
  49    int i;
  50    for (i = 0; i < POW2_TABLE_SIZE; i++)
  51       pow2_table[i] = exp2f((i - POW2_TABLE_OFFSET) / POW2_TABLE_SCALE);
  52 }
  53
  54
  55 /** log2(x), for x in [1.0, 2.0) */
  56 float log2_table[LOG2_TABLE_SIZE];
  57
  58
  59 static void
  60 init_log2_table(void)
  61 {
  62    unsigned i;
  63    for (i = 0; i < LOG2_TABLE_SIZE; i++)
  64       log2_table[i] = (float) log2(1.0 + i * (1.0 / LOG2_TABLE_SCALE));
  65 }
  66
  67
  68 /**
  69  * One time init for math utilities.
  70  */
  71 void
  72 util_init_math(void)
  73 {
  74    static boolean initialized = FALSE;
  75    if (!initialized) {
  76       init_pow2_table();
  77       init_log2_table();
  78       initialized = TRUE;
  79    }
  80 }
  81
  82 /**
  83  * Fetches the contents of the fpstate (mxcsr on x86) register.
  84  *
  85  * On platforms without support for it just returns 0.
  86  */
  87 unsigned
  88 util_fpstate_get(void)
  89 {
  90    unsigned mxcsr = 0;
  91
  92 #if defined(PIPE_ARCH_SSE)
  93    if (cpu_has_xmm) {
  94       mxcsr = _mm_getcsr();
  95    }
  96 #endif
  97
  98    return mxcsr;
  99 }
 100
 101 /* TODO: this was copied from u_cpu_detection. It's another case of duplication
 102  * between gallium and core mesa, and it would be nice to get rid of that
 103  * duplication as well.
 104  */
 105 #if defined(PIPE_ARCH_X86)
 106 PIPE_ALIGN_STACK static inline bool sse2_has_daz(void)
 107 {
 108    struct {
 109       uint32_t pad1[7];
 110       uint32_t mxcsr_mask;
 111       uint32_t pad2[128-8];
 112    } PIPE_ALIGN_VAR(16) fxarea;
 113
 114    fxarea.mxcsr_mask = 0;
 115 #if defined(PIPE_CC_GCC)
 116    __asm __volatile ("fxsave %0" : "+m" (fxarea));
 117 #elif defined(PIPE_CC_MSVC) || defined(PIPE_CC_ICL)
 118    _fxsave(&fxarea);
 119 #else
 120    fxarea.mxcsr_mask = 0;
 121 #endif
 122    return !!(fxarea.mxcsr_mask & (1 << 6));
 123 }
 124 #endif
 125
 126 /**
 127  * Make sure that the fp treats the denormalized floating
 128  * point numbers as zero.
 129  *
 130  * This is the behavior required by D3D10. OpenGL doesn't care.
 131  */
 132 unsigned
 133 util_fpstate_set_denorms_to_zero(unsigned current_mxcsr)
 134 {
 135 #if defined(PIPE_ARCH_SSE)
 136    if (cpu_has_xmm) {
 137       /* Enable flush to zero mode */
 138       current_mxcsr |= _MM_FLUSH_ZERO_MASK;
 139       /* x86_64 cpus always have daz, as do cpus with sse3 in fact, there's
 140        * basically only a handful of very early pentium 4's that have sse2 but
 141        * not daz.
 142        */
 143 # if !defined(PIPE_ARCH_x86_64) && !defined(PIPE_ARCH_SSSE3)
 144       if (sse2_has_daz()) {
 145 # endif
 146          /* Enable denormals are zero mode */
 147          current_mxcsr |= _MM_DENORMALS_ZERO_MASK;
 148 # if !defined(PIPE_ARCH_x86_64) && !defined(PIPE_ARCH_SSSE3)
 149       }
 150 #endif
 151       util_fpstate_set(current_mxcsr);
 152    }
 153 #endif
 154    return current_mxcsr;
 155 }
 156
 157 /**
 158  * Set the state of the fpstate (mxcsr on x86) register.
 159  *
 160  * On platforms without support for it's a noop.
 161  */
 162 void
 163 util_fpstate_set(unsigned mxcsr)
 164 {
 165 #if defined(PIPE_ARCH_SSE)
 166    if (cpu_has_xmm) {
 167       _mm_setcsr(mxcsr);
 168    }
 169 #endif
 170 }