src/virtio/virtio-gpu/virgl_hw.h

   1 /*
   2  * Copyright 2014, 2015 Red Hat.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #ifndef VIRGL_HW_H
  24 #define VIRGL_HW_H
  25
  26 #include <stdint.h>
  27
  28 struct virgl_box {
  29         uint32_t x, y, z;
  30         uint32_t w, h, d;
  31 };
  32
  33 /* formats known by the HW device - based on gallium subset */
  34 enum virgl_formats {
  35    VIRGL_FORMAT_B8G8R8A8_UNORM          = 1,
  36    VIRGL_FORMAT_B8G8R8X8_UNORM          = 2,
  37    VIRGL_FORMAT_A8R8G8B8_UNORM          = 3,
  38    VIRGL_FORMAT_X8R8G8B8_UNORM          = 4,
  39    VIRGL_FORMAT_B5G5R5A1_UNORM          = 5,
  40    VIRGL_FORMAT_B4G4R4A4_UNORM          = 6,
  41    VIRGL_FORMAT_B5G6R5_UNORM            = 7,
  42    VIRGL_FORMAT_R10G10B10A2_UNORM       = 8,
  43    VIRGL_FORMAT_L8_UNORM                = 9,    /**< ubyte luminance */
  44    VIRGL_FORMAT_A8_UNORM                = 10,   /**< ubyte alpha */
  45    VIRGL_FORMAT_L8A8_UNORM              = 12,   /**< ubyte alpha, luminance */
  46    VIRGL_FORMAT_L16_UNORM               = 13,   /**< ushort luminance */
  47
  48    VIRGL_FORMAT_Z16_UNORM               = 16,
  49    VIRGL_FORMAT_Z32_UNORM               = 17,
  50    VIRGL_FORMAT_Z32_FLOAT               = 18,
  51    VIRGL_FORMAT_Z24_UNORM_S8_UINT       = 19,
  52    VIRGL_FORMAT_S8_UINT_Z24_UNORM       = 20,
  53    VIRGL_FORMAT_Z24X8_UNORM             = 21,
  54    VIRGL_FORMAT_X8Z24_UNORM             = 22,
  55    VIRGL_FORMAT_S8_UINT                 = 23,   /**< ubyte stencil */
  56    VIRGL_FORMAT_R64_FLOAT               = 24,
  57    VIRGL_FORMAT_R64G64_FLOAT            = 25,
  58    VIRGL_FORMAT_R64G64B64_FLOAT         = 26,
  59    VIRGL_FORMAT_R64G64B64A64_FLOAT      = 27,
  60    VIRGL_FORMAT_R32_FLOAT               = 28,
  61    VIRGL_FORMAT_R32G32_FLOAT            = 29,
  62    VIRGL_FORMAT_R32G32B32_FLOAT         = 30,
  63    VIRGL_FORMAT_R32G32B32A32_FLOAT      = 31,
  64
  65    VIRGL_FORMAT_R32_UNORM               = 32,
  66    VIRGL_FORMAT_R32G32_UNORM            = 33,
  67    VIRGL_FORMAT_R32G32B32_UNORM         = 34,
  68    VIRGL_FORMAT_R32G32B32A32_UNORM      = 35,
  69    VIRGL_FORMAT_R32_USCALED             = 36,
  70    VIRGL_FORMAT_R32G32_USCALED          = 37,
  71    VIRGL_FORMAT_R32G32B32_USCALED       = 38,
  72    VIRGL_FORMAT_R32G32B32A32_USCALED    = 39,
  73    VIRGL_FORMAT_R32_SNORM               = 40,
  74    VIRGL_FORMAT_R32G32_SNORM            = 41,
  75    VIRGL_FORMAT_R32G32B32_SNORM         = 42,
  76    VIRGL_FORMAT_R32G32B32A32_SNORM      = 43,
  77    VIRGL_FORMAT_R32_SSCALED             = 44,
  78    VIRGL_FORMAT_R32G32_SSCALED          = 45,
  79    VIRGL_FORMAT_R32G32B32_SSCALED       = 46,
  80    VIRGL_FORMAT_R32G32B32A32_SSCALED    = 47,
  81
  82    VIRGL_FORMAT_R16_UNORM               = 48,
  83    VIRGL_FORMAT_R16G16_UNORM            = 49,
  84    VIRGL_FORMAT_R16G16B16_UNORM         = 50,
  85    VIRGL_FORMAT_R16G16B16A16_UNORM      = 51,
  86
  87    VIRGL_FORMAT_R16_USCALED             = 52,
  88    VIRGL_FORMAT_R16G16_USCALED          = 53,
  89    VIRGL_FORMAT_R16G16B16_USCALED       = 54,
  90    VIRGL_FORMAT_R16G16B16A16_USCALED    = 55,
  91
  92    VIRGL_FORMAT_R16_SNORM               = 56,
  93    VIRGL_FORMAT_R16G16_SNORM            = 57,
  94    VIRGL_FORMAT_R16G16B16_SNORM         = 58,
  95    VIRGL_FORMAT_R16G16B16A16_SNORM      = 59,
  96
  97    VIRGL_FORMAT_R16_SSCALED             = 60,
  98    VIRGL_FORMAT_R16G16_SSCALED          = 61,
  99    VIRGL_FORMAT_R16G16B16_SSCALED       = 62,
 100    VIRGL_FORMAT_R16G16B16A16_SSCALED    = 63,
 101
 102    VIRGL_FORMAT_R8_UNORM                = 64,
 103    VIRGL_FORMAT_R8G8_UNORM              = 65,
 104    VIRGL_FORMAT_R8G8B8_UNORM            = 66,
 105    VIRGL_FORMAT_R8G8B8A8_UNORM          = 67,
 106
 107    VIRGL_FORMAT_R8_USCALED              = 69,
 108    VIRGL_FORMAT_R8G8_USCALED            = 70,
 109    VIRGL_FORMAT_R8G8B8_USCALED          = 71,
 110    VIRGL_FORMAT_R8G8B8A8_USCALED        = 72,
 111
 112    VIRGL_FORMAT_R8_SNORM                = 74,
 113    VIRGL_FORMAT_R8G8_SNORM              = 75,
 114    VIRGL_FORMAT_R8G8B8_SNORM            = 76,
 115    VIRGL_FORMAT_R8G8B8A8_SNORM          = 77,
 116
 117    VIRGL_FORMAT_R8_SSCALED              = 82,
 118    VIRGL_FORMAT_R8G8_SSCALED            = 83,
 119    VIRGL_FORMAT_R8G8B8_SSCALED          = 84,
 120    VIRGL_FORMAT_R8G8B8A8_SSCALED        = 85,
 121
 122    VIRGL_FORMAT_R16_FLOAT               = 91,
 123    VIRGL_FORMAT_R16G16_FLOAT            = 92,
 124    VIRGL_FORMAT_R16G16B16_FLOAT         = 93,
 125    VIRGL_FORMAT_R16G16B16A16_FLOAT      = 94,
 126
 127    VIRGL_FORMAT_L8_SRGB                 = 95,
 128    VIRGL_FORMAT_L8A8_SRGB               = 96,
 129    VIRGL_FORMAT_R8G8B8_SRGB             = 97,
 130    VIRGL_FORMAT_A8B8G8R8_SRGB           = 98,
 131    VIRGL_FORMAT_X8B8G8R8_SRGB           = 99,
 132    VIRGL_FORMAT_B8G8R8A8_SRGB           = 100,
 133    VIRGL_FORMAT_B8G8R8X8_SRGB           = 101,
 134    VIRGL_FORMAT_A8R8G8B8_SRGB           = 102,
 135    VIRGL_FORMAT_X8R8G8B8_SRGB           = 103,
 136    VIRGL_FORMAT_R8G8B8A8_SRGB           = 104,
 137
 138    /* compressed formats */
 139    VIRGL_FORMAT_DXT1_RGB                = 105,
 140    VIRGL_FORMAT_DXT1_RGBA               = 106,
 141    VIRGL_FORMAT_DXT3_RGBA               = 107,
 142    VIRGL_FORMAT_DXT5_RGBA               = 108,
 143
 144    /* sRGB, compressed */
 145    VIRGL_FORMAT_DXT1_SRGB               = 109,
 146    VIRGL_FORMAT_DXT1_SRGBA              = 110,
 147    VIRGL_FORMAT_DXT3_SRGBA              = 111,
 148    VIRGL_FORMAT_DXT5_SRGBA              = 112,
 149
 150    /* rgtc compressed */
 151    VIRGL_FORMAT_RGTC1_UNORM             = 113,
 152    VIRGL_FORMAT_RGTC1_SNORM             = 114,
 153    VIRGL_FORMAT_RGTC2_UNORM             = 115,
 154    VIRGL_FORMAT_RGTC2_SNORM             = 116,
 155
 156    VIRGL_FORMAT_A8B8G8R8_UNORM          = 121,
 157    VIRGL_FORMAT_B5G5R5X1_UNORM          = 122,
 158    VIRGL_FORMAT_R10G10B10A2_USCALED     = 123,
 159    VIRGL_FORMAT_R11G11B10_FLOAT         = 124,
 160    VIRGL_FORMAT_R9G9B9E5_FLOAT          = 125,
 161    VIRGL_FORMAT_Z32_FLOAT_S8X24_UINT    = 126,
 162
 163    VIRGL_FORMAT_B10G10R10A2_UNORM       = 131,
 164    VIRGL_FORMAT_R8G8B8X8_UNORM          = 134,
 165    VIRGL_FORMAT_B4G4R4X4_UNORM          = 135,
 166    VIRGL_FORMAT_X24S8_UINT              = 136,
 167    VIRGL_FORMAT_S8X24_UINT              = 137,
 168    VIRGL_FORMAT_X32_S8X24_UINT          = 138,
 169    VIRGL_FORMAT_B2G3R3_UNORM            = 139,
 170
 171    VIRGL_FORMAT_L16A16_UNORM            = 140,
 172    VIRGL_FORMAT_A16_UNORM               = 141,
 173    VIRGL_FORMAT_I16_UNORM               = 142,
 174
 175    VIRGL_FORMAT_LATC1_UNORM             = 143,
 176    VIRGL_FORMAT_LATC1_SNORM             = 144,
 177    VIRGL_FORMAT_LATC2_UNORM             = 145,
 178    VIRGL_FORMAT_LATC2_SNORM             = 146,
 179
 180    VIRGL_FORMAT_A8_SNORM                = 147,
 181    VIRGL_FORMAT_L8_SNORM                = 148,
 182    VIRGL_FORMAT_L8A8_SNORM              = 149,
 183
 184    VIRGL_FORMAT_A16_SNORM               = 151,
 185    VIRGL_FORMAT_L16_SNORM               = 152,
 186    VIRGL_FORMAT_L16A16_SNORM            = 153,
 187
 188    VIRGL_FORMAT_A16_FLOAT               = 155,
 189    VIRGL_FORMAT_L16_FLOAT               = 156,
 190    VIRGL_FORMAT_L16A16_FLOAT            = 157,
 191
 192    VIRGL_FORMAT_A32_FLOAT               = 159,
 193    VIRGL_FORMAT_L32_FLOAT               = 160,
 194    VIRGL_FORMAT_L32A32_FLOAT            = 161,
 195
 196    VIRGL_FORMAT_YV12                    = 163,
 197    VIRGL_FORMAT_YV16                    = 164,
 198    VIRGL_FORMAT_IYUV                    = 165,  /**< aka I420 */
 199    VIRGL_FORMAT_NV12                    = 166,
 200    VIRGL_FORMAT_NV21                    = 167,
 201
 202    VIRGL_FORMAT_R10G10B10A2_SSCALED     = 172,
 203    VIRGL_FORMAT_R10G10B10A2_SNORM       = 173,
 204    VIRGL_FORMAT_B10G10R10A2_SNORM       = 176,
 205
 206    VIRGL_FORMAT_R8_UINT                 = 177,
 207    VIRGL_FORMAT_R8G8_UINT               = 178,
 208    VIRGL_FORMAT_R8G8B8_UINT             = 179,
 209    VIRGL_FORMAT_R8G8B8A8_UINT           = 180,
 210
 211    VIRGL_FORMAT_R8_SINT                 = 181,
 212    VIRGL_FORMAT_R8G8_SINT               = 182,
 213    VIRGL_FORMAT_R8G8B8_SINT             = 183,
 214    VIRGL_FORMAT_R8G8B8A8_SINT           = 184,
 215
 216    VIRGL_FORMAT_R16_UINT                = 185,
 217    VIRGL_FORMAT_R16G16_UINT             = 186,
 218    VIRGL_FORMAT_R16G16B16_UINT          = 187,
 219    VIRGL_FORMAT_R16G16B16A16_UINT       = 188,
 220
 221    VIRGL_FORMAT_R16_SINT                = 189,
 222    VIRGL_FORMAT_R16G16_SINT             = 190,
 223    VIRGL_FORMAT_R16G16B16_SINT          = 191,
 224    VIRGL_FORMAT_R16G16B16A16_SINT       = 192,
 225    VIRGL_FORMAT_R32_UINT                = 193,
 226    VIRGL_FORMAT_R32G32_UINT             = 194,
 227    VIRGL_FORMAT_R32G32B32_UINT          = 195,
 228    VIRGL_FORMAT_R32G32B32A32_UINT       = 196,
 229
 230    VIRGL_FORMAT_R32_SINT                = 197,
 231    VIRGL_FORMAT_R32G32_SINT             = 198,
 232    VIRGL_FORMAT_R32G32B32_SINT          = 199,
 233    VIRGL_FORMAT_R32G32B32A32_SINT       = 200,
 234
 235    VIRGL_FORMAT_A8_UINT                 = 201,
 236    VIRGL_FORMAT_L8_UINT                 = 203,
 237    VIRGL_FORMAT_L8A8_UINT               = 204,
 238
 239    VIRGL_FORMAT_A8_SINT                 = 205,
 240    VIRGL_FORMAT_L8_SINT                 = 207,
 241    VIRGL_FORMAT_L8A8_SINT               = 208,
 242
 243    VIRGL_FORMAT_A16_UINT                = 209,
 244    VIRGL_FORMAT_L16_UINT                = 211,
 245    VIRGL_FORMAT_L16A16_UINT             = 212,
 246
 247    VIRGL_FORMAT_A16_SINT                = 213,
 248    VIRGL_FORMAT_L16_SINT                = 215,
 249    VIRGL_FORMAT_L16A16_SINT             = 216,
 250
 251    VIRGL_FORMAT_A32_UINT                = 217,
 252    VIRGL_FORMAT_L32_UINT                = 219,
 253    VIRGL_FORMAT_L32A32_UINT             = 220,
 254
 255    VIRGL_FORMAT_A32_SINT                = 221,
 256    VIRGL_FORMAT_L32_SINT                = 223,
 257    VIRGL_FORMAT_L32A32_SINT             = 224,
 258
 259    VIRGL_FORMAT_B10G10R10A2_UINT        = 225,
 260    VIRGL_FORMAT_R8G8B8X8_SNORM          = 229,
 261
 262    VIRGL_FORMAT_R8G8B8X8_SRGB           = 230,
 263
 264    VIRGL_FORMAT_R8G8B8X8_UINT           = 231,
 265    VIRGL_FORMAT_R8G8B8X8_SINT           = 232,
 266    VIRGL_FORMAT_B10G10R10X2_UNORM       = 233,
 267    VIRGL_FORMAT_R16G16B16X16_UNORM      = 234,
 268    VIRGL_FORMAT_R16G16B16X16_SNORM      = 235,
 269    VIRGL_FORMAT_R16G16B16X16_FLOAT      = 236,
 270    VIRGL_FORMAT_R16G16B16X16_UINT       = 237,
 271    VIRGL_FORMAT_R16G16B16X16_SINT       = 238,
 272    VIRGL_FORMAT_R32G32B32X32_FLOAT      = 239,
 273    VIRGL_FORMAT_R32G32B32X32_UINT       = 240,
 274    VIRGL_FORMAT_R32G32B32X32_SINT       = 241,
 275
 276    VIRGL_FORMAT_R10G10B10A2_UINT        = 253,
 277
 278    VIRGL_FORMAT_BPTC_RGBA_UNORM         = 255,
 279    VIRGL_FORMAT_BPTC_SRGBA              = 256,
 280    VIRGL_FORMAT_BPTC_RGB_FLOAT          = 257,
 281    VIRGL_FORMAT_BPTC_RGB_UFLOAT         = 258,
 282
 283    /* etc2 compressed */
 284    VIRGL_FORMAT_ETC2_RGB8               = 269,
 285    VIRGL_FORMAT_ETC2_SRGB8              = 270,
 286    VIRGL_FORMAT_ETC2_RGB8A1             = 271,
 287    VIRGL_FORMAT_ETC2_SRGB8A1            = 272,
 288    VIRGL_FORMAT_ETC2_RGBA8              = 273,
 289    VIRGL_FORMAT_ETC2_SRGBA8             = 274,
 290    VIRGL_FORMAT_ETC2_R11_UNORM          = 275,
 291    VIRGL_FORMAT_ETC2_R11_SNORM          = 276,
 292    VIRGL_FORMAT_ETC2_RG11_UNORM         = 277,
 293    VIRGL_FORMAT_ETC2_RG11_SNORM         = 278,
 294
 295    VIRGL_FORMAT_R10G10B10X2_UNORM       = 308,
 296    VIRGL_FORMAT_A4B4G4R4_UNORM          = 311,
 297
 298    VIRGL_FORMAT_R8_SRGB                 = 312,
 299    VIRGL_FORMAT_MAX /* = PIPE_FORMAT_COUNT */,
 300
 301    /* Below formats must not be used in the guest. */
 302    VIRGL_FORMAT_B8G8R8X8_UNORM_EMULATED,
 303    VIRGL_FORMAT_B8G8R8A8_UNORM_EMULATED,
 304    VIRGL_FORMAT_MAX_EXTENDED
 305 };
 306
 307 /* These are used by the capability_bits field in virgl_caps_v2. */
 308 #define VIRGL_CAP_NONE 0
 309 #define VIRGL_CAP_TGSI_INVARIANT       (1 << 0)
 310 #define VIRGL_CAP_TEXTURE_VIEW         (1 << 1)
 311 #define VIRGL_CAP_SET_MIN_SAMPLES      (1 << 2)
 312 #define VIRGL_CAP_COPY_IMAGE           (1 << 3)
 313 #define VIRGL_CAP_TGSI_PRECISE         (1 << 4)
 314 #define VIRGL_CAP_TXQS                 (1 << 5)
 315 #define VIRGL_CAP_MEMORY_BARRIER       (1 << 6)
 316 #define VIRGL_CAP_COMPUTE_SHADER       (1 << 7)
 317 #define VIRGL_CAP_FB_NO_ATTACH         (1 << 8)
 318 #define VIRGL_CAP_ROBUST_BUFFER_ACCESS (1 << 9)
 319 #define VIRGL_CAP_TGSI_FBFETCH         (1 << 10)
 320 #define VIRGL_CAP_SHADER_CLOCK         (1 << 11)
 321 #define VIRGL_CAP_TEXTURE_BARRIER      (1 << 12)
 322 #define VIRGL_CAP_TGSI_COMPONENTS      (1 << 13)
 323 #define VIRGL_CAP_GUEST_MAY_INIT_LOG   (1 << 14)
 324 #define VIRGL_CAP_SRGB_WRITE_CONTROL   (1 << 15)
 325 #define VIRGL_CAP_QBO                  (1 << 16)
 326 #define VIRGL_CAP_TRANSFER             (1 << 17)
 327 #define VIRGL_CAP_FBO_MIXED_COLOR_FORMATS  (1 << 18)
 328 #define VIRGL_CAP_FAKE_FP64            (1 << 19)
 329 #define VIRGL_CAP_BIND_COMMAND_ARGS    (1 << 20)
 330 #define VIRGL_CAP_MULTI_DRAW_INDIRECT  (1 << 21)
 331 #define VIRGL_CAP_INDIRECT_PARAMS      (1 << 22)
 332 #define VIRGL_CAP_TRANSFORM_FEEDBACK3  (1 << 23)
 333 #define VIRGL_CAP_3D_ASTC              (1 << 24)
 334 #define VIRGL_CAP_INDIRECT_INPUT_ADDR  (1 << 25)
 335 #define VIRGL_CAP_COPY_TRANSFER        (1 << 26)
 336 #define VIRGL_CAP_CLIP_HALFZ           (1 << 27)
 337 #define VIRGL_CAP_APP_TWEAK_SUPPORT    (1 << 28)
 338 #define VIRGL_CAP_BGRA_SRGB_IS_EMULATED (1 << 29)
 339 #define VIRGL_CAP_CLEAR_TEXTURE        (1 << 30)
 340 /* Reserved for VIRGL_CAP_ARB_BUFFER_STORAGE */
 341
 342 /* These are used by the capability_bits_v2 field in virgl_caps_v2. */
 343 #define VIRGL_CAP_V2_BLEND_EQUATION       (1 << 0)
 344
 345 /* virgl bind flags - these are compatible with mesa 10.5 gallium.
 346  * but are fixed, no other should be passed to virgl either.
 347  */
 348 #define VIRGL_BIND_DEPTH_STENCIL (1 << 0)
 349 #define VIRGL_BIND_RENDER_TARGET (1 << 1)
 350 #define VIRGL_BIND_SAMPLER_VIEW  (1 << 3)
 351 #define VIRGL_BIND_VERTEX_BUFFER (1 << 4)
 352 #define VIRGL_BIND_INDEX_BUFFER  (1 << 5)
 353 #define VIRGL_BIND_CONSTANT_BUFFER (1 << 6)
 354 #define VIRGL_BIND_DISPLAY_TARGET (1 << 7)
 355 #define VIRGL_BIND_COMMAND_ARGS  (1 << 8)
 356 #define VIRGL_BIND_STREAM_OUTPUT (1 << 11)
 357 #define VIRGL_BIND_SHADER_BUFFER (1 << 14)
 358 #define VIRGL_BIND_QUERY_BUFFER  (1 << 15)
 359 #define VIRGL_BIND_CURSOR        (1 << 16)
 360 #define VIRGL_BIND_CUSTOM        (1 << 17)
 361 #define VIRGL_BIND_SCANOUT       (1 << 18)
 362 /* Used for buffers that are backed by guest storage and
 363  * are only read by the host.
 364  */
 365 #define VIRGL_BIND_STAGING       (1 << 19)
 366 #define VIRGL_BIND_SHARED        (1 << 20)
 367
 368 /* Extra flags that may be passed  */
 369 #define VIRGL_BIND_PREFER_EMULATED_BGRA  (1 << 21)
 370
 371 struct virgl_caps_bool_set1 {
 372         unsigned indep_blend_enable:1;
 373         unsigned indep_blend_func:1;
 374         unsigned cube_map_array:1;
 375         unsigned shader_stencil_export:1;
 376         unsigned conditional_render:1;
 377         unsigned start_instance:1;
 378         unsigned primitive_restart:1;
 379         unsigned blend_eq_sep:1;
 380         unsigned instanceid:1;
 381         unsigned vertex_element_instance_divisor:1;
 382         unsigned seamless_cube_map:1;
 383         unsigned occlusion_query:1;
 384         unsigned timer_query:1;
 385         unsigned streamout_pause_resume:1;
 386         unsigned texture_multisample:1;
 387         unsigned fragment_coord_conventions:1;
 388         unsigned depth_clip_disable:1;
 389         unsigned seamless_cube_map_per_texture:1;
 390         unsigned ubo:1;
 391         unsigned color_clamping:1; /* not in GL 3.1 core profile */
 392         unsigned poly_stipple:1; /* not in GL 3.1 core profile */
 393         unsigned mirror_clamp:1;
 394         unsigned texture_query_lod:1;
 395         unsigned has_fp64:1;
 396         unsigned has_tessellation_shaders:1;
 397         unsigned has_indirect_draw:1;
 398         unsigned has_sample_shading:1;
 399         unsigned has_cull:1;
 400         unsigned conditional_render_inverted:1;
 401         unsigned derivative_control:1;
 402         unsigned polygon_offset_clamp:1;
 403         unsigned transform_feedback_overflow_query:1;
 404         /* DO NOT ADD ANYMORE MEMBERS - need to add another 32-bit to v2 caps */
 405 };
 406
 407 /* endless expansion capabilites - current gallium has 252 formats */
 408 struct virgl_supported_format_mask {
 409         uint32_t bitmask[16];
 410 };
 411 /* capabilities set 2 - version 1 - 32-bit and float values */
 412 struct virgl_caps_v1 {
 413         uint32_t max_version;
 414         struct virgl_supported_format_mask sampler;
 415         struct virgl_supported_format_mask render;
 416         struct virgl_supported_format_mask depthstencil;
 417         struct virgl_supported_format_mask vertexbuffer;
 418         struct virgl_caps_bool_set1 bset;
 419         uint32_t glsl_level;
 420         uint32_t max_texture_array_layers;
 421         uint32_t max_streamout_buffers;
 422         uint32_t max_dual_source_render_targets;
 423         uint32_t max_render_targets;
 424         uint32_t max_samples;
 425         uint32_t prim_mask;
 426         uint32_t max_tbo_size;
 427         uint32_t max_uniform_blocks;
 428         uint32_t max_viewports;
 429         uint32_t max_texture_gather_components;
 430 };
 431
 432 /*
 433  * This struct should be growable when used in capset 2,
 434  * so we shouldn't have to add a v3 ever.
 435  */
 436 struct virgl_caps_v2 {
 437         struct virgl_caps_v1 v1;
 438         float min_aliased_point_size;
 439         float max_aliased_point_size;
 440         float min_smooth_point_size;
 441         float max_smooth_point_size;
 442         float min_aliased_line_width;
 443         float max_aliased_line_width;
 444         float min_smooth_line_width;
 445         float max_smooth_line_width;
 446         float max_texture_lod_bias;
 447         uint32_t max_geom_output_vertices;
 448         uint32_t max_geom_total_output_components;
 449         uint32_t max_vertex_outputs;
 450         uint32_t max_vertex_attribs;
 451         uint32_t max_shader_patch_varyings;
 452         int32_t min_texel_offset;
 453         int32_t max_texel_offset;
 454         int32_t min_texture_gather_offset;
 455         int32_t max_texture_gather_offset;
 456         uint32_t texture_buffer_offset_alignment;
 457         uint32_t uniform_buffer_offset_alignment;
 458         uint32_t shader_buffer_offset_alignment;
 459         uint32_t capability_bits;
 460         uint32_t sample_locations[8];
 461         uint32_t max_vertex_attrib_stride;
 462         uint32_t max_shader_buffer_frag_compute;
 463         uint32_t max_shader_buffer_other_stages;
 464         uint32_t max_shader_image_frag_compute;
 465         uint32_t max_shader_image_other_stages;
 466         uint32_t max_image_samples;
 467         uint32_t max_compute_work_group_invocations;
 468         uint32_t max_compute_shared_memory_size;
 469         uint32_t max_compute_grid_size[3];
 470         uint32_t max_compute_block_size[3];
 471         uint32_t max_texture_2d_size;
 472         uint32_t max_texture_3d_size;
 473         uint32_t max_texture_cube_size;
 474         uint32_t max_combined_shader_buffers;
 475         uint32_t max_atomic_counters[6];
 476         uint32_t max_atomic_counter_buffers[6];
 477         uint32_t max_combined_atomic_counters;
 478         uint32_t max_combined_atomic_counter_buffers;
 479         uint32_t host_feature_check_version;
 480         struct virgl_supported_format_mask supported_readback_formats;
 481         struct virgl_supported_format_mask scanout;
 482         uint32_t capability_bits_v2;
 483 };
 484
 485 union virgl_caps {
 486         uint32_t max_version;
 487         struct virgl_caps_v1 v1;
 488         struct virgl_caps_v2 v2;
 489 };
 490
 491 enum virgl_errors {
 492         VIRGL_ERROR_NONE,
 493         VIRGL_ERROR_UNKNOWN,
 494         VIRGL_ERROR_UNKNOWN_RESOURCE_FORMAT,
 495 };
 496
 497 enum virgl_ctx_errors {
 498         VIRGL_ERROR_CTX_NONE,
 499         VIRGL_ERROR_CTX_UNKNOWN,
 500         VIRGL_ERROR_CTX_ILLEGAL_SHADER,
 501         VIRGL_ERROR_CTX_ILLEGAL_HANDLE,
 502         VIRGL_ERROR_CTX_ILLEGAL_RESOURCE,
 503         VIRGL_ERROR_CTX_ILLEGAL_SURFACE,
 504         VIRGL_ERROR_CTX_ILLEGAL_VERTEX_FORMAT,
 505         VIRGL_ERROR_CTX_ILLEGAL_CMD_BUFFER,
 506         VIRGL_ERROR_CTX_GLES_HAVE_TES_BUT_MISS_TCS,
 507 };
 508
 509 #define VIRGL_RESOURCE_Y_0_TOP (1 << 0)
 510 #endif