2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
28 #include "anv_private.h"
30 #include <brw_context.h>
31 #include <brw_wm.h> /* brw_new_shader_program is here */
38 #include <mesa/main/shaderobj.h>
39 #include <mesa/main/fbobject.h>
40 #include <mesa/main/context.h>
41 #include <mesa/program/program.h>
42 #include <glsl/program.h>
44 /* XXX: We need this to keep symbols in nir.h from conflicting with the
45 * generated GEN command packing headers. We need to fix *both* to not
46 * define something as generic as LOAD.
50 #include <glsl/nir/nir_spirv.h>
52 #define SPIR_V_MAGIC_NUMBER 0x07230203
55 fail_if(int cond
, const char *format
, ...)
62 va_start(args
, format
);
63 vfprintf(stderr
, format
, args
);
70 set_binding_table_layout(struct brw_stage_prog_data
*prog_data
,
71 struct anv_pipeline
*pipeline
, uint32_t stage
)
73 uint32_t bias
, count
, k
, *map
;
74 struct anv_pipeline_layout
*layout
= pipeline
->layout
;
76 /* No layout is valid for shaders that don't bind any resources. */
77 if (pipeline
->layout
== NULL
)
80 if (stage
== VK_SHADER_STAGE_FRAGMENT
)
85 count
= layout
->stage
[stage
].surface_count
;
86 prog_data
->map_entries
=
87 (uint32_t *) malloc(count
* sizeof(prog_data
->map_entries
[0]));
88 if (prog_data
->map_entries
== NULL
)
89 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
92 map
= prog_data
->map_entries
;
93 for (uint32_t i
= 0; i
< layout
->num_sets
; i
++) {
94 prog_data
->bind_map
[i
].index
= map
;
95 for (uint32_t j
= 0; j
< layout
->set
[i
].layout
->stage
[stage
].surface_count
; j
++)
98 prog_data
->bind_map
[i
].index_count
=
99 layout
->set
[i
].layout
->stage
[stage
].surface_count
;
106 upload_kernel(struct anv_pipeline
*pipeline
, const void *data
, size_t size
)
108 struct anv_state state
=
109 anv_state_stream_alloc(&pipeline
->program_stream
, size
, 64);
111 assert(size
< pipeline
->program_stream
.block_pool
->block_size
);
113 memcpy(state
.map
, data
, size
);
119 brw_vs_populate_key(struct brw_context
*brw
,
120 struct brw_vertex_program
*vp
,
121 struct brw_vs_prog_key
*key
)
123 struct gl_context
*ctx
= &brw
->ctx
;
124 /* BRW_NEW_VERTEX_PROGRAM */
125 struct gl_program
*prog
= (struct gl_program
*) vp
;
127 memset(key
, 0, sizeof(*key
));
129 /* Just upload the program verbatim for now. Always send it all
130 * the inputs it asks for, whether they are varying or not.
132 key
->base
.program_string_id
= vp
->id
;
133 brw_setup_vue_key_clip_info(brw
, &key
->base
,
134 vp
->program
.Base
.UsesClipDistanceOut
);
138 key
->copy_edgeflag
= (ctx
->Polygon
.FrontMode
!= GL_FILL
||
139 ctx
->Polygon
.BackMode
!= GL_FILL
);
142 if (prog
->OutputsWritten
& (VARYING_BIT_COL0
| VARYING_BIT_COL1
|
143 VARYING_BIT_BFC0
| VARYING_BIT_BFC1
)) {
144 /* _NEW_LIGHT | _NEW_BUFFERS */
145 key
->clamp_vertex_color
= ctx
->Light
._ClampVertexColor
;
149 if (brw
->gen
< 6 && ctx
->Point
.PointSprite
) {
150 for (int i
= 0; i
< 8; i
++) {
151 if (ctx
->Point
.CoordReplace
[i
])
152 key
->point_coord_replace
|= (1 << i
);
157 brw_populate_sampler_prog_key_data(ctx
, prog
, brw
->vs
.base
.sampler_count
,
162 really_do_vs_prog(struct brw_context
*brw
,
163 struct gl_shader_program
*prog
,
164 struct brw_vertex_program
*vp
,
165 struct brw_vs_prog_key
*key
, struct anv_pipeline
*pipeline
)
168 const GLuint
*program
;
169 struct brw_vs_prog_data
*prog_data
= &pipeline
->vs_prog_data
;
170 struct brw_stage_prog_data
*stage_prog_data
= &prog_data
->base
.base
;
172 struct gl_shader
*vs
= NULL
;
175 vs
= prog
->_LinkedShaders
[MESA_SHADER_VERTEX
];
177 memset(prog_data
, 0, sizeof(*prog_data
));
179 mem_ctx
= ralloc_context(NULL
);
181 /* Allocate the references to the uniforms that will end up in the
182 * prog_data associated with the compiled program, and which will be freed
183 * by the state cache.
187 /* We add padding around uniform values below vec4 size, with the worst
188 * case being a float value that gets blown up to a vec4, so be
191 param_count
= vs
->num_uniform_components
* 4;
194 param_count
= vp
->program
.Base
.Parameters
->NumParameters
* 4;
196 /* vec4_visitor::setup_uniform_clipplane_values() also uploads user clip
197 * planes as uniforms.
199 param_count
+= key
->base
.nr_userclip_plane_consts
* 4;
201 /* Setting nr_params here NOT to the size of the param and pull_param
202 * arrays, but to the number of uniform components vec4_visitor
203 * needs. vec4_visitor::setup_uniforms() will set it back to a proper value.
205 stage_prog_data
->nr_params
= ALIGN(param_count
, 4) / 4;
207 stage_prog_data
->nr_params
+= vs
->num_samplers
;
210 GLbitfield64 outputs_written
= vp
->program
.Base
.OutputsWritten
;
211 prog_data
->inputs_read
= vp
->program
.Base
.InputsRead
;
213 if (key
->copy_edgeflag
) {
214 outputs_written
|= BITFIELD64_BIT(VARYING_SLOT_EDGE
);
215 prog_data
->inputs_read
|= VERT_BIT_EDGEFLAG
;
219 /* Put dummy slots into the VUE for the SF to put the replaced
220 * point sprite coords in. We shouldn't need these dummy slots,
221 * which take up precious URB space, but it would mean that the SF
222 * doesn't get nice aligned pairs of input coords into output
223 * coords, which would be a pain to handle.
225 for (int i
= 0; i
< 8; i
++) {
226 if (key
->point_coord_replace
& (1 << i
))
227 outputs_written
|= BITFIELD64_BIT(VARYING_SLOT_TEX0
+ i
);
230 /* if back colors are written, allocate slots for front colors too */
231 if (outputs_written
& BITFIELD64_BIT(VARYING_SLOT_BFC0
))
232 outputs_written
|= BITFIELD64_BIT(VARYING_SLOT_COL0
);
233 if (outputs_written
& BITFIELD64_BIT(VARYING_SLOT_BFC1
))
234 outputs_written
|= BITFIELD64_BIT(VARYING_SLOT_COL1
);
237 /* In order for legacy clipping to work, we need to populate the clip
238 * distance varying slots whenever clipping is enabled, even if the vertex
239 * shader doesn't write to gl_ClipDistance.
241 if (key
->base
.userclip_active
) {
242 outputs_written
|= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0
);
243 outputs_written
|= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1
);
246 brw_compute_vue_map(brw
->intelScreen
->devinfo
,
247 &prog_data
->base
.vue_map
, outputs_written
);
249 set_binding_table_layout(&prog_data
->base
.base
, pipeline
,
250 VK_SHADER_STAGE_VERTEX
);
254 program
= brw_vs_emit(brw
, mem_ctx
, key
, prog_data
, &vp
->program
,
255 prog
, &program_size
);
256 if (program
== NULL
) {
257 ralloc_free(mem_ctx
);
261 pipeline
->vs_simd8
= upload_kernel(pipeline
, program
, program_size
);
263 ralloc_free(mem_ctx
);
268 void brw_wm_populate_key(struct brw_context
*brw
,
269 struct brw_fragment_program
*fp
,
270 struct brw_wm_prog_key
*key
)
272 struct gl_context
*ctx
= &brw
->ctx
;
273 struct gl_program
*prog
= (struct gl_program
*) brw
->fragment_program
;
276 bool program_uses_dfdy
= fp
->program
.UsesDFdy
;
277 struct gl_framebuffer draw_buffer
;
278 bool multisample_fbo
;
280 memset(key
, 0, sizeof(*key
));
282 for (int i
= 0; i
< MAX_SAMPLERS
; i
++) {
283 /* Assume color sampler, no swizzling. */
284 key
->tex
.swizzles
[i
] = SWIZZLE_XYZW
;
287 /* A non-zero framebuffer name indicates that the framebuffer was created by
288 * the user rather than the window system. */
289 draw_buffer
.Name
= 1;
290 draw_buffer
.Visual
.samples
= 1;
291 draw_buffer
._NumColorDrawBuffers
= 1;
292 draw_buffer
._NumColorDrawBuffers
= 1;
293 draw_buffer
.Width
= 400;
294 draw_buffer
.Height
= 400;
295 ctx
->DrawBuffer
= &draw_buffer
;
297 multisample_fbo
= ctx
->DrawBuffer
->Visual
.samples
> 1;
299 /* Build the index for table lookup
303 if (fp
->program
.UsesKill
|| ctx
->Color
.AlphaEnabled
)
304 lookup
|= IZ_PS_KILL_ALPHATEST_BIT
;
306 if (fp
->program
.Base
.OutputsWritten
& BITFIELD64_BIT(FRAG_RESULT_DEPTH
))
307 lookup
|= IZ_PS_COMPUTES_DEPTH_BIT
;
311 lookup
|= IZ_DEPTH_TEST_ENABLE_BIT
;
313 if (ctx
->Depth
.Test
&& ctx
->Depth
.Mask
) /* ?? */
314 lookup
|= IZ_DEPTH_WRITE_ENABLE_BIT
;
316 /* _NEW_STENCIL | _NEW_BUFFERS */
317 if (ctx
->Stencil
._Enabled
) {
318 lookup
|= IZ_STENCIL_TEST_ENABLE_BIT
;
320 if (ctx
->Stencil
.WriteMask
[0] ||
321 ctx
->Stencil
.WriteMask
[ctx
->Stencil
._BackFace
])
322 lookup
|= IZ_STENCIL_WRITE_ENABLE_BIT
;
324 key
->iz_lookup
= lookup
;
329 /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
330 if (ctx
->Line
.SmoothFlag
) {
331 if (brw
->reduced_primitive
== GL_LINES
) {
334 else if (brw
->reduced_primitive
== GL_TRIANGLES
) {
335 if (ctx
->Polygon
.FrontMode
== GL_LINE
) {
336 line_aa
= AA_SOMETIMES
;
338 if (ctx
->Polygon
.BackMode
== GL_LINE
||
339 (ctx
->Polygon
.CullFlag
&&
340 ctx
->Polygon
.CullFaceMode
== GL_BACK
))
343 else if (ctx
->Polygon
.BackMode
== GL_LINE
) {
344 line_aa
= AA_SOMETIMES
;
346 if ((ctx
->Polygon
.CullFlag
&&
347 ctx
->Polygon
.CullFaceMode
== GL_FRONT
))
353 key
->line_aa
= line_aa
;
356 key
->high_quality_derivatives
=
357 ctx
->Hint
.FragmentShaderDerivative
== GL_NICEST
;
360 key
->stats_wm
= brw
->stats_wm
;
363 key
->flat_shade
= (ctx
->Light
.ShadeModel
== GL_FLAT
);
365 /* _NEW_FRAG_CLAMP | _NEW_BUFFERS */
366 key
->clamp_fragment_color
= ctx
->Color
._ClampFragmentColor
;
369 brw_populate_sampler_prog_key_data(ctx
, prog
, brw
->wm
.base
.sampler_count
,
374 * Include the draw buffer origin and height so that we can calculate
375 * fragment position values relative to the bottom left of the drawable,
376 * from the incoming screen origin relative position we get as part of our
379 * This is only needed for the WM_WPOSXY opcode when the fragment program
380 * uses the gl_FragCoord input.
382 * We could avoid recompiling by including this as a constant referenced by
383 * our program, but if we were to do that it would also be nice to handle
384 * getting that constant updated at batchbuffer submit time (when we
385 * hold the lock and know where the buffer really is) rather than at emit
386 * time when we don't hold the lock and are just guessing. We could also
387 * just avoid using this as key data if the program doesn't use
390 * For DRI2 the origin_x/y will always be (0,0) but we still need the
391 * drawable height in order to invert the Y axis.
393 if (fp
->program
.Base
.InputsRead
& VARYING_BIT_POS
) {
394 key
->drawable_height
= ctx
->DrawBuffer
->Height
;
397 if ((fp
->program
.Base
.InputsRead
& VARYING_BIT_POS
) || program_uses_dfdy
) {
398 key
->render_to_fbo
= _mesa_is_user_fbo(ctx
->DrawBuffer
);
402 key
->nr_color_regions
= ctx
->DrawBuffer
->_NumColorDrawBuffers
;
404 /* _NEW_MULTISAMPLE, _NEW_COLOR, _NEW_BUFFERS */
405 key
->replicate_alpha
= ctx
->DrawBuffer
->_NumColorDrawBuffers
> 1 &&
406 (ctx
->Multisample
.SampleAlphaToCoverage
|| ctx
->Color
.AlphaEnabled
);
408 /* _NEW_BUFFERS _NEW_MULTISAMPLE */
409 /* Ignore sample qualifier while computing this flag. */
410 key
->persample_shading
=
411 _mesa_get_min_invocations_per_fragment(ctx
, &fp
->program
, true) > 1;
412 if (key
->persample_shading
)
413 key
->persample_2x
= ctx
->DrawBuffer
->Visual
.samples
== 2;
415 key
->compute_pos_offset
=
416 _mesa_get_min_invocations_per_fragment(ctx
, &fp
->program
, false) > 1 &&
417 fp
->program
.Base
.SystemValuesRead
& SYSTEM_BIT_SAMPLE_POS
;
419 key
->compute_sample_id
=
421 ctx
->Multisample
.Enabled
&&
422 (fp
->program
.Base
.SystemValuesRead
& SYSTEM_BIT_SAMPLE_ID
);
424 /* BRW_NEW_VUE_MAP_GEOM_OUT */
425 if (brw
->gen
< 6 || _mesa_bitcount_64(fp
->program
.Base
.InputsRead
&
426 BRW_FS_VARYING_INPUT_MASK
) > 16)
427 key
->input_slots_valid
= brw
->vue_map_geom_out
.slots_valid
;
430 /* _NEW_COLOR | _NEW_BUFFERS */
431 /* Pre-gen6, the hardware alpha test always used each render
432 * target's alpha to do alpha test, as opposed to render target 0's alpha
433 * like GL requires. Fix that by building the alpha test into the
434 * shader, and we'll skip enabling the fixed function alpha test.
436 if (brw
->gen
< 6 && ctx
->DrawBuffer
->_NumColorDrawBuffers
> 1 && ctx
->Color
.AlphaEnabled
) {
437 key
->alpha_test_func
= ctx
->Color
.AlphaFunc
;
438 key
->alpha_test_ref
= ctx
->Color
.AlphaRef
;
441 /* The unique fragment program ID */
442 key
->program_string_id
= fp
->id
;
444 ctx
->DrawBuffer
= NULL
;
448 computed_depth_mode(struct gl_fragment_program
*fp
)
450 if (fp
->Base
.OutputsWritten
& BITFIELD64_BIT(FRAG_RESULT_DEPTH
)) {
451 switch (fp
->FragDepthLayout
) {
452 case FRAG_DEPTH_LAYOUT_NONE
:
453 case FRAG_DEPTH_LAYOUT_ANY
:
454 return BRW_PSCDEPTH_ON
;
455 case FRAG_DEPTH_LAYOUT_GREATER
:
456 return BRW_PSCDEPTH_ON_GE
;
457 case FRAG_DEPTH_LAYOUT_LESS
:
458 return BRW_PSCDEPTH_ON_LE
;
459 case FRAG_DEPTH_LAYOUT_UNCHANGED
:
460 return BRW_PSCDEPTH_OFF
;
463 return BRW_PSCDEPTH_OFF
;
467 really_do_wm_prog(struct brw_context
*brw
,
468 struct gl_shader_program
*prog
,
469 struct brw_fragment_program
*fp
,
470 struct brw_wm_prog_key
*key
, struct anv_pipeline
*pipeline
)
472 struct gl_context
*ctx
= &brw
->ctx
;
473 void *mem_ctx
= ralloc_context(NULL
);
474 struct brw_wm_prog_data
*prog_data
= &pipeline
->wm_prog_data
;
475 struct gl_shader
*fs
= NULL
;
476 unsigned int program_size
;
477 const uint32_t *program
;
480 fs
= prog
->_LinkedShaders
[MESA_SHADER_FRAGMENT
];
482 memset(prog_data
, 0, sizeof(*prog_data
));
484 /* key->alpha_test_func means simulating alpha testing via discards,
485 * so the shader definitely kills pixels.
487 prog_data
->uses_kill
= fp
->program
.UsesKill
|| key
->alpha_test_func
;
489 prog_data
->computed_depth_mode
= computed_depth_mode(&fp
->program
);
491 /* Allocate the references to the uniforms that will end up in the
492 * prog_data associated with the compiled program, and which will be freed
493 * by the state cache.
497 param_count
= fs
->num_uniform_components
;
499 param_count
= fp
->program
.Base
.Parameters
->NumParameters
* 4;
501 /* The backend also sometimes adds params for texture size. */
502 param_count
+= 2 * ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxTextureImageUnits
;
503 prog_data
->base
.param
=
504 rzalloc_array(NULL
, const gl_constant_value
*, param_count
);
505 prog_data
->base
.pull_param
=
506 rzalloc_array(NULL
, const gl_constant_value
*, param_count
);
507 prog_data
->base
.nr_params
= param_count
;
509 prog_data
->barycentric_interp_modes
=
510 brw_compute_barycentric_interp_modes(brw
, key
->flat_shade
,
511 key
->persample_shading
,
514 set_binding_table_layout(&prog_data
->base
, pipeline
,
515 VK_SHADER_STAGE_FRAGMENT
);
516 /* This needs to come after shader time and pull constant entries, but we
517 * don't have those set up now, so just put it after the layout entries.
519 prog_data
->binding_table
.render_target_start
= 0;
521 program
= brw_wm_fs_emit(brw
, mem_ctx
, key
, prog_data
,
522 &fp
->program
, prog
, &program_size
);
523 if (program
== NULL
) {
524 ralloc_free(mem_ctx
);
528 uint32_t offset
= upload_kernel(pipeline
, program
, program_size
);
531 pipeline
->ps_simd8
= NO_KERNEL
;
533 pipeline
->ps_simd8
= offset
;
535 if (prog_data
->no_8
|| prog_data
->prog_offset_16
) {
536 pipeline
->ps_simd16
= offset
+ prog_data
->prog_offset_16
;
538 pipeline
->ps_simd16
= NO_KERNEL
;
541 ralloc_free(mem_ctx
);
547 brw_gs_populate_key(struct brw_context
*brw
,
548 struct anv_pipeline
*pipeline
,
549 struct brw_geometry_program
*gp
,
550 struct brw_gs_prog_key
*key
)
552 struct gl_context
*ctx
= &brw
->ctx
;
553 struct brw_stage_state
*stage_state
= &brw
->gs
.base
;
554 struct gl_program
*prog
= &gp
->program
.Base
;
556 memset(key
, 0, sizeof(*key
));
558 key
->base
.program_string_id
= gp
->id
;
559 brw_setup_vue_key_clip_info(brw
, &key
->base
,
560 gp
->program
.Base
.UsesClipDistanceOut
);
563 brw_populate_sampler_prog_key_data(ctx
, prog
, stage_state
->sampler_count
,
566 struct brw_vs_prog_data
*prog_data
= &pipeline
->vs_prog_data
;
568 /* BRW_NEW_VUE_MAP_VS */
569 key
->input_varyings
= prog_data
->base
.vue_map
.slots_valid
;
573 really_do_gs_prog(struct brw_context
*brw
,
574 struct gl_shader_program
*prog
,
575 struct brw_geometry_program
*gp
,
576 struct brw_gs_prog_key
*key
, struct anv_pipeline
*pipeline
)
578 struct brw_gs_compile_output output
;
580 /* FIXME: We pass the bind map to the compile in the output struct. Need
581 * something better. */
582 set_binding_table_layout(&output
.prog_data
.base
.base
,
583 pipeline
, VK_SHADER_STAGE_GEOMETRY
);
585 brw_compile_gs_prog(brw
, prog
, gp
, key
, &output
);
587 pipeline
->gs_vec4
= upload_kernel(pipeline
, output
.program
, output
.program_size
);
588 pipeline
->gs_vertex_count
= gp
->program
.VerticesIn
;
590 ralloc_free(output
.mem_ctx
);
596 brw_codegen_cs_prog(struct brw_context
*brw
,
597 struct gl_shader_program
*prog
,
598 struct brw_compute_program
*cp
,
599 struct brw_cs_prog_key
*key
, struct anv_pipeline
*pipeline
)
601 struct gl_context
*ctx
= &brw
->ctx
;
602 const GLuint
*program
;
603 void *mem_ctx
= ralloc_context(NULL
);
605 struct brw_cs_prog_data
*prog_data
= &pipeline
->cs_prog_data
;
607 struct gl_shader
*cs
= prog
->_LinkedShaders
[MESA_SHADER_COMPUTE
];
610 memset(prog_data
, 0, sizeof(*prog_data
));
612 set_binding_table_layout(&prog_data
->base
, pipeline
, VK_SHADER_STAGE_COMPUTE
);
614 /* Allocate the references to the uniforms that will end up in the
615 * prog_data associated with the compiled program, and which will be freed
616 * by the state cache.
618 int param_count
= cs
->num_uniform_components
;
620 /* The backend also sometimes adds params for texture size. */
621 param_count
+= 2 * ctx
->Const
.Program
[MESA_SHADER_COMPUTE
].MaxTextureImageUnits
;
622 prog_data
->base
.param
=
623 rzalloc_array(NULL
, const gl_constant_value
*, param_count
);
624 prog_data
->base
.pull_param
=
625 rzalloc_array(NULL
, const gl_constant_value
*, param_count
);
626 prog_data
->base
.nr_params
= param_count
;
628 program
= brw_cs_emit(brw
, mem_ctx
, key
, prog_data
,
629 &cp
->program
, prog
, &program_size
);
630 if (program
== NULL
) {
631 ralloc_free(mem_ctx
);
635 if (unlikely(INTEL_DEBUG
& DEBUG_CS
))
636 fprintf(stderr
, "\n");
638 pipeline
->cs_simd
= upload_kernel(pipeline
, program
, program_size
);
640 ralloc_free(mem_ctx
);
646 brw_cs_populate_key(struct brw_context
*brw
,
647 struct brw_compute_program
*bcp
, struct brw_cs_prog_key
*key
)
649 memset(key
, 0, sizeof(*key
));
651 /* The unique compute program ID */
652 key
->program_string_id
= bcp
->id
;
656 fail_on_compile_error(int status
, const char *msg
)
658 int source
, line
, column
;
664 if (sscanf(msg
, "%d:%d(%d): error: %255[^\n]", &source
, &line
, &column
, error
) == 4)
665 fail_if(!status
, "%d:%s\n", line
, error
);
667 fail_if(!status
, "%s\n", msg
);
670 struct anv_compiler
{
671 struct anv_device
*device
;
672 struct intel_screen
*screen
;
673 struct brw_context
*brw
;
674 struct gl_pipeline_object pipeline
;
679 struct anv_compiler
*
680 anv_compiler_create(struct anv_device
*device
)
682 const struct brw_device_info
*devinfo
= &device
->info
;
683 struct anv_compiler
*compiler
;
684 struct gl_context
*ctx
;
686 compiler
= rzalloc(NULL
, struct anv_compiler
);
687 if (compiler
== NULL
)
690 compiler
->screen
= rzalloc(compiler
, struct intel_screen
);
691 if (compiler
->screen
== NULL
)
694 compiler
->brw
= rzalloc(compiler
, struct brw_context
);
695 if (compiler
->brw
== NULL
)
698 compiler
->device
= device
;
700 compiler
->brw
->optionCache
.info
= NULL
;
701 compiler
->brw
->bufmgr
= NULL
;
702 compiler
->brw
->gen
= devinfo
->gen
;
703 compiler
->brw
->is_g4x
= devinfo
->is_g4x
;
704 compiler
->brw
->is_baytrail
= devinfo
->is_baytrail
;
705 compiler
->brw
->is_haswell
= devinfo
->is_haswell
;
706 compiler
->brw
->is_cherryview
= devinfo
->is_cherryview
;
708 /* We need this at least for CS, which will check brw->max_cs_threads
709 * against the work group size. */
710 compiler
->brw
->max_vs_threads
= devinfo
->max_vs_threads
;
711 compiler
->brw
->max_hs_threads
= devinfo
->max_hs_threads
;
712 compiler
->brw
->max_ds_threads
= devinfo
->max_ds_threads
;
713 compiler
->brw
->max_gs_threads
= devinfo
->max_gs_threads
;
714 compiler
->brw
->max_wm_threads
= devinfo
->max_wm_threads
;
715 compiler
->brw
->max_cs_threads
= devinfo
->max_cs_threads
;
716 compiler
->brw
->urb
.size
= devinfo
->urb
.size
;
717 compiler
->brw
->urb
.min_vs_entries
= devinfo
->urb
.min_vs_entries
;
718 compiler
->brw
->urb
.max_vs_entries
= devinfo
->urb
.max_vs_entries
;
719 compiler
->brw
->urb
.max_hs_entries
= devinfo
->urb
.max_hs_entries
;
720 compiler
->brw
->urb
.max_ds_entries
= devinfo
->urb
.max_ds_entries
;
721 compiler
->brw
->urb
.max_gs_entries
= devinfo
->urb
.max_gs_entries
;
723 compiler
->brw
->intelScreen
= compiler
->screen
;
724 compiler
->screen
->devinfo
= &device
->info
;
726 brw_process_intel_debug_variable(compiler
->screen
);
728 compiler
->screen
->compiler
= brw_compiler_create(compiler
, &device
->info
);
730 ctx
= &compiler
->brw
->ctx
;
731 _mesa_init_shader_object_functions(&ctx
->Driver
);
733 _mesa_init_constants(&ctx
->Const
, API_OPENGL_CORE
);
735 brw_initialize_context_constants(compiler
->brw
);
737 intelInitExtensions(ctx
);
739 /* Set dd::NewShader */
740 brwInitFragProgFuncs(&ctx
->Driver
);
742 ctx
->_Shader
= &compiler
->pipeline
;
744 compiler
->brw
->precompile
= false;
749 ralloc_free(compiler
);
754 anv_compiler_destroy(struct anv_compiler
*compiler
)
756 _mesa_free_errors_data(&compiler
->brw
->ctx
);
757 ralloc_free(compiler
);
760 /* From gen7_urb.c */
762 /* FIXME: Add to struct intel_device_info */
764 static const int gen8_push_size
= 32 * 1024;
767 gen7_compute_urb_partition(struct anv_pipeline
*pipeline
)
769 const struct brw_device_info
*devinfo
= &pipeline
->device
->info
;
770 bool vs_present
= pipeline
->vs_simd8
!= NO_KERNEL
;
771 unsigned vs_size
= vs_present
? pipeline
->vs_prog_data
.base
.urb_entry_size
: 1;
772 unsigned vs_entry_size_bytes
= vs_size
* 64;
773 bool gs_present
= pipeline
->gs_vec4
!= NO_KERNEL
;
774 unsigned gs_size
= gs_present
? pipeline
->gs_prog_data
.base
.urb_entry_size
: 1;
775 unsigned gs_entry_size_bytes
= gs_size
* 64;
777 /* From p35 of the Ivy Bridge PRM (section 1.7.1: 3DSTATE_URB_GS):
779 * VS Number of URB Entries must be divisible by 8 if the VS URB Entry
780 * Allocation Size is less than 9 512-bit URB entries.
782 * Similar text exists for GS.
784 unsigned vs_granularity
= (vs_size
< 9) ? 8 : 1;
785 unsigned gs_granularity
= (gs_size
< 9) ? 8 : 1;
787 /* URB allocations must be done in 8k chunks. */
788 unsigned chunk_size_bytes
= 8192;
790 /* Determine the size of the URB in chunks. */
791 unsigned urb_chunks
= devinfo
->urb
.size
* 1024 / chunk_size_bytes
;
793 /* Reserve space for push constants */
794 unsigned push_constant_bytes
= gen8_push_size
;
795 unsigned push_constant_chunks
=
796 push_constant_bytes
/ chunk_size_bytes
;
798 /* Initially, assign each stage the minimum amount of URB space it needs,
799 * and make a note of how much additional space it "wants" (the amount of
800 * additional space it could actually make use of).
803 /* VS has a lower limit on the number of URB entries */
805 ALIGN(devinfo
->urb
.min_vs_entries
* vs_entry_size_bytes
,
806 chunk_size_bytes
) / chunk_size_bytes
;
808 ALIGN(devinfo
->urb
.max_vs_entries
* vs_entry_size_bytes
,
809 chunk_size_bytes
) / chunk_size_bytes
- vs_chunks
;
811 unsigned gs_chunks
= 0;
812 unsigned gs_wants
= 0;
814 /* There are two constraints on the minimum amount of URB space we can
817 * (1) We need room for at least 2 URB entries, since we always operate
818 * the GS in DUAL_OBJECT mode.
820 * (2) We can't allocate less than nr_gs_entries_granularity.
822 gs_chunks
= ALIGN(MAX2(gs_granularity
, 2) * gs_entry_size_bytes
,
823 chunk_size_bytes
) / chunk_size_bytes
;
825 ALIGN(devinfo
->urb
.max_gs_entries
* gs_entry_size_bytes
,
826 chunk_size_bytes
) / chunk_size_bytes
- gs_chunks
;
829 /* There should always be enough URB space to satisfy the minimum
830 * requirements of each stage.
832 unsigned total_needs
= push_constant_chunks
+ vs_chunks
+ gs_chunks
;
833 assert(total_needs
<= urb_chunks
);
835 /* Mete out remaining space (if any) in proportion to "wants". */
836 unsigned total_wants
= vs_wants
+ gs_wants
;
837 unsigned remaining_space
= urb_chunks
- total_needs
;
838 if (remaining_space
> total_wants
)
839 remaining_space
= total_wants
;
840 if (remaining_space
> 0) {
841 unsigned vs_additional
= (unsigned)
842 round(vs_wants
* (((double) remaining_space
) / total_wants
));
843 vs_chunks
+= vs_additional
;
844 remaining_space
-= vs_additional
;
845 gs_chunks
+= remaining_space
;
848 /* Sanity check that we haven't over-allocated. */
849 assert(push_constant_chunks
+ vs_chunks
+ gs_chunks
<= urb_chunks
);
851 /* Finally, compute the number of entries that can fit in the space
852 * allocated to each stage.
854 unsigned nr_vs_entries
= vs_chunks
* chunk_size_bytes
/ vs_entry_size_bytes
;
855 unsigned nr_gs_entries
= gs_chunks
* chunk_size_bytes
/ gs_entry_size_bytes
;
857 /* Since we rounded up when computing *_wants, this may be slightly more
858 * than the maximum allowed amount, so correct for that.
860 nr_vs_entries
= MIN2(nr_vs_entries
, devinfo
->urb
.max_vs_entries
);
861 nr_gs_entries
= MIN2(nr_gs_entries
, devinfo
->urb
.max_gs_entries
);
863 /* Ensure that we program a multiple of the granularity. */
864 nr_vs_entries
= ROUND_DOWN_TO(nr_vs_entries
, vs_granularity
);
865 nr_gs_entries
= ROUND_DOWN_TO(nr_gs_entries
, gs_granularity
);
867 /* Finally, sanity check to make sure we have at least the minimum number
868 * of entries needed for each stage.
870 assert(nr_vs_entries
>= devinfo
->urb
.min_vs_entries
);
872 assert(nr_gs_entries
>= 2);
874 /* Lay out the URB in the following order:
879 pipeline
->urb
.vs_start
= push_constant_chunks
;
880 pipeline
->urb
.vs_size
= vs_size
;
881 pipeline
->urb
.nr_vs_entries
= nr_vs_entries
;
883 pipeline
->urb
.gs_start
= push_constant_chunks
+ vs_chunks
;
884 pipeline
->urb
.gs_size
= gs_size
;
885 pipeline
->urb
.nr_gs_entries
= nr_gs_entries
;
888 static const struct {
890 gl_shader_stage stage
;
893 { GL_VERTEX_SHADER
, MESA_SHADER_VERTEX
, "vertex" },
894 { GL_TESS_CONTROL_SHADER
, (gl_shader_stage
)-1,"tess control" },
895 { GL_TESS_EVALUATION_SHADER
, (gl_shader_stage
)-1, "tess evaluation" },
896 { GL_GEOMETRY_SHADER
, MESA_SHADER_GEOMETRY
, "geometry" },
897 { GL_FRAGMENT_SHADER
, MESA_SHADER_FRAGMENT
, "fragment" },
898 { GL_COMPUTE_SHADER
, MESA_SHADER_COMPUTE
, "compute" },
908 src_as_glsl(const char *data
)
910 const struct spirv_header
*as_spirv
= (const struct spirv_header
*)data
;
912 /* Check alignment */
913 if ((intptr_t)data
& 0x3) {
917 if (as_spirv
->magic
== SPIR_V_MAGIC_NUMBER
) {
918 /* LunarG back-door */
919 if (as_spirv
->version
== 0)
929 anv_compile_shader_glsl(struct anv_compiler
*compiler
,
930 struct gl_shader_program
*program
,
931 struct anv_pipeline
*pipeline
, uint32_t stage
)
933 struct brw_context
*brw
= compiler
->brw
;
934 struct gl_shader
*shader
;
937 shader
= brw_new_shader(&brw
->ctx
, name
, stage_info
[stage
].token
);
938 fail_if(shader
== NULL
, "failed to create %s shader\n", stage_info
[stage
].name
);
940 shader
->Source
= strdup(src_as_glsl(pipeline
->shaders
[stage
]->module
->data
));
941 _mesa_glsl_compile_shader(&brw
->ctx
, shader
, false, false);
942 fail_on_compile_error(shader
->CompileStatus
, shader
->InfoLog
);
944 program
->Shaders
[program
->NumShaders
] = shader
;
945 program
->NumShaders
++;
949 setup_nir_io(struct gl_program
*prog
,
952 foreach_list_typed(nir_variable
, var
, node
, &shader
->inputs
) {
953 prog
->InputsRead
|= BITFIELD64_BIT(var
->data
.location
);
956 foreach_list_typed(nir_variable
, var
, node
, &shader
->outputs
) {
957 prog
->OutputsWritten
|= BITFIELD64_BIT(var
->data
.location
);
962 anv_compile_shader_spirv(struct anv_compiler
*compiler
,
963 struct gl_shader_program
*program
,
964 struct anv_pipeline
*pipeline
, uint32_t stage
)
966 struct brw_context
*brw
= compiler
->brw
;
967 struct anv_shader
*shader
= pipeline
->shaders
[stage
];
968 struct gl_shader
*mesa_shader
;
971 mesa_shader
= brw_new_shader(&brw
->ctx
, name
, stage_info
[stage
].token
);
972 fail_if(mesa_shader
== NULL
,
973 "failed to create %s shader\n", stage_info
[stage
].name
);
976 case VK_SHADER_STAGE_VERTEX
:
977 mesa_shader
->Program
= &rzalloc(mesa_shader
, struct brw_vertex_program
)->program
.Base
;
979 case VK_SHADER_STAGE_GEOMETRY
:
980 mesa_shader
->Program
= &rzalloc(mesa_shader
, struct brw_geometry_program
)->program
.Base
;
982 case VK_SHADER_STAGE_FRAGMENT
:
983 mesa_shader
->Program
= &rzalloc(mesa_shader
, struct brw_fragment_program
)->program
.Base
;
985 case VK_SHADER_STAGE_COMPUTE
:
986 mesa_shader
->Program
= &rzalloc(mesa_shader
, struct brw_compute_program
)->program
.Base
;
990 mesa_shader
->Program
->Parameters
=
991 rzalloc(mesa_shader
, struct gl_program_parameter_list
);
993 mesa_shader
->Type
= stage_info
[stage
].token
;
994 mesa_shader
->Stage
= stage_info
[stage
].stage
;
996 assert(shader
->module
->size
% 4 == 0);
998 struct gl_shader_compiler_options
*glsl_options
=
999 &compiler
->screen
->compiler
->glsl_compiler_options
[stage_info
[stage
].stage
];
1001 mesa_shader
->Program
->nir
=
1002 spirv_to_nir((uint32_t *)shader
->module
->data
, shader
->module
->size
/ 4,
1003 glsl_options
->NirOptions
);
1004 nir_validate_shader(mesa_shader
->Program
->nir
);
1006 brw_process_nir(mesa_shader
->Program
->nir
,
1007 compiler
->screen
->devinfo
,
1008 NULL
, mesa_shader
->Stage
, false);
1010 setup_nir_io(mesa_shader
->Program
, mesa_shader
->Program
->nir
);
1012 fail_if(mesa_shader
->Program
->nir
== NULL
,
1013 "failed to translate SPIR-V to NIR\n");
1015 program
->Shaders
[program
->NumShaders
] = mesa_shader
;
1016 program
->NumShaders
++;
1020 add_compiled_stage(struct anv_pipeline
*pipeline
, uint32_t stage
,
1021 struct brw_stage_prog_data
*prog_data
)
1023 struct brw_device_info
*devinfo
= &pipeline
->device
->info
;
1024 uint32_t max_threads
[] = {
1025 [VK_SHADER_STAGE_VERTEX
] = devinfo
->max_vs_threads
,
1026 [VK_SHADER_STAGE_TESS_CONTROL
] = 0,
1027 [VK_SHADER_STAGE_TESS_EVALUATION
] = 0,
1028 [VK_SHADER_STAGE_GEOMETRY
] = devinfo
->max_gs_threads
,
1029 [VK_SHADER_STAGE_FRAGMENT
] = devinfo
->max_wm_threads
,
1030 [VK_SHADER_STAGE_COMPUTE
] = devinfo
->max_cs_threads
,
1033 pipeline
->prog_data
[stage
] = prog_data
;
1034 pipeline
->active_stages
|= 1 << stage
;
1035 pipeline
->scratch_start
[stage
] = pipeline
->total_scratch
;
1036 pipeline
->total_scratch
=
1037 align_u32(pipeline
->total_scratch
, 1024) +
1038 prog_data
->total_scratch
* max_threads
[stage
];
1042 anv_compiler_run(struct anv_compiler
*compiler
, struct anv_pipeline
*pipeline
)
1044 struct gl_shader_program
*program
;
1046 struct brw_context
*brw
= compiler
->brw
;
1048 pipeline
->writes_point_size
= false;
1050 /* When we free the pipeline, we detect stages based on the NULL status
1051 * of various prog_data pointers. Make them NULL by default.
1053 memset(pipeline
->prog_data
, 0, sizeof(pipeline
->prog_data
));
1054 memset(pipeline
->scratch_start
, 0, sizeof(pipeline
->scratch_start
));
1056 brw
->use_rep_send
= pipeline
->use_repclear
;
1057 brw
->no_simd8
= pipeline
->use_repclear
;
1059 program
= brw
->ctx
.Driver
.NewShaderProgram(name
);
1060 program
->Shaders
= (struct gl_shader
**)
1061 calloc(VK_SHADER_STAGE_NUM
, sizeof(struct gl_shader
*));
1062 fail_if(program
== NULL
|| program
->Shaders
== NULL
,
1063 "failed to create program\n");
1065 bool all_spirv
= true;
1066 for (unsigned i
= 0; i
< VK_SHADER_STAGE_NUM
; i
++) {
1067 if (pipeline
->shaders
[i
] == NULL
)
1070 /* You need at least this much for "void main() { }" anyway */
1071 assert(pipeline
->shaders
[i
]->module
->size
>= 12);
1073 if (src_as_glsl(pipeline
->shaders
[i
]->module
->data
)) {
1078 assert(pipeline
->shaders
[i
]->module
->size
% 4 == 0);
1082 for (unsigned i
= 0; i
< VK_SHADER_STAGE_NUM
; i
++) {
1083 if (pipeline
->shaders
[i
])
1084 anv_compile_shader_spirv(compiler
, program
, pipeline
, i
);
1087 for (unsigned i
= 0; i
< program
->NumShaders
; i
++) {
1088 struct gl_shader
*shader
= program
->Shaders
[i
];
1089 program
->_LinkedShaders
[shader
->Stage
] = shader
;
1092 for (unsigned i
= 0; i
< VK_SHADER_STAGE_NUM
; i
++) {
1093 if (pipeline
->shaders
[i
])
1094 anv_compile_shader_glsl(compiler
, program
, pipeline
, i
);
1097 _mesa_glsl_link_shader(&brw
->ctx
, program
);
1098 fail_on_compile_error(program
->LinkStatus
,
1103 pipeline
->active_stages
= 0;
1104 pipeline
->total_scratch
= 0;
1106 if (pipeline
->shaders
[VK_SHADER_STAGE_VERTEX
]) {
1107 struct brw_vs_prog_key vs_key
;
1108 struct gl_vertex_program
*vp
= (struct gl_vertex_program
*)
1109 program
->_LinkedShaders
[MESA_SHADER_VERTEX
]->Program
;
1110 struct brw_vertex_program
*bvp
= brw_vertex_program(vp
);
1112 brw_vs_populate_key(brw
, bvp
, &vs_key
);
1114 success
= really_do_vs_prog(brw
, program
, bvp
, &vs_key
, pipeline
);
1115 fail_if(!success
, "do_wm_prog failed\n");
1116 add_compiled_stage(pipeline
, VK_SHADER_STAGE_VERTEX
,
1117 &pipeline
->vs_prog_data
.base
.base
);
1119 if (vp
->Base
.OutputsWritten
& VARYING_SLOT_PSIZ
)
1120 pipeline
->writes_point_size
= true;
1122 memset(&pipeline
->vs_prog_data
, 0, sizeof(pipeline
->vs_prog_data
));
1123 pipeline
->vs_simd8
= NO_KERNEL
;
1127 if (pipeline
->shaders
[VK_SHADER_STAGE_GEOMETRY
]) {
1128 struct brw_gs_prog_key gs_key
;
1129 struct gl_geometry_program
*gp
= (struct gl_geometry_program
*)
1130 program
->_LinkedShaders
[MESA_SHADER_GEOMETRY
]->Program
;
1131 struct brw_geometry_program
*bgp
= brw_geometry_program(gp
);
1133 brw_gs_populate_key(brw
, pipeline
, bgp
, &gs_key
);
1135 success
= really_do_gs_prog(brw
, program
, bgp
, &gs_key
, pipeline
);
1136 fail_if(!success
, "do_gs_prog failed\n");
1137 add_compiled_stage(pipeline
, VK_SHADER_STAGE_GEOMETRY
,
1138 &pipeline
->gs_prog_data
.base
.base
);
1140 if (gp
->Base
.OutputsWritten
& VARYING_SLOT_PSIZ
)
1141 pipeline
->writes_point_size
= true;
1143 pipeline
->gs_vec4
= NO_KERNEL
;
1146 if (pipeline
->shaders
[VK_SHADER_STAGE_FRAGMENT
]) {
1147 struct brw_wm_prog_key wm_key
;
1148 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)
1149 program
->_LinkedShaders
[MESA_SHADER_FRAGMENT
]->Program
;
1150 struct brw_fragment_program
*bfp
= brw_fragment_program(fp
);
1152 brw_wm_populate_key(brw
, bfp
, &wm_key
);
1154 success
= really_do_wm_prog(brw
, program
, bfp
, &wm_key
, pipeline
);
1155 fail_if(!success
, "do_wm_prog failed\n");
1156 add_compiled_stage(pipeline
, VK_SHADER_STAGE_FRAGMENT
,
1157 &pipeline
->wm_prog_data
.base
);
1160 if (pipeline
->shaders
[VK_SHADER_STAGE_COMPUTE
]) {
1161 struct brw_cs_prog_key cs_key
;
1162 struct gl_compute_program
*cp
= (struct gl_compute_program
*)
1163 program
->_LinkedShaders
[MESA_SHADER_COMPUTE
]->Program
;
1164 struct brw_compute_program
*bcp
= brw_compute_program(cp
);
1166 brw_cs_populate_key(brw
, bcp
, &cs_key
);
1168 success
= brw_codegen_cs_prog(brw
, program
, bcp
, &cs_key
, pipeline
);
1169 fail_if(!success
, "brw_codegen_cs_prog failed\n");
1170 add_compiled_stage(pipeline
, VK_SHADER_STAGE_COMPUTE
,
1171 &pipeline
->cs_prog_data
.base
);
1174 /* XXX: Deleting the shader is broken with our current SPIR-V hacks. We
1175 * need to fix this ASAP.
1178 brw
->ctx
.Driver
.DeleteShaderProgram(&brw
->ctx
, program
);
1180 struct anv_device
*device
= compiler
->device
;
1181 while (device
->scratch_block_pool
.bo
.size
< pipeline
->total_scratch
)
1182 anv_block_pool_alloc(&device
->scratch_block_pool
);
1184 gen7_compute_urb_partition(pipeline
);
1189 /* This badly named function frees the struct anv_pipeline data that the compiler
1190 * allocates. Currently just the prog_data structs.
1193 anv_compiler_free(struct anv_pipeline
*pipeline
)
1195 for (uint32_t stage
= 0; stage
< VK_SHADER_STAGE_NUM
; stage
++) {
1196 if (pipeline
->prog_data
[stage
]) {
1197 free(pipeline
->prog_data
[stage
]->map_entries
);
1198 ralloc_free(pipeline
->prog_data
[stage
]->param
);
1199 ralloc_free(pipeline
->prog_data
[stage
]->pull_param
);