amd/common: switch to 3-spaces style

[mesa.git] / src / amd / common / ac_shadowed_regs.h

diff --git a/src/amd/common/ac_shadowed_regs.h b/src/amd/common/ac_shadowed_regs.h
index b3f61db70b280889e8383084da09a67614460ed8..df2a7b72fc4dabede8846c1073ed3fff07ca960c 100644 (file)
--- a/src/amd/common/ac_shadowed_regs.h
+++ b/src/amd/common/ac_shadowed_regs.h
@@ -35,7 +35,8 @@ struct ac_reg_range {
    unsigned size;
 };
 
-enum ac_reg_range_type {
+enum ac_reg_range_type
+{
    SI_REG_RANGE_UCONFIG,
    SI_REG_RANGE_CONTEXT,
    SI_REG_RANGE_SH,
@@ -46,14 +47,13 @@ enum ac_reg_range_type {
    SI_NUM_ALL_REG_RANGES,
 };
 
-typedef void (*set_context_reg_seq_array_fn)(struct radeon_cmdbuf *cs, unsigned reg,
-                                             unsigned num, const uint32_t *values);
+typedef void (*set_context_reg_seq_array_fn)(struct radeon_cmdbuf *cs, unsigned reg, unsigned num,
+                                             const uint32_t *values);
 
 void ac_get_reg_ranges(enum chip_class chip_class, enum radeon_family family,
                        enum ac_reg_range_type type, unsigned *num_ranges,
                        const struct ac_reg_range **ranges);
-void ac_emulate_clear_state(const struct radeon_info *info,
-                            struct radeon_cmdbuf *cs,
+void ac_emulate_clear_state(const struct radeon_info *info, struct radeon_cmdbuf *cs,
                             set_context_reg_seq_array_fn set_context_reg_seq_array);
 void ac_check_shadowed_regs(enum chip_class chip_class, enum radeon_family family,
                             unsigned reg_offset, unsigned count);