opcode = &instr_info.opcode_gfx7[0];
else if (chip_class <= GFX9)
opcode = &instr_info.opcode_gfx9[0];
- else if (chip_class == GFX10)
+ else if (chip_class >= GFX10)
opcode = &instr_info.opcode_gfx10[0];
}
void emit_instruction(asm_context& ctx, std::vector<uint32_t>& out, Instruction* instr)
{
- uint32_t instr_offset = out.size() * 4u;
-
/* lower remaining pseudo-instructions */
if (instr->opcode == aco_opcode::p_constaddr) {
unsigned dest = instr->definitions[0].physReg();
encoding |= 255 << 8;
out.push_back(encoding);
ctx.constaddrs.push_back(out.size());
- out.push_back(-(instr_offset + 4) + offset);
+ out.push_back(offset);
/* s_addc_u32 dest[1], dest[1], 0 */
encoding = (0b10 << 30);
instr->opcode == aco_opcode::v_interp_p2_f16) {
if (ctx.chip_class == GFX8 || ctx.chip_class == GFX9) {
encoding = (0b110100 << 26);
- } else if (ctx.chip_class == GFX10) {
+ } else if (ctx.chip_class >= GFX10) {
encoding = (0b110101 << 26);
} else {
unreachable("Unknown chip_class.");
}
case Format::PSEUDO:
case Format::PSEUDO_BARRIER:
- unreachable("Pseudo instructions should be lowered before assembly.");
+ if (instr->opcode != aco_opcode::p_unit_test)
+ unreachable("Pseudo instructions should be lowered before assembly.");
+ break;
default:
if ((uint16_t) instr->format & (uint16_t) Format::VOP3A) {
VOP3A_instruction* vop3 = static_cast<VOP3A_instruction*>(instr);
uint32_t encoding;
if (ctx.chip_class <= GFX9) {
encoding = (0b110100 << 26);
- } else if (ctx.chip_class == GFX10) {
+ } else if (ctx.chip_class >= GFX10) {
encoding = (0b110101 << 26);
} else {
unreachable("Unknown chip_class.");
uint32_t encoding;
if (ctx.chip_class == GFX9) {
encoding = (0b110100111 << 23);
- } else if (ctx.chip_class == GFX10) {
+ } else if (ctx.chip_class >= GFX10) {
encoding = (0b110011 << 26);
} else {
unreachable("Unknown chip_class.");
encoding |= dpp->neg[1] << 22;
encoding |= dpp->abs[0] << 21;
encoding |= dpp->neg[0] << 20;
+ if (ctx.chip_class >= GFX10)
+ encoding |= 1 << 18; /* set Fetch Inactive to match GFX9 behaviour */
encoding |= dpp->bound_ctrl << 19;
encoding |= dpp->dpp_ctrl << 8;
encoding |= (0xFF) & dpp_op.physReg();
void fix_branches(asm_context& ctx, std::vector<uint32_t>& out)
{
- if (ctx.chip_class >= GFX10)
+ if (ctx.chip_class == GFX10)
fix_branches_gfx10(ctx, out);
for (std::pair<int, SOPP_instruction*> &branch : ctx.branches) {
void fix_constaddrs(asm_context& ctx, std::vector<uint32_t>& out)
{
for (unsigned addr : ctx.constaddrs)
- out[addr] += out.size() * 4u;
+ out[addr] += (out.size() - addr + 1u) * 4u;
}
unsigned emit_program(Program* program,