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nir: get ffma support from NIR options for nir_lower_flrp
[mesa.git]
/
src
/
amd
/
compiler
/
aco_opt_value_numbering.cpp
diff --git
a/src/amd/compiler/aco_opt_value_numbering.cpp
b/src/amd/compiler/aco_opt_value_numbering.cpp
index 2fdbfaabd4a1bc6bee1cc4b27f78c7b100729dd6..11aad20a0b09b808d5df31df20dbee558ab68945 100644
(file)
--- a/
src/amd/compiler/aco_opt_value_numbering.cpp
+++ b/
src/amd/compiler/aco_opt_value_numbering.cpp
@@
-219,6
+219,8
@@
struct InstrPred {
switch (a->format) {
case Format::SOPK: {
switch (a->format) {
case Format::SOPK: {
+ if (a->opcode == aco_opcode::s_getreg_b32)
+ return false;
SOPK_instruction* aK = static_cast<SOPK_instruction*>(a);
SOPK_instruction* bK = static_cast<SOPK_instruction*>(b);
return aK->imm == bK->imm;
SOPK_instruction* aK = static_cast<SOPK_instruction*>(a);
SOPK_instruction* bK = static_cast<SOPK_instruction*>(b);
return aK->imm == bK->imm;
@@
-228,8
+230,9
@@
struct InstrPred {
SMEM_instruction* bS = static_cast<SMEM_instruction*>(b);
/* isel shouldn't be creating situations where this assertion fails */
assert(aS->prevent_overflow == bS->prevent_overflow);
SMEM_instruction* bS = static_cast<SMEM_instruction*>(b);
/* isel shouldn't be creating situations where this assertion fails */
assert(aS->prevent_overflow == bS->prevent_overflow);
- return aS->can_reorder && bS->can_reorder &&
- aS->glc == bS->glc && aS->nv == bS->nv &&
+ return aS->sync.can_reorder() && bS->sync.can_reorder() &&
+ aS->sync == bS->sync && aS->glc == bS->glc && aS->dlc == bS->dlc &&
+ aS->nv == bS->nv && aS->disable_wqm == bS->disable_wqm &&
aS->prevent_overflow == bS->prevent_overflow;
}
case Format::VINTRP: {
aS->prevent_overflow == bS->prevent_overflow;
}
case Format::VINTRP: {
@@
-251,8
+254,8
@@
struct InstrPred {
case Format::MTBUF: {
MTBUF_instruction* aM = static_cast<MTBUF_instruction *>(a);
MTBUF_instruction* bM = static_cast<MTBUF_instruction *>(b);
case Format::MTBUF: {
MTBUF_instruction* aM = static_cast<MTBUF_instruction *>(a);
MTBUF_instruction* bM = static_cast<MTBUF_instruction *>(b);
- return aM->
can_reorder && bM->can_reorder
&&
- aM->
barrier == bM->barrier
&&
+ return aM->
sync.can_reorder() && bM->sync.can_reorder()
&&
+ aM->
sync == bM->sync
&&
aM->dfmt == bM->dfmt &&
aM->nfmt == bM->nfmt &&
aM->offset == bM->offset &&
aM->dfmt == bM->dfmt &&
aM->nfmt == bM->nfmt &&
aM->offset == bM->offset &&
@@
-267,8
+270,8
@@
struct InstrPred {
case Format::MUBUF: {
MUBUF_instruction* aM = static_cast<MUBUF_instruction *>(a);
MUBUF_instruction* bM = static_cast<MUBUF_instruction *>(b);
case Format::MUBUF: {
MUBUF_instruction* aM = static_cast<MUBUF_instruction *>(a);
MUBUF_instruction* bM = static_cast<MUBUF_instruction *>(b);
- return aM->
can_reorder && bM->can_reorder
&&
- aM->
barrier == bM->barrier
&&
+ return aM->
sync.can_reorder() && bM->sync.can_reorder()
&&
+ aM->
sync == bM->sync
&&
aM->offset == bM->offset &&
aM->offen == bM->offen &&
aM->idxen == bM->idxen &&
aM->offset == bM->offset &&
aM->offen == bM->offen &&
aM->idxen == bM->idxen &&
@@
-295,7
+298,9
@@
struct InstrPred {
return false;
DS_instruction* aD = static_cast<DS_instruction *>(a);
DS_instruction* bD = static_cast<DS_instruction *>(b);
return false;
DS_instruction* aD = static_cast<DS_instruction *>(a);
DS_instruction* bD = static_cast<DS_instruction *>(b);
- return aD->pass_flags == bD->pass_flags &&
+ return aD->sync.can_reorder() && bD->sync.can_reorder() &&
+ aD->sync == bD->sync &&
+ aD->pass_flags == bD->pass_flags &&
aD->gds == bD->gds &&
aD->offset0 == bD->offset0 &&
aD->offset1 == bD->offset1;
aD->gds == bD->gds &&
aD->offset0 == bD->offset0 &&
aD->offset1 == bD->offset1;
@@
-303,8
+308,8
@@
struct InstrPred {
case Format::MIMG: {
MIMG_instruction* aM = static_cast<MIMG_instruction*>(a);
MIMG_instruction* bM = static_cast<MIMG_instruction*>(b);
case Format::MIMG: {
MIMG_instruction* aM = static_cast<MIMG_instruction*>(a);
MIMG_instruction* bM = static_cast<MIMG_instruction*>(b);
- return aM->
can_reorder && bM->can_reorder
&&
- aM->
barrier == bM->barrier
&&
+ return aM->
sync.can_reorder() && bM->sync.can_reorder()
&&
+ aM->
sync == bM->sync
&&
aM->dmask == bM->dmask &&
aM->unrm == bM->unrm &&
aM->glc == bM->glc &&
aM->dmask == bM->dmask &&
aM->unrm == bM->unrm &&
aM->glc == bM->glc &&