aco: set tcs_in_out_eq=false if float controls of VS and TCS stages differ

[mesa.git] / src / amd / compiler / aco_validate.cpp

diff --git a/src/amd/compiler/aco_validate.cpp b/src/amd/compiler/aco_validate.cpp
index 90272433f858101444492bfb1b8f607eeb502084..83457e54fdfefcedb6a8500715d7bcc634d56ef3 100644 (file)
--- a/src/amd/compiler/aco_validate.cpp
+++ b/src/amd/compiler/aco_validate.cpp
@@ -159,11 +159,11 @@ void validate(Program* program, FILE * output)
          if (instr->isVOP3()) {
             VOP3A_instruction *vop3 = static_cast<VOP3A_instruction*>(instr.get());
             check(vop3->opsel == 0 || program->chip_class >= GFX9, "Opsel is only supported on GFX9+", instr.get());
-            check((vop3->opsel & ~(0x10 | ((1 << instr->operands.size()) - 1))) == 0, "Unused bits in opsel must be zeroed out", instr.get());
 
-            for (unsigned i = 0; i < instr->operands.size(); i++) {
-               if (instr->operands[i].hasRegClass() && instr->operands[i].regClass().is_subdword() && !instr->operands[i].isFixed())
-                  check((vop3->opsel & (1 << i)) == 0, "Unexpected opsel for sub-dword operand", instr.get());
+            for (unsigned i = 0; i < 3; i++) {
+               if (i >= instr->operands.size() ||
+                   (instr->operands[i].hasRegClass() && instr->operands[i].regClass().is_subdword() && !instr->operands[i].isFixed()))
+                  check((vop3->opsel & (1 << i)) == 0, "Unexpected opsel for operand", instr.get());
             }
             if (instr->definitions[0].regClass().is_subdword() && !instr->definitions[0].isFixed())
                check((vop3->opsel & (1 << 3)) == 0, "Unexpected opsel for sub-dword definition", instr.get());
@@ -226,12 +226,17 @@ void validate(Program* program, FILE * output)
                if (instr->isSDWA())
                   scalar_mask = program->chip_class >= GFX9 ? 0x7 : 0x4;
 
-               check(instr->definitions[0].getTemp().type() == RegType::vgpr ||
-                     (int) instr->format & (int) Format::VOPC ||
-                     instr->opcode == aco_opcode::v_readfirstlane_b32 ||
-                     instr->opcode == aco_opcode::v_readlane_b32 ||
-                     instr->opcode == aco_opcode::v_readlane_b32_e64,
-                     "Wrong Definition type for VALU instruction", instr.get());
+               if ((int) instr->format & (int) Format::VOPC ||
+                   instr->opcode == aco_opcode::v_readfirstlane_b32 ||
+                   instr->opcode == aco_opcode::v_readlane_b32 ||
+                   instr->opcode == aco_opcode::v_readlane_b32_e64) {
+                  check(instr->definitions[0].getTemp().type() == RegType::sgpr,
+                        "Wrong Definition type for VALU instruction", instr.get());
+               } else {
+                  check(instr->definitions[0].getTemp().type() == RegType::vgpr,
+                        "Wrong Definition type for VALU instruction", instr.get());
+               }
+
                unsigned num_sgprs = 0;
                unsigned sgpr[] = {0, 0};
                for (unsigned i = 0; i < instr->operands.size(); i++)
@@ -239,11 +244,26 @@ void validate(Program* program, FILE * output)
                   Operand op = instr->operands[i];
                   if (instr->opcode == aco_opcode::v_readfirstlane_b32 ||
                       instr->opcode == aco_opcode::v_readlane_b32 ||
-                      instr->opcode == aco_opcode::v_readlane_b32_e64 ||
-                      instr->opcode == aco_opcode::v_writelane_b32 ||
+                      instr->opcode == aco_opcode::v_readlane_b32_e64) {
+                     check(i != 1 ||
+                           (op.isTemp() && op.regClass().type() == RegType::sgpr) ||
+                           op.isConstant(),
+                           "Must be a SGPR or a constant", instr.get());
+                     check(i == 1 ||
+                           (op.isTemp() && op.regClass().type() == RegType::vgpr && op.bytes() <= 4),
+                           "Wrong Operand type for VALU instruction", instr.get());
+                     continue;
+                  }
+
+                  if (instr->opcode == aco_opcode::v_writelane_b32 ||
                       instr->opcode == aco_opcode::v_writelane_b32_e64) {
-                     check(!op.isLiteral(), "No literal allowed on VALU instruction", instr.get());
-                     check(i == 1 || (op.isTemp() && op.regClass().type() == RegType::vgpr && op.bytes() <= 4), "Wrong Operand type for VALU instruction", instr.get());
+                     check(i != 2 ||
+                           (op.isTemp() && op.regClass().type() == RegType::vgpr && op.bytes() <= 4),
+                           "Wrong Operand type for VALU instruction", instr.get());
+                     check(i == 2 ||
+                           (op.isTemp() && op.regClass().type() == RegType::sgpr) ||
+                           op.isConstant(),
+                           "Must be a SGPR or a constant", instr.get());
                      continue;
                   }
                   if (op.isTemp() && instr->operands[i].regClass().type() == RegType::sgpr) {