unsigned type_size = ac_get_type_size(LLVMTypeOf(den));
const char *name;
+ /* For doubles, we need precise division to pass GLCTS. */
+ if (ctx->float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL &&
+ type_size == 8)
+ return LLVMBuildFDiv(ctx->builder, num, den, "");
+
if (type_size == 2)
name = "llvm.amdgcn.rcp.f16";
else if (type_size == 4)
ctx->voidt, args, 1, 0);
}
-LLVMValueRef ac_build_fmed3(struct ac_llvm_context *ctx, LLVMValueRef src0,
- LLVMValueRef src1, LLVMValueRef src2,
- unsigned bitsize)
-{
- LLVMValueRef result;
-
- if (bitsize == 64 || (bitsize == 16 && ctx->chip_class <= GFX8)) {
- /* Lower 64-bit fmed because LLVM doesn't expose an intrinsic,
- * or lower 16-bit fmed because it's only supported on GFX9+.
- */
- LLVMValueRef min1, min2, max1;
-
- min1 = ac_build_fmin(ctx, src0, src1);
- max1 = ac_build_fmax(ctx, src0, src1);
- min2 = ac_build_fmin(ctx, max1, src2);
-
- result = ac_build_fmax(ctx, min2, min1);
- } else {
- LLVMTypeRef type;
- char *intr;
-
- if (bitsize == 16) {
- intr = "llvm.amdgcn.fmed3.f16";
- type = ctx->f16;
- } else {
- assert(bitsize == 32);
- intr = "llvm.amdgcn.fmed3.f32";
- type = ctx->f32;
- }
-
- LLVMValueRef params[] = {
- src0,
- src1,
- src2,
- };
-
- result = ac_build_intrinsic(ctx, intr, type, params, 3,
- AC_FUNC_ATTR_READNONE);
- }
-
- if (ctx->chip_class < GFX9 && bitsize == 32) {
- /* Only pre-GFX9 chips do not flush denorms. */
- result = ac_build_canonicalize(ctx, result, bitsize);
- }
-
- return result;
-}
-
LLVMValueRef ac_build_fract(struct ac_llvm_context *ctx, LLVMValueRef src0,
unsigned bitsize)
{
if (LLVMGetTypeKind(LLVMTypeOf(P)) == LLVMPointerTypeKind) {
ac_add_function_attr(ctx->context, main_function, i + 1, AC_FUNC_ATTR_NOALIAS);
ac_add_attr_dereferenceable(P, UINT64_MAX);
+ ac_add_attr_alignment(P, 32);
}
}