amd/registers: add missing TBA registers on GFX6-GFX8

[mesa.git] / src / amd / registers / amdgfxregs.json

diff --git a/src/amd/registers/amdgfxregs.json b/src/amd/registers/amdgfxregs.json
index 1cee6ed57b24267b74df920d8c217648b6d9075e..bb8dffb2df8e13f23426124e7ffebe5c9021ec2f 100644 (file)
--- a/src/amd/registers/amdgfxregs.json
+++ b/src/amd/registers/amdgfxregs.json
@@ -3288,6 +3288,11 @@
    "name": "COMPUTE_WAVE_RESTORE_CONTROL",
    "type_ref": "COMPUTE_WAVE_RESTORE_CONTROL"
   },
+  {
+   "chips": ["gfx9"],
+   "map": {"at": 47252, "to": "mm"},
+   "name": "COMPUTE_SHADER_CHKSUM"
+  },
   {
    "chips": ["gfx9"],
    "map": {"at": 213048, "to": "mm"},
@@ -6258,6 +6263,11 @@
    "name": "PA_SC_SCREEN_EXTENT_MAX_1",
    "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"
   },
+  {
+   "chips": ["gfx9"],
+   "map": {"at": 199380, "to": "mm"},
+   "name": "PA_STATE_STEREO_X"
+  },
   {
    "chips": ["gfx7", "fiji", "gfx9", "stoney", "gfx8"],
    "map": {"at": 199872, "to": "mm"},
@@ -6330,7 +6340,13 @@
    "type_ref": "SQ_THREAD_TRACE_HIWATER"
   },
   {
-   "chips": ["gfx7", "fiji", "gfx9", "stoney", "gfx8"],
+   "chips": ["gfx7", "fiji", "stoney", "gfx8"],
+   "map": {"at": 36416, "to": "mm"},
+   "name": "SQ_THREAD_TRACE_CNTR",
+   "type_ref": "SQ_THREAD_TRACE_CNTR"
+  },
+  {
+   "chips": ["gfx9"],
    "map": {"at": 199920, "to": "mm"},
    "name": "SQ_THREAD_TRACE_CNTR",
    "type_ref": "SQ_THREAD_TRACE_CNTR"
@@ -6967,6 +6983,12 @@
    "map": {"at": 217608, "to": "mm"},
    "name": "RLC_PERFCOUNTER1_LO"
   },
+  {
+   "chips": ["gfx7", "fiji", "gfx6", "stoney", "gfx8", "gfx9"],
+   "map": {"at": 226044, "to": "mm"},
+   "name": "RLC_PERFMON_CLK_CNTL",
+   "type_ref": "RLC_PERFMON_CLK_CNTL"
+  },
   {
    "chips": ["gfx7", "fiji", "gfx6", "stoney", "gfx8"],
    "map": {"at": 53300, "to": "mm"},
@@ -7891,6 +7913,66 @@
    "name": "SPI_SHADER_PGM_HI_GS",
    "type_ref": "SPI_SHADER_TBA_HI_PS"
   },
+  {
+   "chips": ["gfx7", "fiji", "gfx6", "stoney", "gfx8"],
+   "map": {"at": 45060, "to": "mm"},
+   "name": "SPI_SHADER_TBA_HI_PS"
+  },
+  {
+   "chips": ["gfx7", "fiji", "gfx6", "stoney", "gfx8"],
+   "map": {"at": 45316, "to": "mm"},
+   "name": "SPI_SHADER_TBA_HI_VS"
+  },
+  {
+   "chips": ["gfx7", "fiji", "gfx6", "stoney", "gfx8"],
+   "map": {"at": 45572, "to": "mm"},
+   "name": "SPI_SHADER_TBA_HI_GS"
+  },
+  {
+   "chips": ["gfx7", "fiji", "gfx6", "stoney", "gfx8"],
+   "map": {"at": 45828, "to": "mm"},
+   "name": "SPI_SHADER_TBA_HI_ES"
+  },
+  {
+   "chips": ["gfx7", "fiji", "gfx6", "stoney", "gfx8"],
+   "map": {"at": 46084, "to": "mm"},
+   "name": "SPI_SHADER_TBA_HI_HS"
+  },
+  {
+   "chips": ["gfx7", "fiji", "gfx6", "stoney", "gfx8"],
+   "map": {"at": 46340, "to": "mm"},
+   "name": "SPI_SHADER_TBA_HI_LS"
+  },
+  {
+   "chips": ["gfx7", "fiji", "gfx6", "stoney", "gfx8"],
+   "map": {"at": 45056, "to": "mm"},
+   "name": "SPI_SHADER_TBA_LO_PS"
+  },
+  {
+   "chips": ["gfx7", "fiji", "gfx6", "stoney", "gfx8"],
+   "map": {"at": 45312, "to": "mm"},
+   "name": "SPI_SHADER_TBA_LO_VS"
+  },
+  {
+   "chips": ["gfx7", "fiji", "gfx6", "stoney", "gfx8"],
+   "map": {"at": 45568, "to": "mm"},
+   "name": "SPI_SHADER_TBA_LO_GS"
+  },
+  {
+   "chips": ["gfx7", "fiji", "gfx6", "stoney", "gfx8"],
+   "map": {"at": 45824, "to": "mm"},
+   "name": "SPI_SHADER_TBA_LO_ES"
+  },
+  {
+   "chips": ["gfx7", "fiji", "gfx6", "stoney", "gfx8"],
+   "map": {"at": 46080, "to": "mm"},
+   "name": "SPI_SHADER_TBA_LO_HS"
+  },
+  {
+   "chips": ["gfx7", "fiji", "gfx6", "stoney", "gfx8"],
+   "map": {"at": 46336, "to": "mm"},
+   "name": "SPI_SHADER_TBA_LO_LS"
+  },
   {
    "chips": ["gfx7", "fiji", "gfx9", "gfx6", "stoney", "gfx8"],
    "map": {"at": 46116, "to": "mm"},
@@ -15203,7 +15285,8 @@
     {"bits": [8, 11], "name": "SIMD_EN"},
     {"bits": [12, 13], "name": "VM_ID_MASK"},
     {"bits": [14, 14], "name": "SPI_STALL_EN"},
-    {"bits": [15, 15], "name": "SQ_STALL_EN"}
+    {"bits": [15, 15], "name": "SQ_STALL_EN"},
+    {"bits": [16, 31], "comment": "not on GFX9", "name": "RANDOM_SEED"}
    ]
   },
   "SQ_THREAD_TRACE_TOKEN_MASK": {
@@ -15257,7 +15340,7 @@
    "fields": [
     {"bits": [0, 9], "name": "FINISH_PENDING"},
     {"bits": [16, 25], "name": "FINISH_DONE"},
-    {"bits": [28, 28], "name": "UTC_ERROR"},
+    {"bits": [28, 28], "comment": "only on GFX9", "name": "UTC_ERROR"},
     {"bits": [29, 29], "name": "NEW_BUF"},
     {"bits": [30, 30], "name": "BUSY"},
     {"bits": [31, 31], "name": "FULL"}