radv: Override the uniform buffer offset alignment for World War Z.

[mesa.git] / src / amd / vulkan / radv_device.c

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 0f40db2cceb468ae16012a2904401e49e42b4b4a..dda535d553822d4468f9bb6c1dda5f55e2c2c24e 100644 (file)
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -615,6 +615,7 @@ DRI_CONF_BEGIN
                DRI_CONF_RADV_REPORT_LLVM9_VERSION_STRING("false")
                DRI_CONF_RADV_ENABLE_MRT_OUTPUT_NAN_FIXUP("false")
                DRI_CONF_RADV_NO_DYNAMIC_BOUNDS("false")
+               DRI_CONF_RADV_OVERRIDE_UNIFORM_OFFSET_ALIGNMENT(0)
        DRI_CONF_SECTION_END
 
        DRI_CONF_SECTION_DEBUG
@@ -1445,6 +1446,21 @@ radv_max_descriptor_set_size()
                   64 /* storage image */);
 }
 
+static uint32_t
+radv_uniform_buffer_offset_alignment(const struct radv_physical_device *pdevice)
+{
+       uint32_t uniform_offset_alignment = driQueryOptioni(&pdevice->instance->dri_options,
+                                                          "radv_override_uniform_offset_alignment");
+       if (!util_is_power_of_two_or_zero(uniform_offset_alignment)) {
+               fprintf(stderr, "ERROR: invalid radv_override_uniform_offset_alignment setting %d:"
+                               "not a power of two\n", uniform_offset_alignment);
+               uniform_offset_alignment = 0;
+       }
+
+       /* Take at least the hardware limit. */
+       return MAX2(uniform_offset_alignment, 4);
+}
+
 void radv_GetPhysicalDeviceProperties(
        VkPhysicalDevice                            physicalDevice,
        VkPhysicalDeviceProperties*                 pProperties)
@@ -1527,7 +1543,7 @@ void radv_GetPhysicalDeviceProperties(
                .viewportSubPixelBits                     = 8,
                .minMemoryMapAlignment                    = 4096, /* A page */
                .minTexelBufferOffsetAlignment            = 4,
-               .minUniformBufferOffsetAlignment          = 4,
+               .minUniformBufferOffsetAlignment          = radv_uniform_buffer_offset_alignment(pdevice),
                .minStorageBufferOffsetAlignment          = 4,
                .minTexelOffset                           = -32,
                .maxTexelOffset                           = 31,