nir: Add new system values and intrinsics for dealing with CL work offsets

[mesa.git] / src / amd / vulkan / radv_meta_resolve_cs.c

diff --git a/src/amd/vulkan/radv_meta_resolve_cs.c b/src/amd/vulkan/radv_meta_resolve_cs.c
index 7d3cc166e0d79496dda507e62e195a48fd66b60d..e1e307770626b37f05ca5f743ed18640ab9fc626 100644 (file)
--- a/src/amd/vulkan/radv_meta_resolve_cs.c
+++ b/src/amd/vulkan/radv_meta_resolve_cs.c
@@ -73,10 +73,9 @@ build_resolve_compute_shader(struct radv_device *dev, bool is_integer, bool is_s
                                                                 false,
                                                                 false,
                                                                 GLSL_TYPE_FLOAT);
-       const struct glsl_type *img_type = glsl_sampler_type(GLSL_SAMPLER_DIM_2D,
-                                                            false,
-                                                            false,
-                                                            GLSL_TYPE_FLOAT);
+       const struct glsl_type *img_type = glsl_image_type(GLSL_SAMPLER_DIM_2D,
+                                                          false,
+                                                          GLSL_TYPE_FLOAT);
        snprintf(name, 64, "meta_resolve_cs-%d-%s", samples, is_integer ? "int" : (is_srgb ? "srgb" : "float"));
        nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_COMPUTE, NULL);
        b.shader->info.name = ralloc_strdup(b.shader, name);
@@ -94,7 +93,7 @@ build_resolve_compute_shader(struct radv_device *dev, bool is_integer, bool is_s
        output_img->data.descriptor_set = 0;
        output_img->data.binding = 1;
        nir_ssa_def *invoc_id = nir_load_local_invocation_id(&b);
-       nir_ssa_def *wg_id = nir_load_work_group_id(&b);
+       nir_ssa_def *wg_id = nir_load_work_group_id(&b, 32);
        nir_ssa_def *block_size = nir_imm_ivec4(&b,
                                                b.shader->info.cs.local_size[0],
                                                b.shader->info.cs.local_size[1],
@@ -135,6 +134,7 @@ build_resolve_compute_shader(struct radv_device *dev, bool is_integer, bool is_s
        store->src[1] = nir_src_for_ssa(coord);
        store->src[2] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32));
        store->src[3] = nir_src_for_ssa(outval);
+       store->src[4] = nir_src_for_ssa(nir_imm_int(&b, 0));
        nir_builder_instr_insert(&b, &store->instr);
        return b.shader;
 }
@@ -145,7 +145,7 @@ enum {
 };
 
 static const char *
-get_resolve_mode_str(VkResolveModeFlagBitsKHR resolve_mode)
+get_resolve_mode_str(VkResolveModeFlagBits resolve_mode)
 {
        switch (resolve_mode) {
        case VK_RESOLVE_MODE_SAMPLE_ZERO_BIT_KHR:
@@ -164,7 +164,7 @@ get_resolve_mode_str(VkResolveModeFlagBitsKHR resolve_mode)
 static nir_shader *
 build_depth_stencil_resolve_compute_shader(struct radv_device *dev, int samples,
                                           int index,
-                                          VkResolveModeFlagBitsKHR resolve_mode)
+                                          VkResolveModeFlagBits resolve_mode)
 {
        nir_builder b;
        char name[64];
@@ -172,10 +172,9 @@ build_depth_stencil_resolve_compute_shader(struct radv_device *dev, int samples,
                                                                 false,
                                                                 false,
                                                                 GLSL_TYPE_FLOAT);
-       const struct glsl_type *img_type = glsl_sampler_type(GLSL_SAMPLER_DIM_2D,
-                                                            false,
-                                                            false,
-                                                            GLSL_TYPE_FLOAT);
+       const struct glsl_type *img_type = glsl_image_type(GLSL_SAMPLER_DIM_2D,
+                                                          false,
+                                                          GLSL_TYPE_FLOAT);
        snprintf(name, 64, "meta_resolve_cs_%s-%s-%d",
                 index == DEPTH_RESOLVE ? "depth" : "stencil",
                 get_resolve_mode_str(resolve_mode), samples);
@@ -196,7 +195,7 @@ build_depth_stencil_resolve_compute_shader(struct radv_device *dev, int samples,
        output_img->data.descriptor_set = 0;
        output_img->data.binding = 1;
        nir_ssa_def *invoc_id = nir_load_local_invocation_id(&b);
-       nir_ssa_def *wg_id = nir_load_work_group_id(&b);
+       nir_ssa_def *wg_id = nir_load_work_group_id(&b, 32);
        nir_ssa_def *block_size = nir_imm_ivec4(&b,
                                                b.shader->info.cs.local_size[0],
                                                b.shader->info.cs.local_size[1],
@@ -295,6 +294,7 @@ build_depth_stencil_resolve_compute_shader(struct radv_device *dev, int samples,
        store->src[1] = nir_src_for_ssa(coord);
        store->src[2] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32));
        store->src[3] = nir_src_for_ssa(outval);
+       store->src[4] = nir_src_for_ssa(nir_imm_int(&b, 0));
        nir_builder_instr_insert(&b, &store->instr);
        return b.shader;
 }
@@ -411,7 +411,7 @@ static VkResult
 create_depth_stencil_resolve_pipeline(struct radv_device *device,
                                      int samples,
                                      int index,
-                                     VkResolveModeFlagBitsKHR resolve_mode,
+                                     VkResolveModeFlagBits resolve_mode,
                                      VkPipeline *pipeline)
 {
        VkResult result;
@@ -705,7 +705,7 @@ emit_depth_stencil_resolve(struct radv_cmd_buffer *cmd_buffer,
                           const VkOffset2D *dest_offset,
                           const VkExtent2D *resolve_extent,
                           VkImageAspectFlags aspects,
-                          VkResolveModeFlagBitsKHR resolve_mode)
+                          VkResolveModeFlagBits resolve_mode)
 {
        struct radv_device *device = cmd_buffer->device;
        const uint32_t samples = src_iview->image->info.samples;
@@ -863,7 +863,7 @@ void radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer,
                                                             .baseArrayLayer = src_base_layer + layer,
                                                             .layerCount = 1,
                                                     },
-                                            });
+                                            }, NULL);
 
                        struct radv_image_view dest_iview;
                        radv_image_view_init(&dest_iview, cmd_buffer->device,
@@ -879,7 +879,7 @@ void radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer,
                                                             .baseArrayLayer = dest_base_layer + layer,
                                                             .layerCount = 1,
                                                     },
-                                            });
+                                            }, NULL);
 
                        emit_resolve(cmd_buffer,
                                     &src_iview,
@@ -917,12 +917,13 @@ radv_cmd_buffer_resolve_subpass_cs(struct radv_cmd_buffer *cmd_buffer)
        for (uint32_t i = 0; i < subpass->color_count; ++i) {
                struct radv_subpass_attachment src_att = subpass->color_attachments[i];
                struct radv_subpass_attachment dst_att = subpass->resolve_attachments[i];
-               struct radv_image_view *src_iview = fb->attachments[src_att.attachment].attachment;
-               struct radv_image_view *dst_iview = fb->attachments[dst_att.attachment].attachment;
 
                if (dst_att.attachment == VK_ATTACHMENT_UNUSED)
                        continue;
 
+               struct radv_image_view *src_iview = cmd_buffer->state.attachments[src_att.attachment].iview;
+               struct radv_image_view *dst_iview = cmd_buffer->state.attachments[dst_att.attachment].iview;
+
                VkImageResolve region = {
                        .extent = (VkExtent3D){ fb->width, fb->height, 0 },
                        .srcSubresource = (VkImageSubresourceLayers) {
@@ -958,7 +959,7 @@ radv_cmd_buffer_resolve_subpass_cs(struct radv_cmd_buffer *cmd_buffer)
 void
 radv_depth_stencil_resolve_subpass_cs(struct radv_cmd_buffer *cmd_buffer,
                                      VkImageAspectFlags aspects,
-                                     VkResolveModeFlagBitsKHR resolve_mode)
+                                     VkResolveModeFlagBits resolve_mode)
 {
        struct radv_framebuffer *fb = cmd_buffer->state.framebuffer;
        const struct radv_subpass *subpass = cmd_buffer->state.subpass;
@@ -988,9 +989,9 @@ radv_depth_stencil_resolve_subpass_cs(struct radv_cmd_buffer *cmd_buffer,
        struct radv_subpass_attachment dest_att = *subpass->ds_resolve_attachment;
 
        struct radv_image_view *src_iview =
-               cmd_buffer->state.framebuffer->attachments[src_att.attachment].attachment;
+               cmd_buffer->state.attachments[src_att.attachment].iview;
        struct radv_image_view *dst_iview =
-               cmd_buffer->state.framebuffer->attachments[dest_att.attachment].attachment;
+               cmd_buffer->state.attachments[dest_att.attachment].iview;
 
        struct radv_image *src_image = src_iview->image;
        struct radv_image *dst_image = dst_iview->image;
@@ -1010,7 +1011,7 @@ radv_depth_stencil_resolve_subpass_cs(struct radv_cmd_buffer *cmd_buffer,
                                                .baseArrayLayer = src_iview->base_layer + layer,
                                                .layerCount = 1,
                                        },
-                                    });
+                                    }, NULL);
 
                struct radv_image_view tdst_iview;
                radv_image_view_init(&tdst_iview, cmd_buffer->device,
@@ -1026,7 +1027,7 @@ radv_depth_stencil_resolve_subpass_cs(struct radv_cmd_buffer *cmd_buffer,
                                                .baseArrayLayer = dst_iview->base_layer + layer,
                                                .layerCount = 1,
                                        },
-                                    });
+                                    }, NULL);
 
                emit_depth_stencil_resolve(cmd_buffer, &tsrc_iview, &tdst_iview,
                                           &(VkOffset2D) { 0, 0 },
@@ -1042,7 +1043,7 @@ radv_depth_stencil_resolve_subpass_cs(struct radv_cmd_buffer *cmd_buffer,
        if (radv_image_has_htile(dst_image)) {
                if (aspects == VK_IMAGE_ASPECT_DEPTH_BIT) {
                        VkImageSubresourceRange range = {};
-                       range.aspectMask = aspects;
+                       range.aspectMask = VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT;
                        range.baseMipLevel = dst_iview->base_mip;
                        range.levelCount = 1;
                        range.baseArrayLayer = dst_iview->base_layer;