radv: Fix various non-critical integer overflows

[mesa.git] / src / amd / vulkan / radv_meta_resolve_fs.c

diff --git a/src/amd/vulkan/radv_meta_resolve_fs.c b/src/amd/vulkan/radv_meta_resolve_fs.c
index 35a04c24a9b25c6c4a80d442f565308d9a87b478..12ff91ab3f33ddf3e4a5ab05929304502d3b7b32 100644 (file)
--- a/src/amd/vulkan/radv_meta_resolve_fs.c
+++ b/src/amd/vulkan/radv_meta_resolve_fs.c
@@ -231,7 +231,27 @@ create_resolve_pipeline(struct radv_device *device,
                                                .preserveAttachmentCount = 0,
                                                .pPreserveAttachments = NULL,
                                        },
-                                       .dependencyCount = 0,
+                                       .dependencyCount = 2,
+                                       .pDependencies = (VkSubpassDependency[]) {
+                                               {
+                                                       .srcSubpass = VK_SUBPASS_EXTERNAL,
+                                                       .dstSubpass = 0,
+                                                       .srcStageMask = VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,
+                                                       .dstStageMask = VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT,
+                                                       .srcAccessMask = 0,
+                                                       .dstAccessMask = 0,
+                                                       .dependencyFlags = 0
+                                               },
+                                               {
+                                                       .srcSubpass = 0,
+                                                       .dstSubpass = VK_SUBPASS_EXTERNAL,
+                                                       .srcStageMask = VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,
+                                                       .dstStageMask = VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT,
+                                                       .srcAccessMask = 0,
+                                                       .dstAccessMask = 0,
+                                                       .dependencyFlags = 0
+                                               }
+                                       },
                                }, &device->meta_state.alloc, rp + dst_layout);
        }
 
@@ -555,7 +575,27 @@ create_depth_stencil_resolve_pipeline(struct radv_device *device,
                                                        .preserveAttachmentCount = 0,
                                                        .pPreserveAttachments = NULL,
                                                },
-                                               .dependencyCount = 0,
+                                               .dependencyCount = 2,
+                                               .pDependencies = (VkSubpassDependency[]) {
+                                                       {
+                                                               .srcSubpass = VK_SUBPASS_EXTERNAL,
+                                                               .dstSubpass = 0,
+                                                               .srcStageMask = VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,
+                                                               .dstStageMask = VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT,
+                                                               .srcAccessMask = 0,
+                                                               .dstAccessMask = 0,
+                                                               .dependencyFlags = 0
+                                                       },
+                                                       {
+                                                               .srcSubpass = 0,
+                                                               .dstSubpass = VK_SUBPASS_EXTERNAL,
+                                                               .srcStageMask = VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,
+                                                               .dstStageMask = VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT,
+                                                               .srcAccessMask = 0,
+                                                               .dstAccessMask = 0,
+                                                               .dependencyFlags = 0
+                                                       }
+                                               },
                                        }, &device->meta_state.alloc, render_pass);
        }
 
@@ -1087,20 +1127,21 @@ void radv_meta_resolve_fragment_image(struct radv_cmd_buffer *cmd_buffer,
                                       .layers = 1
                                }, &cmd_buffer->pool->alloc, &fb);
 
-                       radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer),
-                                               &(VkRenderPassBeginInfo) {
-                                                       .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
-                                                               .renderPass = rp,
-                                                               .framebuffer = fb,
-                                                               .renderArea = {
-                                                               .offset = { dstOffset.x, dstOffset.y, },
-                                                               .extent = { extent.width, extent.height },
-                                                       },
+                       radv_cmd_buffer_begin_render_pass(cmd_buffer,
+                                                         &(VkRenderPassBeginInfo) {
+                                                               .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
+                                                                       .renderPass = rp,
+                                                                       .framebuffer = fb,
+                                                                       .renderArea = {
+                                                                               .offset = { dstOffset.x, dstOffset.y, },
+                                                                               .extent = { extent.width, extent.height },
+                                                                       },
                                                                .clearValueCount = 0,
                                                                .pClearValues = NULL,
-                                               }, VK_SUBPASS_CONTENTS_INLINE);
-
+                                               });
 
+                       radv_cmd_buffer_set_subpass(cmd_buffer,
+                                                   &cmd_buffer->state.pass->subpasses[0]);
 
                        emit_resolve(cmd_buffer,
                                     &src_iview,
@@ -1109,7 +1150,7 @@ void radv_meta_resolve_fragment_image(struct radv_cmd_buffer *cmd_buffer,
                                     &(VkOffset2D) { dstOffset.x, dstOffset.y },
                                     &(VkExtent2D) { extent.width, extent.height });
 
-                       radv_CmdEndRenderPass(radv_cmd_buffer_to_handle(cmd_buffer));
+                       radv_cmd_buffer_end_render_pass(cmd_buffer);
 
                        radv_DestroyFramebuffer(radv_device_to_handle(cmd_buffer->device), fb, &cmd_buffer->pool->alloc);
                }