#define RADV_MAX_QUEUE_FAMILIES 3
+struct radv_deferred_queue_submission;
+
enum ring_type radv_queue_family_to_ring(int f);
struct radv_queue {
struct list_head pending_submissions;
pthread_mutex_t pending_mutex;
+
+ pthread_mutex_t thread_mutex;
+ pthread_cond_t thread_cond;
+ struct radv_deferred_queue_submission *thread_submission;
+ pthread_t submission_thread;
+ bool thread_exit;
+ bool thread_running;
};
struct radv_bo_list {
struct radv_vertex_binding {
struct radv_buffer * buffer;
VkDeviceSize offset;
+ VkDeviceSize size;
+ VkDeviceSize stride;
};
struct radv_streamout_binding {
bool radv_get_memory_fd(struct radv_device *device,
struct radv_device_memory *memory,
int *pFD);
+void radv_free_memory(struct radv_device *device,
+ const VkAllocationCallbacks* pAllocator,
+ struct radv_device_memory *mem);
static inline void
radv_emit_shader_pointer_head(struct radeon_cmdbuf *cs,
unsigned tess_patch_control_points;
unsigned pa_su_sc_mode_cntl;
unsigned db_depth_control;
+ bool uses_dynamic_stride;
/* Used for rbplus */
uint32_t col_format;
struct radv_image *image,
const VkImageSubresourceRange *range);
+typedef enum {
+ RADV_FENCE_NONE,
+ RADV_FENCE_WINSYS,
+ RADV_FENCE_SYNCOBJ,
+ RADV_FENCE_WSI,
+} radv_fence_kind;
+
+struct radv_fence_part {
+ radv_fence_kind kind;
+
+ union {
+ /* AMDGPU winsys fence. */
+ struct radeon_winsys_fence *fence;
+
+ /* DRM syncobj handle for syncobj-based fences. */
+ uint32_t syncobj;
+
+ /* WSI fence. */
+ struct wsi_fence *fence_wsi;
+ };
+};
+
struct radv_fence {
struct vk_object_base base;
- struct radeon_winsys_fence *fence;
- struct wsi_fence *fence_wsi;
-
- uint32_t syncobj;
- uint32_t temp_syncobj;
+ struct radv_fence_part permanent;
+ struct radv_fence_part temporary;
};
/* radv_nir_to_llvm.c */