mesa: include mtypes.h less

[mesa.git] / src / amd / vulkan / radv_private.h

diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 97f4cf657d8c3a1f1a34d6fb5f1a9c54ad5d2707..df8fe891dcfeff575c84aca30470cf3472826e56 100644 (file)
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -43,6 +43,7 @@
 #define VG(x)
 #endif
 
+#include "c11/threads.h"
 #include <amdgpu.h>
 #include "compiler/shader_enums.h"
 #include "util/macros.h"
@@ -347,6 +348,7 @@ struct radv_pipeline_cache {
 
 struct radv_pipeline_key {
        uint32_t instance_rate_inputs;
+       uint32_t instance_rate_divisors[MAX_VERTEX_ATTRIBS];
        unsigned tess_input_vertices;
        uint32_t col_format;
        uint32_t is_int8;
@@ -1238,6 +1240,10 @@ struct radv_pipeline {
                        bool can_use_guardband;
                        uint32_t needed_dynamic_state;
                        bool disable_out_of_order_rast_for_occlusion;
+
+                       /* Used for rbplus */
+                       uint32_t col_format;
+                       uint32_t cb_target_mask;
                } graphics;
        };
 
@@ -1439,6 +1445,15 @@ radv_htile_enabled(const struct radv_image *image, unsigned level)
        return radv_image_has_htile(image) && level == 0;
 }
 
+/**
+ * Return whether the image is TC-compatible HTILE.
+ */
+static inline bool
+radv_image_is_tc_compat_htile(const struct radv_image *image)
+{
+       return radv_image_has_htile(image) && image->tc_compatible_htile;
+}
+
 unsigned radv_image_queue_family_mask(const struct radv_image *image, uint32_t family, uint32_t queue_family);
 
 static inline uint32_t