amd/registers: switch to new generated register definitions
[mesa.git] / src / amd / vulkan / radv_shader.c
index b462393b11803d215bf9ffd94aae7e9ae178f806..aff3249da9572177ac1f90e70d637f628dc7aaaf 100644 (file)
@@ -896,7 +896,7 @@ static void radv_postprocess_config(const struct radv_device *device,
                        if (pdevice->rad_info.chip_class >= GFX10) {
                                vgpr_comp_cnt = info->vs.needs_instance_id ? 3 : 1;
                                config_out->rsrc2 |= S_00B42C_LDS_SIZE_GFX10(info->tcs.num_lds_blocks) |
-                                                    S_00B42C_EXCP_EN_GFX10(excp_en);
+                                                    S_00B42C_EXCP_EN_GFX6(excp_en);
                        } else {
                                vgpr_comp_cnt = info->vs.needs_instance_id ? 2 : 1;
                                config_out->rsrc2 |= S_00B42C_LDS_SIZE_GFX9(info->tcs.num_lds_blocks) |