*align = comp_size;
}
+struct radv_shader_debug_data {
+ struct radv_device *device;
+ const struct radv_shader_module *module;
+};
+
+static void radv_spirv_nir_debug(void *private_data,
+ enum nir_spirv_debug_level level,
+ size_t spirv_offset,
+ const char *message)
+{
+ struct radv_shader_debug_data *debug_data = private_data;
+ struct radv_instance *instance = debug_data->device->instance;
+
+ static const VkDebugReportFlagsEXT vk_flags[] = {
+ [NIR_SPIRV_DEBUG_LEVEL_INFO] = VK_DEBUG_REPORT_INFORMATION_BIT_EXT,
+ [NIR_SPIRV_DEBUG_LEVEL_WARNING] = VK_DEBUG_REPORT_WARNING_BIT_EXT,
+ [NIR_SPIRV_DEBUG_LEVEL_ERROR] = VK_DEBUG_REPORT_ERROR_BIT_EXT,
+ };
+ char buffer[256];
+
+ snprintf(buffer, sizeof(buffer), "SPIR-V offset %lu: %s",
+ (unsigned long)spirv_offset, message);
+
+ vk_debug_report(&instance->debug_report_callbacks,
+ vk_flags[level],
+ VK_DEBUG_REPORT_OBJECT_TYPE_SHADER_MODULE_EXT,
+ (uint64_t)(uintptr_t)debug_data->module,
+ 0, 0, "radv", buffer);
+}
+
+static void radv_compiler_debug(void *private_data,
+ enum radv_compiler_debug_level level,
+ const char *message)
+{
+ struct radv_shader_debug_data *debug_data = private_data;
+ struct radv_instance *instance = debug_data->device->instance;
+
+ static const VkDebugReportFlagsEXT vk_flags[] = {
+ [RADV_COMPILER_DEBUG_LEVEL_PERFWARN] = VK_DEBUG_REPORT_PERFORMANCE_WARNING_BIT_EXT,
+ [RADV_COMPILER_DEBUG_LEVEL_ERROR] = VK_DEBUG_REPORT_ERROR_BIT_EXT,
+ };
+
+ /* VK_DEBUG_REPORT_DEBUG_BIT_EXT specifies diagnostic information
+ * from the implementation and layers.
+ */
+ vk_debug_report(&instance->debug_report_callbacks,
+ vk_flags[level] | VK_DEBUG_REPORT_DEBUG_BIT_EXT,
+ VK_DEBUG_REPORT_OBJECT_TYPE_SHADER_MODULE_EXT,
+ (uint64_t)(uintptr_t)debug_data->module,
+ 0, 0, "radv", message);
+}
+
nir_shader *
radv_shader_compile_to_nir(struct radv_device *device,
struct radv_shader_module *module,
}
}
}
+
+ struct radv_shader_debug_data spirv_debug_data = {
+ .device = device,
+ .module = module,
+ };
const struct spirv_to_nir_options spirv_options = {
.lower_ubo_ssbo_access_to_offsets = true,
.caps = {
.push_const_addr_format = nir_address_format_logical,
.shared_addr_format = nir_address_format_32bit_offset,
.frag_coord_is_sysval = true,
+ .debug = {
+ .func = radv_spirv_nir_debug,
+ .private_data = &spirv_debug_data,
+ },
};
nir = spirv_to_nir(spirv, module->size / 4,
spec_entries, num_spec_entries,
!radv_use_llvm_for_stage(device, nir->info.stage))
NIR_PASS_V(nir, nir_lower_io_to_vector, nir_var_shader_out);
if (nir->info.stage == MESA_SHADER_FRAGMENT)
- NIR_PASS_V(nir, nir_lower_input_attachments, true);
+ NIR_PASS_V(nir, nir_lower_input_attachments,
+ &(nir_input_attachment_options) {
+ .use_fragcoord_sysval = true,
+ .use_layer_id_sysval = false,
+ });
NIR_PASS_V(nir, nir_remove_dead_variables,
nir_var_shader_in | nir_var_shader_out | nir_var_system_value | nir_var_mem_shared,
}
/* We use layered rendering to implement multiview, which means we need to map
- * view_index to gl_Layer. The attachment lowering also uses needs to know the
- * layer so that it can sample from the correct layer. The code generates a
- * load from the layer_id sysval, but since we don't have a way to get at this
- * information from the fragment shader, we also need to lower this to the
- * gl_Layer varying. This pass lowers both to a varying load from the LAYER
- * slot, before lowering io, so that nir_assign_var_locations() will give the
- * LAYER varying the correct driver_location.
+ * view_index to gl_Layer. The code generates a load from the layer_id sysval,
+ * but since we don't have a way to get at this information from the fragment
+ * shader, we also need to lower this to the gl_Layer varying. This pass
+ * lowers both to a varying load from the LAYER slot, before lowering io, so
+ * that nir_assign_var_locations() will give the LAYER varying the correct
+ * driver_location.
*/
static bool
continue;
nir_intrinsic_instr *load = nir_instr_as_intrinsic(instr);
- if (load->intrinsic != nir_intrinsic_load_view_index &&
- load->intrinsic != nir_intrinsic_load_layer_id)
+ if (load->intrinsic != nir_intrinsic_load_view_index)
continue;
if (!layer)
enum radeon_family chip_family = device->physical_device->rad_info.family;
struct radv_shader_binary *binary = NULL;
+ struct radv_shader_debug_data debug_data = {
+ .device = device,
+ .module = module,
+ };
+
options->family = chip_family;
options->chip_class = device->physical_device->rad_info.chip_class;
options->dump_shader = radv_can_dump_shader(device, module, gs_copy_shader);
options->has_ls_vgpr_init_bug = device->physical_device->rad_info.has_ls_vgpr_init_bug;
options->use_ngg_streamout = device->physical_device->use_ngg_streamout;
options->enable_mrt_output_nan_fixup = device->instance->enable_mrt_output_nan_fixup;
+ options->debug.func = radv_compiler_debug;
+ options->debug.private_data = &debug_data;
struct radv_shader_args args = {};
args.options = options;
projects / mesa.git / blobdiff