unsigned attrib_count = glsl_count_attribute_slots(var->type, true);
int idx = var->data.location;
- if (idx >= VERT_ATTRIB_GENERIC0 && idx <= VERT_ATTRIB_GENERIC15)
+ if (idx >= VERT_ATTRIB_GENERIC0 && idx < VERT_ATTRIB_GENERIC0 + MAX_VERTEX_ATTRIBS)
info->vs.has_vertex_buffers = true;
for (unsigned i = 0; i < attrib_count; ++i) {
const struct radv_pipeline_layout *layout,
const struct radv_shader_variant_key *key,
struct radv_shader_info *info,
- bool use_aco)
+ bool use_llvm)
{
struct nir_function *func =
(struct nir_function *)exec_list_get_head_const(&nir->functions);
info->loads_dynamic_offsets = true;
}
- nir_foreach_variable(variable, &nir->inputs)
+ nir_foreach_shader_in_variable(variable, nir)
gather_info_input_decl(nir, variable, info, key);
nir_foreach_block(block, func->impl) {
gather_info_block(nir, block, info);
}
- nir_foreach_variable(variable, &nir->outputs)
+ nir_foreach_shader_out_variable(variable, nir)
gather_info_output_decl(nir, variable, info, key);
if (nir->info.stage == MESA_SHADER_VERTEX ||
struct radv_es_output_info *es_info =
nir->info.stage == MESA_SHADER_VERTEX ? &info->vs.es_info : &info->tes.es_info;
- if (use_aco) {
- /* The outputs don't contain gaps, se we can use the number of outputs */
- uint32_t num_outputs_written = nir->info.stage == MESA_SHADER_VERTEX
- ? info->vs.num_linked_outputs
- : info->tes.num_linked_outputs;
- es_info->esgs_itemsize = num_outputs_written * 16;
- } else {
+ if (use_llvm) {
/* The outputs may contain gaps, use the highest output index + 1 */
uint32_t max_output_written = 0;
uint64_t output_mask = nir->info.outputs_written;
max_output_written = MAX2(param_index, max_output_written);
}
-
es_info->esgs_itemsize = (max_output_written + 1) * 16;
+ } else {
+ /* The outputs don't contain gaps, se we can use the number of outputs */
+ uint32_t num_outputs_written = nir->info.stage == MESA_SHADER_VERTEX
+ ? info->vs.num_linked_outputs
+ : info->tes.num_linked_outputs;
+ es_info->esgs_itemsize = num_outputs_written * 16;
}
}
info->ps.cb_shader_mask |= 0xf << (i * 4);
}
}
+
+ if (key->fs.is_dual_src) {
+ info->ps.cb_shader_mask |= (info->ps.cb_shader_mask & 0xf) << 4;
+ }
}
}