struct v3d_vs_key {
struct v3d_key base;
- struct v3d_varying_slot fs_inputs[V3D_MAX_FS_INPUTS];
- uint8_t num_fs_inputs;
+ struct v3d_varying_slot used_outputs[V3D_MAX_ANY_STAGE_INPUTS];
+ uint8_t num_used_outputs;
bool is_coord;
bool per_vertex_point_size;
uint64_t *qpu_insts;
uint32_t qpu_inst_count;
uint32_t qpu_inst_size;
+ uint32_t qpu_inst_stalled_count;
/* For the FS, the number of varying inputs not counting the
* point/line varyings payload
bool lock_scoreboard_on_first_thrsw;
bool failed;
+
+ bool tmu_dirty_rcl;
};
struct v3d_uniform_list {
* after-final-THRSW state.
*/
bool single_seg;
+
+ bool tmu_dirty_rcl;
};
struct v3d_vs_prog_data {
return inst->uniform != ~0;
}
-/* Special nir_load_input intrinsic index for loading the current TLB
- * destination color.
- */
-#define V3D_NIR_TLB_COLOR_READ_INPUT 2000000000
-
-#define V3D_NIR_MS_MASK_OUTPUT 2000000000
-
extern const nir_shader_compiler_options v3d_nir_options;
const struct v3d_compiler *v3d_compiler_init(const struct v3d_device_info *devinfo);
bool vir_opt_vpm(struct v3d_compile *c);
void v3d_nir_lower_blend(nir_shader *s, struct v3d_compile *c);
void v3d_nir_lower_io(nir_shader *s, struct v3d_compile *c);
+void v3d_nir_lower_logic_ops(nir_shader *s, struct v3d_compile *c);
void v3d_nir_lower_scratch(nir_shader *s);
void v3d_nir_lower_txf_ms(nir_shader *s, struct v3d_compile *c);
void v3d_nir_lower_image_load_store(nir_shader *s);
bool v3d_gl_format_is_return_32(GLenum format);
+uint32_t
+v3d_get_op_for_atomic_add(nir_intrinsic_instr *instr, unsigned src);
+
static inline bool
quniform_contents_is_texture_p0(enum quniform_contents contents)
{
VIR_A_ALU0(EIDX)
VIR_A_ALU1(LDVPMV_IN)
VIR_A_ALU1(LDVPMV_OUT)
+VIR_A_ALU1(LDVPMD_IN)
+VIR_A_ALU1(LDVPMD_OUT)
+VIR_A_ALU2(LDVPMG_IN)
+VIR_A_ALU2(LDVPMG_OUT)
VIR_A_ALU0(TMUWT)
VIR_A_ALU0(FXCD)