return false;
}
-bool
-vir_depends_on_flags(struct qinst *inst)
-{
- if (inst->qpu.type == V3D_QPU_INSTR_TYPE_BRANCH) {
- return (inst->qpu.branch.cond != V3D_QPU_BRANCH_COND_ALWAYS);
- } else {
- return (inst->qpu.flags.ac != V3D_QPU_COND_NONE &&
- inst->qpu.flags.mc != V3D_QPU_COND_NONE);
- }
-}
-
bool
vir_writes_r3(const struct v3d_device_info *devinfo, struct qinst *inst)
{
}
}
+void
+vir_set_uf(struct qinst *inst, enum v3d_qpu_uf uf)
+{
+ if (vir_is_add(inst)) {
+ inst->qpu.flags.auf = uf;
+ } else {
+ assert(vir_is_mul(inst));
+ inst->qpu.flags.muf = uf;
+ }
+}
+
#if 0
uint8_t
vir_channels_written(struct qinst *inst)
vir_compile_init(const struct v3d_compiler *compiler,
struct v3d_key *key,
nir_shader *s,
+ void (*debug_output)(const char *msg,
+ void *debug_output_data),
+ void *debug_output_data,
int program_id, int variant_id)
{
struct v3d_compile *c = rzalloc(NULL, struct v3d_compile);
c->program_id = program_id;
c->variant_id = variant_id;
c->threads = 4;
+ c->debug_output = debug_output;
+ c->debug_output_data = debug_output_data;
s = nir_shader_clone(c, s);
c->s = s;
memcpy(qpu_insts, c->qpu_insts, *final_assembly_size);
+ char *shaderdb;
+ int ret = asprintf(&shaderdb,
+ "%s shader: %d inst, %d threads, %d loops, "
+ "%d uniforms, %d:%d spills:fills",
+ vir_get_stage_name(c),
+ c->qpu_inst_count,
+ c->threads,
+ c->loops,
+ c->num_uniforms,
+ c->spills,
+ c->fills);
+ if (ret >= 0) {
+ c->debug_output(shaderdb, c->debug_output_data);
+ free(shaderdb);
+ }
+
vir_compile_destroy(c);
return qpu_insts;
struct v3d_vs_key *key,
struct v3d_vs_prog_data *prog_data,
nir_shader *s,
+ void (*debug_output)(const char *msg,
+ void *debug_output_data),
+ void *debug_output_data,
int program_id, int variant_id,
uint32_t *final_assembly_size)
{
struct v3d_compile *c = vir_compile_init(compiler, &key->base, s,
+ debug_output, debug_output_data,
program_id, variant_id);
c->vs_key = key;
NIR_PASS_V(c->s, nir_lower_clamp_color_outputs);
if (key->base.ucp_enables) {
- NIR_PASS_V(c->s, nir_lower_clip_vs, key->base.ucp_enables);
+ NIR_PASS_V(c->s, nir_lower_clip_vs, key->base.ucp_enables,
+ false);
NIR_PASS_V(c->s, nir_lower_io_to_scalar,
nir_var_shader_out);
}
v3d_lower_nir_late(c);
v3d_optimize_nir(c->s);
+ NIR_PASS_V(c->s, nir_lower_bool_to_int32);
NIR_PASS_V(c->s, nir_convert_from_ssa, true);
v3d_nir_to_vir(c);
prog_data->vpm_input_size = align(prog_data->vpm_input_size, 8) / 8;
prog_data->vpm_output_size = align(c->num_vpm_writes, 8) / 8;
+ /* Set us up for shared input/output segments. This is apparently
+ * necessary for our VCM setup to avoid varying corruption.
+ */
+ prog_data->separate_segments = false;
+ prog_data->vpm_output_size = MAX2(prog_data->vpm_output_size,
+ prog_data->vpm_input_size);
+ prog_data->vpm_input_size = 0;
+
/* Compute VCM cache size. We set up our program to take up less than
* half of the VPM, so that any set of bin and render programs won't
* run out of space. We need space for at least one input segment,
struct v3d_fs_key *key,
struct v3d_fs_prog_data *prog_data,
nir_shader *s,
+ void (*debug_output)(const char *msg,
+ void *debug_output_data),
+ void *debug_output_data,
int program_id, int variant_id,
uint32_t *final_assembly_size)
{
struct v3d_compile *c = vir_compile_init(compiler, &key->base, s,
+ debug_output, debug_output_data,
program_id, variant_id);
c->fs_key = key;
v3d_lower_nir_late(c);
v3d_optimize_nir(c->s);
+ NIR_PASS_V(c->s, nir_lower_bool_to_int32);
NIR_PASS_V(c->s, nir_convert_from_ssa, true);
v3d_nir_to_vir(c);