#include "broadcom/common/v3d_device_info.h"
#include "v3d_compiler.h"
#include "util/u_prim.h"
+#include "compiler/nir/nir_schedule.h"
int
vir_get_nsrc(struct qinst *inst)
/* Output segment size is in sectors (8 rows of 32 bits per channel) */
prog_data->vpm_output_size = align(c->vpm_output_size, 8) / 8;
+ /* Compute SIMD dispatch width and update VPM output size accordingly
+ * to ensure we can fit our program in memory. Available widths are
+ * 16, 8, 4, 1.
+ *
+ * Notice that at draw time we will have to consider VPM memory
+ * requirements from other stages and choose a smaller dispatch
+ * width if needed to fit the program in VPM memory.
+ */
+ prog_data->simd_width = 16;
+ while ((prog_data->simd_width > 1 && prog_data->vpm_output_size > 16) ||
+ prog_data->simd_width == 2) {
+ prog_data->simd_width >>= 1;
+ prog_data->vpm_output_size =
+ align(prog_data->vpm_output_size, 2) / 2;
+ }
+ assert(prog_data->vpm_output_size <= 16);
+ assert(prog_data->simd_width != 2);
+
prog_data->out_prim_type = c->s->info.gs.output_primitive;
+ prog_data->num_invocations = c->s->info.gs.invocations;
}
static void
&c->s->outputs, used_outputs, NULL); /* demotes to globals */
NIR_PASS_V(c->s, nir_lower_global_vars_to_local);
v3d_optimize_nir(c->s);
- NIR_PASS_V(c->s, nir_remove_dead_variables, nir_var_shader_in);
+ NIR_PASS_V(c->s, nir_remove_dead_variables, nir_var_shader_in, NULL);
/* This must go before nir_lower_io */
if (c->vs_key->per_vertex_point_size)
&c->s->outputs, used_outputs, NULL); /* demotes to globals */
NIR_PASS_V(c->s, nir_lower_global_vars_to_local);
v3d_optimize_nir(c->s);
- NIR_PASS_V(c->s, nir_remove_dead_variables, nir_var_shader_in);
+ NIR_PASS_V(c->s, nir_remove_dead_variables, nir_var_shader_in, NULL);
/* This must go before nir_lower_io */
if (c->gs_key->per_vertex_point_size)
NIR_PASS_V(c->s, v3d_nir_lower_logic_ops, c);
+ if (c->fs_key->line_smoothing) {
+ v3d_nir_lower_line_smooth(c->s);
+ NIR_PASS_V(c->s, nir_lower_global_vars_to_local);
+ /* The lowering pass can introduce new sysval reads */
+ nir_shader_gather_info(c->s, nir_shader_get_entrypoint(c->s));
+ }
+
/* If the shader has no non-TLB side effects, we can promote it to
* enabling early_fragment_tests even if the user didn't.
*/
v3d_nir_lower_fs_late(struct v3d_compile *c)
{
if (c->fs_key->light_twoside)
- NIR_PASS_V(c->s, nir_lower_two_sided_color);
+ NIR_PASS_V(c->s, nir_lower_two_sided_color, true);
if (c->fs_key->clamp_color)
NIR_PASS_V(c->s, nir_lower_clamp_color_outputs);
return max_temps;
}
+enum v3d_dependency_class {
+ V3D_DEPENDENCY_CLASS_GS_VPM_OUTPUT_0
+};
+
+static bool
+v3d_intrinsic_dependency_cb(nir_intrinsic_instr *intr,
+ nir_schedule_dependency *dep,
+ void *user_data)
+{
+ struct v3d_compile *c = user_data;
+
+ switch (intr->intrinsic) {
+ case nir_intrinsic_store_output:
+ /* Writing to location 0 overwrites the value passed in for
+ * gl_PrimitiveID on geometry shaders
+ */
+ if (c->s->info.stage != MESA_SHADER_GEOMETRY ||
+ nir_intrinsic_base(intr) != 0)
+ break;
+
+ nir_const_value *const_value =
+ nir_src_as_const_value(intr->src[1]);
+
+ if (const_value == NULL)
+ break;
+
+ uint64_t offset =
+ nir_const_value_as_uint(*const_value,
+ nir_src_bit_size(intr->src[1]));
+ if (offset != 0)
+ break;
+
+ dep->klass = V3D_DEPENDENCY_CLASS_GS_VPM_OUTPUT_0;
+ dep->type = NIR_SCHEDULE_WRITE_DEPENDENCY;
+ return true;
+
+ case nir_intrinsic_load_primitive_id:
+ if (c->s->info.stage != MESA_SHADER_GEOMETRY)
+ break;
+
+ dep->klass = V3D_DEPENDENCY_CLASS_GS_VPM_OUTPUT_0;
+ dep->type = NIR_SCHEDULE_READ_DEPENDENCY;
+ return true;
+
+ default:
+ break;
+ }
+
+ return false;
+}
+
uint64_t *v3d_compile(const struct v3d_compiler *compiler,
struct v3d_key *key,
struct v3d_prog_data **out_prog_data,
NIR_PASS_V(c->s, nir_lower_bool_to_int32);
NIR_PASS_V(c->s, nir_convert_from_ssa, true);
- /* Schedule for about half our register space, to enable more shaders
- * to hit 4 threads.
- */
- NIR_PASS_V(c->s, nir_schedule, 24);
+ struct nir_schedule_options schedule_options = {
+ /* Schedule for about half our register space, to enable more
+ * shaders to hit 4 threads.
+ */
+ .threshold = 24,
+
+ /* Vertex shaders share the same memory for inputs and outputs,
+ * fragement and geometry shaders do not.
+ */
+ .stages_with_shared_io_memory =
+ (((1 << MESA_ALL_SHADER_STAGES) - 1) &
+ ~((1 << MESA_SHADER_FRAGMENT) |
+ (1 << MESA_SHADER_GEOMETRY))),
+
+ .intrinsic_cb = v3d_intrinsic_dependency_cb,
+ .intrinsic_cb_data = c,
+ };
+ NIR_PASS_V(c->s, nir_schedule, &schedule_options);
v3d_nir_to_vir(c);
projects / mesa.git / blobdiff