return q;
}
-static void
-new_ldunif_instr(struct qinst *inst, int i)
-{
- struct qinst *ldunif = new_qpu_nop_before(inst);
-
- ldunif->qpu.sig.ldunif = true;
- assert(inst->src[i].file == QFILE_UNIF);
- ldunif->uniform = inst->src[i].index;
-}
-
/**
* Allocates the src register (accumulator or register file) into the RADDR
* fields of the instruction.
int nsrc = vir_get_nsrc(qinst);
struct qpu_reg src[ARRAY_SIZE(qinst->src)];
- bool emitted_ldunif = false;
for (int i = 0; i < nsrc; i++) {
int index = qinst->src[i].index;
switch (qinst->src[i].file) {
case QFILE_TEMP:
src[i] = temp_registers[index];
break;
- case QFILE_UNIF:
- /* XXX perf: If the last ldunif we emitted was
- * the same uniform value, skip it. Common
- * for multop/umul24 sequences.
- */
- if (!emitted_ldunif) {
- new_ldunif_instr(qinst, i);
- c->num_uniforms++;
- emitted_ldunif = true;
- }
-
- src[i] = qpu_acc(5);
- break;
case QFILE_SMALL_IMM:
src[i].smimm = true;
break;
dst = qpu_magic(V3D_QPU_WADDR_TLBU);
break;
- case QFILE_UNIF:
case QFILE_SMALL_IMM:
case QFILE_LOAD_IMM:
assert(!"not reached");