}
}
- /* Remap the locations to slots so those requiring two slots will occupy
- * two locations. For instance, if we have in the IR code a dvec3 attr0 in
- * location 0 and vec4 attr1 in location 1, in NIR attr0 will use
- * locations/slots 0 and 1, and attr1 will use location/slot 2 */
- if (shader->info.stage == MESA_SHADER_VERTEX)
- nir_remap_dual_slot_attributes(shader, &sh->Program->DualSlotInputs);
-
shader->info.name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name);
if (shader_prog->Label)
shader->info.label = ralloc_strdup(shader, shader_prog->Label);
return glsl_type::get_array_instance(elem_type, array_type->length);
}
+static unsigned
+get_nir_how_declared(unsigned how_declared)
+{
+ if (how_declared == ir_var_hidden)
+ return nir_var_hidden;
+
+ return nir_var_declared_normally;
+}
+
void
nir_visitor::visit(ir_variable *ir)
{
var->data.centroid = ir->data.centroid;
var->data.sample = ir->data.sample;
var->data.patch = ir->data.patch;
+ var->data.how_declared = get_nir_how_declared(ir->data.how_declared);
var->data.invariant = ir->data.invariant;
var->data.location = ir->data.location;
var->data.stream = ir->data.stream;
if (ir->data.stream & (1u << 31))
var->data.stream |= NIR_STREAM_PACKED;
+
+ var->data.precision = ir->data.precision;
+ var->data.explicit_location = ir->data.explicit_location;
+ var->data.from_named_ifc_block = ir->data.from_named_ifc_block;
var->data.compact = false;
switch(ir->data.mode) {
unreachable("not reached");
}
- unsigned image_access = 0;
+ unsigned mem_access = 0;
if (ir->data.memory_read_only)
- image_access |= ACCESS_NON_WRITEABLE;
+ mem_access |= ACCESS_NON_WRITEABLE;
if (ir->data.memory_write_only)
- image_access |= ACCESS_NON_READABLE;
+ mem_access |= ACCESS_NON_READABLE;
if (ir->data.memory_coherent)
- image_access |= ACCESS_COHERENT;
+ mem_access |= ACCESS_COHERENT;
if (ir->data.memory_volatile)
- image_access |= ACCESS_VOLATILE;
+ mem_access |= ACCESS_VOLATILE;
if (ir->data.memory_restrict)
- image_access |= ACCESS_RESTRICT;
+ mem_access |= ACCESS_RESTRICT;
/* For UBO and SSBO variables, we need explicit types */
if (var->data.mode & (nir_var_mem_ubo | nir_var_mem_ssbo)) {
var->type = field->type;
if (field->memory_read_only)
- image_access |= ACCESS_NON_WRITEABLE;
+ mem_access |= ACCESS_NON_WRITEABLE;
if (field->memory_write_only)
- image_access |= ACCESS_NON_READABLE;
+ mem_access |= ACCESS_NON_READABLE;
if (field->memory_coherent)
- image_access |= ACCESS_COHERENT;
+ mem_access |= ACCESS_COHERENT;
if (field->memory_volatile)
- image_access |= ACCESS_VOLATILE;
+ mem_access |= ACCESS_VOLATILE;
if (field->memory_restrict)
- image_access |= ACCESS_RESTRICT;
+ mem_access |= ACCESS_RESTRICT;
found = true;
break;
var->data.explicit_binding = ir->data.explicit_binding;
var->data.bindless = ir->data.bindless;
var->data.offset = ir->data.offset;
+ var->data.access = (gl_access_qualifier)mem_access;
- var->data.image.access = (gl_access_qualifier)image_access;
- var->data.image.format = ir->data.image_format;
+ if (var->type->without_array()->is_image()) {
+ var->data.image.format = ir->data.image_format;
+ } else if (var->data.mode == nir_var_shader_out) {
+ var->data.xfb.buffer = ir->data.xfb_buffer;
+ var->data.xfb.stride = ir->data.xfb_stride;
+ }
var->data.fb_fetch_output = ir->data.fb_fetch_output;
var->data.explicit_xfb_buffer = ir->data.explicit_xfb_buffer;
var->data.explicit_xfb_stride = ir->data.explicit_xfb_stride;
- var->data.xfb_buffer = ir->data.xfb_buffer;
- var->data.xfb_stride = ir->data.xfb_stride;
var->num_state_slots = ir->get_num_state_slots();
if (var->num_state_slots > 0) {
nir_deref_path path;
nir_deref_path_init(&path, deref, NULL);
- unsigned qualifiers = path.path[0]->var->data.image.access;
+ unsigned qualifiers = path.path[0]->var->data.access;
const glsl_type *parent_type = path.path[0]->type;
for (nir_deref_instr **cur_ptr = &path.path[1]; *cur_ptr; cur_ptr++) {
instr->src[3] =
nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
param = param->get_next();
+ } else if (op == nir_intrinsic_image_deref_load) {
+ instr->src[3] = nir_src_for_ssa(nir_imm_int(&b, 0)); /* LOD */
}
if (!param->is_tail_sentinel()) {
instr->src[4] =
nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
param = param->get_next();
+ } else if (op == nir_intrinsic_image_deref_store) {
+ instr->src[4] = nir_src_for_ssa(nir_imm_int(&b, 0)); /* LOD */
}
+
nir_builder_instr_insert(&b, &instr->instr);
break;
}
void
nir_visitor::visit(ir_barrier *)
{
+ if (shader->info.stage == MESA_SHADER_COMPUTE) {
+ nir_intrinsic_instr *shared_barrier =
+ nir_intrinsic_instr_create(this->shader,
+ nir_intrinsic_memory_barrier_shared);
+ nir_builder_instr_insert(&b, &shared_barrier->instr);
+ } else if (shader->info.stage == MESA_SHADER_TESS_CTRL) {
+ nir_intrinsic_instr *patch_barrier =
+ nir_intrinsic_instr_create(this->shader,
+ nir_intrinsic_memory_barrier_tcs_patch);
+ nir_builder_instr_insert(&b, &patch_barrier->instr);
+ }
+
nir_intrinsic_instr *instr =
- nir_intrinsic_instr_create(this->shader, nir_intrinsic_barrier);
+ nir_intrinsic_instr_create(this->shader, nir_intrinsic_control_barrier);
nir_builder_instr_insert(&b, &instr->instr);
}