} nir_state_slot;
typedef enum {
- nir_var_all = -1,
- nir_var_shader_in,
- nir_var_shader_out,
- nir_var_global,
- nir_var_local,
- nir_var_uniform,
- nir_var_shader_storage,
- nir_var_shared,
- nir_var_system_value
+ nir_var_shader_in = (1 << 0),
+ nir_var_shader_out = (1 << 1),
+ nir_var_global = (1 << 2),
+ nir_var_local = (1 << 3),
+ nir_var_uniform = (1 << 4),
+ nir_var_shader_storage = (1 << 5),
+ nir_var_system_value = (1 << 6),
+ nir_var_param = (1 << 7),
+ nir_var_shared = (1 << 8),
+ nir_var_all = ~0,
} nir_variable_mode;
/**
int i[16];
float f[16];
bool b[16];
+ double d[16];
};
typedef struct nir_constant {
char *name;
struct nir_variable_data {
+ /**
+ * Storage class of the variable.
+ *
+ * \sa nir_variable_mode
+ */
+ nir_variable_mode mode;
/**
* Is the variable read-only?
unsigned patch:1;
unsigned invariant:1;
- /**
- * Storage class of the variable.
- *
- * \sa nir_variable_mode
- */
- nir_variable_mode mode:4;
-
/**
* Interpolation mode for shader inputs / outputs
*
*/
unsigned location_frac:2;
- /**
- * Non-zero if this variable was created by lowering a named interface
- * block which was not an array.
- *
- * Note that this variable and \c from_named_ifc_block_array will never
- * both be non-zero.
- */
- unsigned from_named_ifc_block_nonarray:1;
-
- /**
- * Non-zero if this variable was created by lowering a named interface
- * block which was an array.
- *
- * Note that this variable and \c from_named_ifc_block_nonarray will never
- * both be non-zero.
- */
- unsigned from_named_ifc_block_array:1;
-
/**
* \brief Layout qualifier for gl_FragDepth.
*
#define nir_foreach_variable(var, var_list) \
foreach_list_typed(nir_variable, var, node, var_list)
-/**
- * Returns the bits in the inputs_read, outputs_written, or
- * system_values_read bitfield corresponding to this variable.
- */
-static inline uint64_t
-nir_variable_get_io_mask(nir_variable *var, gl_shader_stage stage)
-{
- assert(var->data.mode == nir_var_shader_in ||
- var->data.mode == nir_var_shader_out ||
- var->data.mode == nir_var_system_value);
- assert(var->data.location >= 0);
-
- const struct glsl_type *var_type = var->type;
- if (stage == MESA_SHADER_GEOMETRY && var->data.mode == nir_var_shader_in) {
- /* Most geometry shader inputs are per-vertex arrays */
- if (var->data.location >= VARYING_SLOT_VAR0)
- assert(glsl_type_is_array(var_type));
-
- if (glsl_type_is_array(var_type))
- var_type = glsl_get_array_element(var_type);
- }
+#define nir_foreach_variable_safe(var, var_list) \
+ foreach_list_typed_safe(nir_variable, var, node, var_list)
- bool is_vertex_input = (var->data.mode == nir_var_shader_in &&
- stage == MESA_SHADER_VERTEX);
- unsigned slots = glsl_count_attribute_slots(var_type, is_vertex_input);
- return ((1ull << slots) - 1) << var->data.location;
+static inline bool
+nir_variable_is_global(const nir_variable *var)
+{
+ return var->data.mode != nir_var_local && var->data.mode != nir_var_param;
}
typedef struct nir_register {
unsigned num_components; /** < number of vector components */
unsigned num_array_elems; /** < size of array (0 for no array) */
+ /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
+ uint8_t bit_size;
+
/** generic register index. */
unsigned index;
struct list_head if_uses;
uint8_t num_components;
+
+ /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
+ uint8_t bit_size;
} nir_ssa_def;
struct nir_src;
bool is_ssa;
} nir_src;
-#ifdef __cplusplus
-# define NIR_SRC_INIT nir_src()
-#else
-# define NIR_SRC_INIT (nir_src) { { NULL } }
-#endif
+static inline nir_src
+nir_src_init(void)
+{
+ nir_src src = { { NULL } };
+ return src;
+}
+
+#define NIR_SRC_INIT nir_src_init()
#define nir_foreach_use(reg_or_ssa_def, src) \
list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
bool is_ssa;
} nir_dest;
-#ifdef __cplusplus
-# define NIR_DEST_INIT nir_dest()
-#else
-# define NIR_DEST_INIT (nir_dest) { { { NULL } } }
-#endif
+static inline nir_dest
+nir_dest_init(void)
+{
+ nir_dest dest = { { { NULL } } };
+ return dest;
+}
+
+#define NIR_DEST_INIT nir_dest_init()
#define nir_foreach_def(reg, dest) \
list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
return dest;
}
+static inline unsigned
+nir_src_bit_size(nir_src src)
+{
+ return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
+}
+
+static inline unsigned
+nir_dest_bit_size(nir_dest dest)
+{
+ return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
+}
+
void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
nir_type_float,
nir_type_int,
nir_type_uint,
- nir_type_bool
+ nir_type_bool,
+ nir_type_bool32 = 32 | nir_type_bool,
+ nir_type_int8 = 8 | nir_type_int,
+ nir_type_int16 = 16 | nir_type_int,
+ nir_type_int32 = 32 | nir_type_int,
+ nir_type_int64 = 64 | nir_type_int,
+ nir_type_uint8 = 8 | nir_type_uint,
+ nir_type_uint16 = 16 | nir_type_uint,
+ nir_type_uint32 = 32 | nir_type_uint,
+ nir_type_uint64 = 64 | nir_type_uint,
+ nir_type_float16 = 16 | nir_type_float,
+ nir_type_float32 = 32 | nir_type_float,
+ nir_type_float64 = 64 | nir_type_float,
} nir_alu_type;
+#define NIR_ALU_TYPE_SIZE_MASK 0xfffffff8
+#define NIR_ALU_TYPE_BASE_TYPE_MASK 0x00000007
+
+static inline unsigned
+nir_alu_type_get_type_size(nir_alu_type type)
+{
+ return type & NIR_ALU_TYPE_SIZE_MASK;
+}
+
+static inline unsigned
+nir_alu_type_get_base_type(nir_alu_type type)
+{
+ return type & NIR_ALU_TYPE_BASE_TYPE_MASK;
+}
+
typedef enum {
NIR_OP_IS_COMMUTATIVE = (1 << 0),
NIR_OP_IS_ASSOCIATIVE = (1 << 1),
typedef struct nir_alu_instr {
nir_instr instr;
nir_op op;
+
+ /** Indicates that this ALU instruction generates an exact value
+ *
+ * This is kind of a mixture of GLSL "precise" and "invariant" and not
+ * really equivalent to either. This indicates that the value generated by
+ * this operation is high-precision and any code transformations that touch
+ * it must ensure that the resulting value is bit-for-bit identical to the
+ * original.
+ */
+ bool exact;
+
nir_alu_dest dest;
nir_alu_src src[];
} nir_alu_instr;
} nir_call_instr;
#define INTRINSIC(name, num_srcs, src_components, has_dest, dest_components, \
- num_variables, num_indices, flags) \
+ num_variables, num_indices, idx0, idx1, idx2, flags) \
nir_intrinsic_##name,
#define LAST_INTRINSIC(name) nir_last_intrinsic = nir_intrinsic_##name,
#undef INTRINSIC
#undef LAST_INTRINSIC
+#define NIR_INTRINSIC_MAX_CONST_INDEX 3
+
/** Represents an intrinsic
*
* An intrinsic is an instruction type for handling things that are
*/
uint8_t num_components;
- int const_index[3];
+ int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
nir_deref_var *variables[2];
NIR_INTRINSIC_CAN_REORDER = (1 << 1),
} nir_intrinsic_semantic_flag;
+/**
+ * \name NIR intrinsics const-index flag
+ *
+ * Indicates the usage of a const_index slot.
+ *
+ * \sa nir_intrinsic_info::index_map
+ */
+typedef enum {
+ /**
+ * Generally instructions that take a offset src argument, can encode
+ * a constant 'base' value which is added to the offset.
+ */
+ NIR_INTRINSIC_BASE = 1,
+
+ /**
+ * For store instructions, a writemask for the store.
+ */
+ NIR_INTRINSIC_WRMASK = 2,
+
+ /**
+ * The stream-id for GS emit_vertex/end_primitive intrinsics.
+ */
+ NIR_INTRINSIC_STREAM_ID = 3,
+
+ /**
+ * The clip-plane id for load_user_clip_plane intrinsic.
+ */
+ NIR_INTRINSIC_UCP_ID = 4,
+
+ /**
+ * The amount of data, starting from BASE, that this instruction may
+ * access. This is used to provide bounds if the offset is not constant.
+ */
+ NIR_INTRINSIC_RANGE = 5,
+
+ /**
+ * The Vulkan descriptor set for vulkan_resource_index intrinsic.
+ */
+ NIR_INTRINSIC_DESC_SET = 6,
+
+ /**
+ * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
+ */
+ NIR_INTRINSIC_BINDING = 7,
+
+ NIR_INTRINSIC_NUM_INDEX_FLAGS,
+
+} nir_intrinsic_index_flag;
+
#define NIR_INTRINSIC_MAX_INPUTS 4
typedef struct {
/** the number of constant indices used by the intrinsic */
unsigned num_indices;
+ /** indicates the usage of intr->const_index[n] */
+ unsigned index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
+
/** semantic flags for calls to this intrinsic */
nir_intrinsic_semantic_flag flags;
} nir_intrinsic_info;
extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
+
+#define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
+static inline type \
+nir_intrinsic_##name(nir_intrinsic_instr *instr) \
+{ \
+ const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
+ assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
+ return instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
+} \
+static inline void \
+nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
+{ \
+ const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
+ assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
+ instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
+}
+
+INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
+INTRINSIC_IDX_ACCESSORS(base, BASE, int)
+INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
+INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
+INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
+INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
+INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
+
/**
* \group texture information
*
*/
bool is_new_style_shadow;
- /* constant offset - must be 0 if the offset source is used */
- int const_offset[4];
-
/* gather component selector */
unsigned component : 2;
/** The texture deref
*
- * If both this and `sampler` are both NULL, use texture_index instead.
- * If `texture` is NULL, but `sampler` is non-NULL, then the texture is
- * implied from the sampler.
+ * If this is null, use texture_index instead.
*/
nir_deref_var *texture;
/** The sampler index
+ *
+ * The following operations do not require a sampler and, as such, this
+ * field should be ignored:
+ * - nir_texop_txf
+ * - nir_texop_txf_ms
+ * - nir_texop_txs
+ * - nir_texop_lod
+ * - nir_texop_tg4
+ * - nir_texop_query_levels
+ * - nir_texop_texture_samples
+ * - nir_texop_samples_identical
*
* If this texture instruction has a nir_tex_src_sampler_offset source,
* then the sampler index is given by sampler_index + sampler_offset.
typedef struct {
union {
- float f[4];
- int32_t i[4];
- uint32_t u[4];
+ float f32[4];
+ double f64[4];
+ int32_t i32[4];
+ uint32_t u32[4];
+ int64_t i64[4];
+ uint64_t u64[4];
};
} nir_const_value;
gl_shader_stage stage;
} nir_shader;
+static inline nir_function *
+nir_shader_get_entrypoint(nir_shader *shader)
+{
+ assert(exec_list_length(&shader->functions) == 1);
+ struct exec_node *func_node = exec_list_get_head(&shader->functions);
+ nir_function *func = exec_node_data(nir_function, func_node, node);
+ assert(func->return_type == glsl_void_type());
+ assert(func->num_params == 0);
+ return func;
+}
+
#define nir_foreach_function(shader, func) \
foreach_list_typed(nir_function, func, node, &(shader)->functions)
nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
- unsigned num_components);
+ unsigned num_components,
+ unsigned bit_size);
nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
nir_intrinsic_op op);
nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
- unsigned num_components);
+ unsigned num_components,
+ unsigned bit_size);
nir_deref_var *nir_deref_var_create(void *mem_ctx, nir_variable *var);
nir_deref_array *nir_deref_array_create(void *mem_ctx);
nir_dest new_dest);
void nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
- unsigned num_components, const char *name);
+ unsigned num_components, unsigned bit_size,
+ const char *name);
void nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
- unsigned num_components, const char *name);
+ unsigned num_components, unsigned bit_size,
+ const char *name);
void nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src);
void nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
nir_instr *after_me);
void nir_print_instr(const nir_instr *instr, FILE *fp);
nir_shader *nir_shader_clone(void *mem_ctx, const nir_shader *s);
-nir_function_impl *nir_function_impl_clone(const nir_function_impl *impl);
+nir_function_impl *nir_function_impl_clone(const nir_function_impl *fi);
nir_constant *nir_constant_clone(const nir_constant *c, nir_variable *var);
+nir_variable *nir_variable_clone(const nir_variable *c, nir_shader *shader);
#ifdef DEBUG
void nir_validate_shader(nir_shader *shader);
bool nir_lower_global_vars_to_local(nir_shader *shader);
-bool nir_lower_indirect_derefs(nir_shader *shader, uint32_t mode_mask);
+bool nir_lower_indirect_derefs(nir_shader *shader, nir_variable_mode modes);
bool nir_lower_locals_to_regs(nir_shader *shader);
void nir_lower_outputs_to_temporaries(nir_shader *shader,
nir_function *entrypoint);
-
void nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint);
void nir_assign_var_locations(struct exec_list *var_list,
int (*type_size)(const struct glsl_type *));
void nir_lower_io(nir_shader *shader,
- nir_variable_mode mode,
+ nir_variable_mode modes,
int (*type_size)(const struct glsl_type *));
nir_src *nir_get_io_offset_src(nir_intrinsic_instr *instr);
nir_src *nir_get_io_vertex_index_src(nir_intrinsic_instr *instr);
void nir_lower_vars_to_ssa(nir_shader *shader);
-bool nir_remove_dead_variables(nir_shader *shader, nir_variable_mode mode);
+bool nir_remove_dead_variables(nir_shader *shader, nir_variable_mode modes);
void nir_move_vec_src_uses_to_dest(nir_shader *shader);
bool nir_lower_vec_to_movs(nir_shader *shader);
unsigned saturate_t;
unsigned saturate_r;
- /* Bitmask of samplers that need swizzling.
+ /* Bitmask of textures that need swizzling.
*
- * If (swizzle_result & (1 << sampler_index)), then the swizzle in
- * swizzles[sampler_index] is applied to the result of the texturing
+ * If (swizzle_result & (1 << texture_index)), then the swizzle in
+ * swizzles[texture_index] is applied to the result of the texturing
* operation.
*/
unsigned swizzle_result;
- /* A swizzle for each sampler. Values 0-3 represent x, y, z, or w swizzles
+ /* A swizzle for each texture. Values 0-3 represent x, y, z, or w swizzles
* while 4 and 5 represent 0 and 1 respectively.
*/
uint8_t swizzles[32][4];
bool nir_lower_gs_intrinsics(nir_shader *shader);
+void nir_lower_double_pack(nir_shader *shader);
+
bool nir_normalize_cubemap_coords(nir_shader *shader);
void nir_live_ssa_defs_impl(nir_function_impl *impl);
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