freedreno/a6xx: Add multiview registers
[mesa.git] / src / freedreno / .gitlab-ci / reference / dEQP-VK.draw.indirect_draw.indexed.indirect_draw_count.triangle_list.log
index 600f5129c90e3fdd72fa1e5720e8379e0f0c4504..99ef25fafe5c0c6f6991d83875623460a0efddd2 100644 (file)
@@ -144,8 +144,8 @@ t4          write PC_UNKNOWN_9980 (9980)
 t4             write PC_PRIMITIVE_CNTL_6 (9b06)
                        PC_PRIMITIVE_CNTL_6: { STRIDE_IN_VPC = 0 }
 000000000105816c:              0000: 409b0601 00000000
-t4             write PC_UNKNOWN_9B07 (9b07)
-                       PC_UNKNOWN_9B07: 0
+t4             write PC_MULTIVIEW_CNTL (9b07)
+                       PC_MULTIVIEW_CNTL: { VIEWS = 0 }
 0000000001058174:              0000: 489b0701 00000000
 t4             write SP_UNKNOWN_A81B (a81b)
                        SP_UNKNOWN_A81B: 0
@@ -183,8 +183,8 @@ t4          write HLSQ_CONTROL_5_REG (b986)
 t4             write VFD_MODE_CNTL (a007)
                        VFD_MODE_CNTL: { 0 }
 00000000010581d4:              0000: 40a00701 00000000
-t4             write VFD_UNKNOWN_A008 (a008)
-                       VFD_UNKNOWN_A008: 0
+t4             write VFD_MULTIVIEW_CNTL (a008)
+                       VFD_MULTIVIEW_CNTL: { VIEWS = 0 }
 00000000010581dc:              0000: 40a00801 00000000
 t4             write PC_MODE_CNTL (9804)
                        PC_MODE_CNTL: 0x1f
@@ -335,10 +335,10 @@ t7                opcode: CP_BLIT (2c) (2 dwords)
 !+     0000001f                PC_MODE_CNTL: 0x1f
  +     00000000                PC_UNKNOWN_9980: 0
  +     00000000                PC_PRIMITIVE_CNTL_6: { STRIDE_IN_VPC = 0 }
- +     00000000                PC_UNKNOWN_9B07: 0
+ +     00000000                PC_MULTIVIEW_CNTL: { VIEWS = 0 }
  +     00000000                PC_UNKNOWN_9E72: 0
  +     00000000                VFD_MODE_CNTL: { 0 }
- +     00000000                VFD_UNKNOWN_A008: 0
+ +     00000000                VFD_MULTIVIEW_CNTL: { VIEWS = 0 }
 !+     00000001                VFD_ADD_OFFSET: { VERTEX }
  +     00000000                SP_UNKNOWN_A81B: 0
  +     00000000                SP_HS_CTRL_REG0: { HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 0 | BRANCHSTACK = 0 | THREADSIZE = TWO_QUADS }
@@ -952,7 +952,7 @@ t4                                  write SP_HS_UNKNOWN_A831 (a831)
                                                SP_HS_UNKNOWN_A831: 0
 0000000001054258:                                      0000: 48a83101 00000000
 t4                                     write VFD_CONTROL_1 (a001)
-                                               VFD_CONTROL_1: { REGID4VTX = r2.y | REGID4INST = r63.x | REGID4PRIMID = r63.x | 0xfc000000 }
+                                               VFD_CONTROL_1: { REGID4VTX = r2.y | REGID4INST = r63.x | REGID4PRIMID = r63.x | REGID4VIEWID = r63.x }
                                                VFD_CONTROL_2: { REGID_HSPATCHID = r63.x | REGID_INVOCATIONID = r63.x }
                                                VFD_CONTROL_3: { REGID_DSPATCHID = r63.x | REGID_TESSX = r63.x | REGID_TESSY = r63.x | 0xfc }
                                                VFD_CONTROL_4: 0xfc
@@ -976,7 +976,7 @@ t4                                  write SP_VS_VPC_DST[0].REG (a813)
                                                SP_VS_VPC_DST[0].REG: { OUTLOC0 = 0 | OUTLOC1 = 4 | OUTLOC2 = 0 | OUTLOC3 = 0 }
 00000000010542ac:                                      0000: 48a81301 00000400
 t4                                     write VPC_VS_PACK (9301)
-                                               VPC_VS_PACK: { STRIDE_IN_VPC = 8 | POSITIONLOC = 4 | PSIZELOC = 255 }
+                                               VPC_VS_PACK: { STRIDE_IN_VPC = 8 | POSITIONLOC = 4 | PSIZELOC = 255 | EXTRAPOS = 0 }
 00000000010542b4:                                      0000: 40930101 00ff0408
 t4                                     write VPC_VS_CLIP_CNTL (9101)
                                                VPC_VS_CLIP_CNTL: { CLIP_MASK = 0 | CLIP_DIST_03_LOC = 255 | CLIP_DIST_47_LOC = 255 }
@@ -1000,7 +1000,7 @@ t4                                        write PC_PRIMID_PASSTHRU (9806)
                                                PC_PRIMID_PASSTHRU: FALSE
 00000000010542ec:                                      0000: 40980601 00000000
 t4                                     write VPC_CNTL_0 (9304)
-                                               VPC_CNTL_0: { NUMNONPOSVAR = 4 | PRIMIDLOC = 255 | VARYING | UNKLOC = 255 }
+                                               VPC_CNTL_0: { NUMNONPOSVAR = 4 | PRIMIDLOC = 255 | VARYING | VIEWIDLOC = 255 }
 00000000010542f4:                                      0000: 40930401 ff01ff04
 t4                                     write VPC_VARYING_INTERP[0].MODE (9200)
                                                VPC_VARYING_INTERP[0].MODE: 0
@@ -1447,8 +1447,8 @@ t7                        opcode: CP_DRAW_INDIRECT_MULTI (2a) (12 dwords)
 !+     ffffffff                        VPC_VAR[0x2].DISABLE: 0xffffffff
 !+     ffffffff                        VPC_VAR[0x3].DISABLE: 0xffffffff
  +     00000000                        VPC_SO_CNTL: { 0 }
-!+     00ff0408                        VPC_VS_PACK: { STRIDE_IN_VPC = 8 | POSITIONLOC = 4 | PSIZELOC = 255 }
-!+     ff01ff04                        VPC_CNTL_0: { NUMNONPOSVAR = 4 | PRIMIDLOC = 255 | VARYING | UNKLOC = 255 }
+!+     00ff0408                        VPC_VS_PACK: { STRIDE_IN_VPC = 8 | POSITIONLOC = 4 | PSIZELOC = 255 | EXTRAPOS = 0 }
+!+     ff01ff04                        VPC_CNTL_0: { NUMNONPOSVAR = 4 | PRIMIDLOC = 255 | VARYING | VIEWIDLOC = 255 }
  +     00000000                        VPC_SO_BUF_CNTL: { 0 }
 !+     ffffffff                        PC_RESTART_INDEX: 4294967295
  +     00000000                        PC_PRIMID_PASSTHRU: FALSE
@@ -1456,7 +1456,7 @@ t7                        opcode: CP_DRAW_INDIRECT_MULTI (2a) (12 dwords)
  +     00000000                        PC_PRIMITIVE_CNTL_0: { 0 }
 !+     00000008                        PC_VS_OUT_CNTL: { STRIDE_IN_VPC = 8 | CLIP_MASK = 0 }
 !+     00000303                        VFD_CONTROL_0: { FETCH_CNT = 3 | DECODE_CNT = 3 }
-!+     fcfcfc09                        VFD_CONTROL_1: { REGID4VTX = r2.y | REGID4INST = r63.x | REGID4PRIMID = r63.x | 0xfc000000 }
+!+     fcfcfc09                        VFD_CONTROL_1: { REGID4VTX = r2.y | REGID4INST = r63.x | REGID4PRIMID = r63.x | REGID4VIEWID = r63.x }
 !+     0000fcfc                        VFD_CONTROL_2: { REGID_HSPATCHID = r63.x | REGID_INVOCATIONID = r63.x }
 !+     fcfcfcfc                        VFD_CONTROL_3: { REGID_DSPATCHID = r63.x | REGID_TESSX = r63.x | REGID_TESSY = r63.x | 0xfc }
 !+     000000fc                        VFD_CONTROL_4: 0xfc