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freedreno/a6xx: Add multiview registers
[mesa.git] / src / freedreno / .gitlab-ci / reference / fd-clouds.log
diff --git a/src/freedreno/.gitlab-ci/reference/fd-clouds.log b/src/freedreno/.gitlab-ci/reference/fd-clouds.log
index 302d1afcf3bb7f06328260ddb682e0bf8fc80b45..2797eee1fb81f3e08f9dfd6ee87c7d75455197a5 100644 (file)
--- a/src/freedreno/.gitlab-ci/reference/fd-clouds.log
+++ b/src/freedreno/.gitlab-ci/reference/fd-clouds.log
@@ -132,8 +132,8 @@ t4          write 0x9990 (9990)
 t4             write PC_UNKNOWN_9980 (9980)
                        PC_UNKNOWN_9980: 0
 0000000001d9114c:              0000: 40998001 00000000
-t4             write PC_UNKNOWN_9B07 (9b07)
-                       PC_UNKNOWN_9B07: 0
+t4             write PC_MULTIVIEW_CNTL (9b07)
+                       PC_MULTIVIEW_CNTL: { VIEWS = 0 }
 0000000001d91154:              0000: 489b0701 00000000
 t4             write SP_UNKNOWN_A81B (a81b)
                        SP_UNKNOWN_A81B: 0
@@ -213,8 +213,8 @@ t4          write CP_SCRATCH[0x7].REG (088a)
 t4             write VFD_MODE_CNTL (a007)
                        VFD_MODE_CNTL: { 0 }
 0000000001d91220:              0000: 40a00701 00000000
-t4             write VFD_UNKNOWN_A008 (a008)
-                       VFD_UNKNOWN_A008: 0
+t4             write VFD_MULTIVIEW_CNTL (a008)
+                       VFD_MULTIVIEW_CNTL: { VIEWS = 0 }
 0000000001d91228:              0000: 40a00801 00000000
 t4             write PC_MODE_CNTL (9804)
                        PC_MODE_CNTL: 0x1f
@@ -688,7 +688,7 @@ t4                                  write SP_VS_PRIMITIVE_CNTL (a802)
                                                SP_VS_PRIMITIVE_CNTL: { OUT = 1 }
 0000000001121080:                                      0000: 48a80201 00000001
 t4                                     write VPC_CNTL_0 (9304)
-                                               VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | UNKLOC = 255 }
+                                               VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | VIEWIDLOC = 255 }
 0000000001121088:                                      0000: 40930401 ff00ff00
 t4                                     write PC_VS_OUT_CNTL (9b01)
                                                PC_VS_OUT_CNTL: { STRIDE_IN_VPC = 4 | CLIP_MASK = 0 }
@@ -743,7 +743,7 @@ t4                                  write SP_FS_OUTPUT[0].REG (a98e)
 0000000001121104:                                      0000: 48a98e08 000000fc 000000fc 000000fc 000000fc 000000fc 000000fc 000000fc
 0000000001121124:                                      0020: 000000fc
 t4                                     write VPC_VS_PACK (9301)
-                                               VPC_VS_PACK: { STRIDE_IN_VPC = 4 | POSITIONLOC = 0 | PSIZELOC = 255 }
+                                               VPC_VS_PACK: { STRIDE_IN_VPC = 4 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
 0000000001121128:                                      0000: 40930101 00ff0004
 t4                                     write PC_PRIMITIVE_CNTL_6 (9b06)
                                                PC_PRIMITIVE_CNTL_6: { STRIDE_IN_VPC = 0 }
@@ -758,7 +758,7 @@ t4                                  write VPC_UNKNOWN_9107 (9107)
                                                VPC_UNKNOWN_9107: 0
 0000000001121148:                                      0000: 48910701 00000000
 t4                                     write VFD_CONTROL_1 (a001)
-                                               VFD_CONTROL_1: { REGID4VTX = r63.x | REGID4INST = r63.x | REGID4PRIMID = r63.x | 0xfc000000 }
+                                               VFD_CONTROL_1: { REGID4VTX = r63.x | REGID4INST = r63.x | REGID4PRIMID = r63.x | REGID4VIEWID = r63.x }
                                                VFD_CONTROL_2: { REGID_HSPATCHID = r63.x | REGID_INVOCATIONID = r63.x }
                                                VFD_CONTROL_3: { REGID_DSPATCHID = r63.x | REGID_TESSX = r63.x | REGID_TESSY = r63.x | 0xfc }
                                                VFD_CONTROL_4: 0xfc
@@ -1051,8 +1051,8 @@ t7                        opcode: CP_DRAW_INDX_OFFSET (38) (4 dwords)
 !+     ffffffff                        VPC_VAR[0x3].DISABLE: 0xffffffff
  +     00000000                        VPC_POINT_COORD_INVERT: { 0 }
  +     00000000                        VPC_UNKNOWN_9300: 0
-!+     00ff0004                        VPC_VS_PACK: { STRIDE_IN_VPC = 4 | POSITIONLOC = 0 | PSIZELOC = 255 }
-!+     ff00ff00                        VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | UNKLOC = 255 }
+!+     00ff0004                        VPC_VS_PACK: { STRIDE_IN_VPC = 4 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
+!+     ff00ff00                        VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | VIEWIDLOC = 255 }
  +     00000000                        VPC_SO_BUF_CNTL: { 0 }
  +     00000000                        VPC_SO_DISABLE: { 0 }
  +     00000000                        VPC_UNKNOWN_9600: 0
@@ -1068,17 +1068,17 @@ t7                      opcode: CP_DRAW_INDX_OFFSET (38) (4 dwords)
 !+     00000004                        PC_VS_OUT_CNTL: { STRIDE_IN_VPC = 4 | CLIP_MASK = 0 }
  +     00000000                        PC_PRIMITIVE_CNTL_3: 0
  +     00000000                        PC_PRIMITIVE_CNTL_6: { STRIDE_IN_VPC = 0 }
- +     00000000                        PC_UNKNOWN_9B07: 0
+ +     00000000                        PC_MULTIVIEW_CNTL: { VIEWS = 0 }
  +     00000000                        PC_UNKNOWN_9E72: 0
 !+     00000101                        VFD_CONTROL_0: { FETCH_CNT = 1 | DECODE_CNT = 1 }
-!+     fcfcfcfc                        VFD_CONTROL_1: { REGID4VTX = r63.x | REGID4INST = r63.x | REGID4PRIMID = r63.x | 0xfc000000 }
+!+     fcfcfcfc                        VFD_CONTROL_1: { REGID4VTX = r63.x | REGID4INST = r63.x | REGID4PRIMID = r63.x | REGID4VIEWID = r63.x }
 !+     0000fcfc                        VFD_CONTROL_2: { REGID_HSPATCHID = r63.x | REGID_INVOCATIONID = r63.x }
 !+     fcfcfcfc                        VFD_CONTROL_3: { REGID_DSPATCHID = r63.x | REGID_TESSX = r63.x | REGID_TESSY = r63.x | 0xfc }
 !+     000000fc                        VFD_CONTROL_4: 0xfc
 !+     0000fcfc                        VFD_CONTROL_5: { REGID_GSHEADER = r63.x | 0xfc00 }
  +     00000000                        VFD_CONTROL_6: { 0 }
 !+     00000001                        VFD_MODE_CNTL: { BINNING_PASS }
- +     00000000                        VFD_UNKNOWN_A008: 0
+ +     00000000                        VFD_MULTIVIEW_CNTL: { VIEWS = 0 }
 !+     00000001                        VFD_ADD_OFFSET: { VERTEX }
  +     00000000                        VFD_INDEX_OFFSET: 0
  +     00000000                        VFD_INSTANCE_START_OFFSET: 0
@@ -2003,7 +2003,7 @@ t4                                        write SP_VS_PRIMITIVE_CNTL (a802)
                                                SP_VS_PRIMITIVE_CNTL: { OUT = 1 }
 0000000001120080:                                      0000: 48a80201 00000001
 t4                                     write VPC_CNTL_0 (9304)
-                                               VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | UNKLOC = 255 }
+                                               VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | VIEWIDLOC = 255 }
 0000000001120088:                                      0000: 40930401 ff00ff00
 t4                                     write PC_VS_OUT_CNTL (9b01)
                                                PC_VS_OUT_CNTL: { STRIDE_IN_VPC = 4 | CLIP_MASK = 0 }
@@ -2058,7 +2058,7 @@ t4                                        write SP_FS_OUTPUT[0].REG (a98e)
 0000000001120104:                                      0000: 48a98e08 00000004 00000004 00000004 00000004 00000004 00000004 00000004
 0000000001120124:                                      0020: 00000004
 t4                                     write VPC_VS_PACK (9301)
-                                               VPC_VS_PACK: { STRIDE_IN_VPC = 4 | POSITIONLOC = 0 | PSIZELOC = 255 }
+                                               VPC_VS_PACK: { STRIDE_IN_VPC = 4 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
 0000000001120128:                                      0000: 40930101 00ff0004
 t4                                     write PC_PRIMITIVE_CNTL_6 (9b06)
                                                PC_PRIMITIVE_CNTL_6: { STRIDE_IN_VPC = 0 }
@@ -4929,7 +4929,7 @@ t7                                        opcode: CP_LOAD_STATE6_FRAG (34) (4 dwords)
                                                - shaderdb: 140 (ss), 0 (sy)
 0000000001120164:                                      0000: 70348003 16320000 01013000 00000000
 t4                                     write VFD_CONTROL_1 (a001)
-                                               VFD_CONTROL_1: { REGID4VTX = r63.x | REGID4INST = r63.x | REGID4PRIMID = r63.x | 0xfc000000 }
+                                               VFD_CONTROL_1: { REGID4VTX = r63.x | REGID4INST = r63.x | REGID4PRIMID = r63.x | REGID4VIEWID = r63.x }
                                                VFD_CONTROL_2: { REGID_HSPATCHID = r63.x | REGID_INVOCATIONID = r63.x }
                                                VFD_CONTROL_3: { REGID_DSPATCHID = r63.x | REGID_TESSX = r63.x | REGID_TESSY = r63.x | 0xfc }
                                                VFD_CONTROL_4: 0xfc
@@ -5293,15 +5293,15 @@ t7                      opcode: CP_DRAW_INDX_OFFSET (38) (4 dwords)
  +     ffffffff                        VPC_VAR[0x1].DISABLE: 0xffffffff
  +     ffffffff                        VPC_VAR[0x2].DISABLE: 0xffffffff
  +     ffffffff                        VPC_VAR[0x3].DISABLE: 0xffffffff
- +     00ff0004                        VPC_VS_PACK: { STRIDE_IN_VPC = 4 | POSITIONLOC = 0 | PSIZELOC = 255 }
- +     ff00ff00                        VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | UNKLOC = 255 }
+ +     00ff0004                        VPC_VS_PACK: { STRIDE_IN_VPC = 4 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
+ +     ff00ff00                        VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | VIEWIDLOC = 255 }
  +     ffffffff                        PC_RESTART_INDEX: 4294967295
  +     00000002                        PC_PRIMITIVE_CNTL_0: { PROVOKING_VTX_LAST }
  +     00000004                        PC_VS_OUT_CNTL: { STRIDE_IN_VPC = 4 | CLIP_MASK = 0 }
  +     00000000                        PC_PRIMITIVE_CNTL_3: 0
  +     00000000                        PC_PRIMITIVE_CNTL_6: { STRIDE_IN_VPC = 0 }
  +     00000101                        VFD_CONTROL_0: { FETCH_CNT = 1 | DECODE_CNT = 1 }
- +     fcfcfcfc                        VFD_CONTROL_1: { REGID4VTX = r63.x | REGID4INST = r63.x | REGID4PRIMID = r63.x | 0xfc000000 }
+ +     fcfcfcfc                        VFD_CONTROL_1: { REGID4VTX = r63.x | REGID4INST = r63.x | REGID4PRIMID = r63.x | REGID4VIEWID = r63.x }
  +     0000fcfc                        VFD_CONTROL_2: { REGID_HSPATCHID = r63.x | REGID_INVOCATIONID = r63.x }
  +     fcfcfcfc                        VFD_CONTROL_3: { REGID_DSPATCHID = r63.x | REGID_TESSX = r63.x | REGID_TESSY = r63.x | 0xfc }
  +     000000fc                        VFD_CONTROL_4: 0xfc