#define RGB_TILE_HEIGHT_ALIGNMENT 16
#define UBWC_PLANE_SIZE_ALIGNMENT 4096
+static int
+fdl6_pitchalign(struct fdl_layout *layout, int ta, int level)
+{
+ uint32_t pitchalign = 64;
+ if (fdl_tile_mode(layout, level))
+ pitchalign = tile_alignment[ta].pitchalign;
+
+ return pitchalign;
+}
+
/* NOTE: good way to test this is: (for example)
* piglit/bin/texelFetch fs sampler3D 100x100x8
*/
layout->cpp = util_format_get_blocksize(format);
layout->cpp *= nr_samples;
+ layout->cpp_shift = ffs(layout->cpp) - 1;
+
layout->format = format;
layout->nr_samples = nr_samples;
+ layout->layer_first = !is_3d;
if (depth0 > 1)
layout->ubwc = false;
if (tile_alignment[layout->cpp].ubwc_blockwidth == 0)
layout->ubwc = false;
- const struct util_format_description *format_desc =
- util_format_description(format);
int ta = layout->cpp;
/* The z16/r16 formats seem to not play by the normal tiling rules: */
if ((layout->cpp == 2) && (util_format_get_nr_components(format) == 2))
ta = 0;
- uint32_t alignment;
- if (is_3d) {
- layout->layer_first = false;
- alignment = 4096;
- } else {
- layout->layer_first = true;
- alignment = 1;
- }
/* in layer_first layout, the level (slice) contains just one
* layer (since in fact the layer contains the slices)
*/
layout->base_align = 64;
}
+ uint32_t pitch0 = util_align_npot(width0, fdl6_pitchalign(layout, ta, 0));
+
for (uint32_t level = 0; level < mip_levels; level++) {
uint32_t depth = u_minify(depth0, level);
struct fdl_slice *slice = &layout->slices[level];
width = u_minify(width0, level);
height = u_minify(height0, level);
}
- uint32_t aligned_height = height;
- uint32_t pitchalign;
- if (tile_mode) {
- pitchalign = tile_alignment[ta].pitchalign;
- aligned_height = align(aligned_height,
- tile_alignment[ta].heightalign);
- } else {
- pitchalign = 64;
- }
+ uint32_t nblocksy = util_format_get_nblocksy(format, height);
+ if (tile_mode)
+ nblocksy = align(nblocksy, tile_alignment[ta].heightalign);
/* The blits used for mem<->gmem work at a granularity of
* 32x32, which can cause faults due to over-fetch on the
* may not be:
*/
if (level == mip_levels - 1)
- aligned_height = align(aligned_height, 32);
+ nblocksy = align(nblocksy, 32);
- if (format_desc->layout == UTIL_FORMAT_LAYOUT_ASTC)
- slice->pitch =
- util_align_npot(width, pitchalign * util_format_get_blockwidth(format));
- else
- slice->pitch = align(width, pitchalign);
+ uint32_t nblocksx =
+ util_align_npot(util_format_get_nblocksx(format, u_minify(pitch0, level)),
+ fdl6_pitchalign(layout, ta, level));
slice->offset = layout->size;
- uint32_t blocks = util_format_get_nblocks(format,
- slice->pitch, aligned_height);
+ uint32_t blocks = nblocksx * nblocksy;
+
+ slice->pitch = nblocksx * layout->cpp;
/* 1d array and 2d array textures must all have the same layer size
* for each miplevel on a6xx. 3d textures can have different layer
*/
if (is_3d) {
if (level < 1 || layout->slices[level - 1].size0 > 0xf000) {
- slice->size0 = align(blocks * layout->cpp, alignment);
+ slice->size0 = align(blocks * layout->cpp, 4096);
} else {
slice->size0 = layout->slices[level - 1].size0;
}
} else {
- slice->size0 = align(blocks * layout->cpp, alignment);
+ slice->size0 = blocks * layout->cpp;
}
layout->size += slice->size0 * depth * layers_in_level;