freedreno/registers: SC_WAIT_WC is not a6xx

[mesa.git] / src / freedreno / registers / adreno / adreno_pm4.xml

diff --git a/src/freedreno/registers/adreno/adreno_pm4.xml b/src/freedreno/registers/adreno/adreno_pm4.xml
index b3ccff223ca788723075e5f8da038330dd36f59d..f2720b9a251b9c356e82917f58730fd2df0fe5b7 100644 (file)
--- a/src/freedreno/registers/adreno/adreno_pm4.xml
+++ b/src/freedreno/registers/adreno/adreno_pm4.xml
@@ -14,7 +14,7 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
        <value name="VIZQUERY_START" value="7" varset="chip" variants="A2XX"/>
        <value name="HLSQ_FLUSH" value="7" varset="chip" variants="A3XX-A4XX"/>
        <value name="VIZQUERY_END" value="8" varset="chip" variants="A2XX"/>
-       <value name="SC_WAIT_WC" value="9"/>
+       <value name="SC_WAIT_WC" value="9" varset="chip" variants="A2XX"/>
        <value name="WRITE_PRIMITIVE_COUNTS" value="9" varset="chip" variants="A6XX"/>
        <value name="START_PRIMITIVE_CTRS" value="11" varset="chip" variants="A6XX"/>
        <value name="STOP_PRIMITIVE_CTRS" value="12" varset="chip" variants="A6XX"/>
@@ -313,12 +313,30 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
        <value name="CP_DRAW_INDIRECT_MULTI" value="0x2a" varset="chip" variants="A6XX"/>
        <value name="CP_DRAW_AUTO" value="0x24"/>
 
-       <value name="CP_UNKNOWN_19" value="0x19"/>
+       <doc>
+               Enable or disable predication globally. Also resets the
+               predicate to "passing" and the local bit to enabled when
+               enabling global predication.
+       </doc>
+       <value name="CP_DRAW_PRED_ENABLE_GLOBAL" value="0x19"/>
 
-       <doc>set to 1 for fastclear..:</doc>
-       <value name="CP_UNKNOWN_1A" value="0x1a"/>
+       <doc>
+               Enable or disable predication locally. Unlike globally enabling
+               predication, this packet doesn't touch any other state.
+               Predication only happens when enabled globally and locally and a
+               predicate has been set. This should be used for internal draws
+               which aren't supposed to use the predication state:
+
+               CP_DRAW_PRED_ENABLE_LOCAL(0)
+               ... do draw...
+               CP_DRAW_PRED_ENABLE_LOCAL(1)
+       </doc>
+       <value name="CP_DRAW_PRED_ENABLE_LOCAL" value="0x1a"/>
 
-       <value name="CP_UNKNOWN_4E" value="0x4e"/>
+       <doc>
+               Latch a draw predicate into the internal register.
+       </doc>
+       <value name="CP_DRAW_PRED_SET" value="0x4e"/>
 
        <doc>
                for A4xx
@@ -832,8 +850,46 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords)
        </stripe>
 </domain>
 
+<domain name="CP_DRAW_PRED_ENABLE_GLOBAL" width="32" varset="chip">
+       <reg32 offset="0" name="0">
+               <bitfield name="ENABLE" pos="0" type="boolean"/>
+       </reg32>
+</domain>
+
+<domain name="CP_DRAW_PRED_ENABLE_LOCAL" width="32" varset="chip">
+       <reg32 offset="0" name="0">
+               <bitfield name="ENABLE" pos="0" type="boolean"/>
+       </reg32>
+</domain>
+
+<domain name="CP_DRAW_PRED_SET" width="32" varset="chip">
+       <enum name="cp_draw_pred_src">
+               <!--
+                       Sources 1-4 seem to be about combining reading
+                       SO/primitive queries and setting the predicate, which is
+                       a DX11-specific optimization (since in DX11 you can only
+                       predicate on the result of queries).
+               -->
+               <value name="PRED_SRC_MEM" value="5">
+                       <doc>
+                               Read a 64-bit value at the given address and
+                               test if it equals/doesn't equal 0.
+                       </doc>
+               </value>
+       </enum>
+       <enum name="cp_draw_pred_test">
+               <value name="NE_0_PASS" value="0"/>
+               <value name="EQ_0_PASS" value="1"/>
+       </enum>
+       <reg32 offset="0" name="0">
+               <bitfield name="SRC" low="4" high="7" type="cp_draw_pred_src"/>
+               <bitfield name="TEST" pos="8" type="cp_draw_pred_test"/>
+       </reg32>
+       <reg64 offset="1" name="MEM_ADDR" type="address"/>
+</domain>
+
 <domain name="CP_SET_DRAW_STATE" width="32" varset="chip" variants="A4XX-">
-       <array offset="0" name="" stride="3" length="100">
+       <array offset="0" stride="3" length="100">
                <reg32 offset="0" name="0">
                        <bitfield name="COUNT" low="0" high="15" type="uint"/>
                        <bitfield name="DIRTY" pos="16" type="boolean"/>
@@ -1497,7 +1553,7 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords)
                <value value="3" name="NON_PRIV_SAVE_ADDR"/>
                <value value="4" name="COUNTER"/>
        </enum>
-       <array offset="0" name="" stride="3" length="100">
+       <array offset="0" stride="3" length="100">
                <reg32 offset="0" name="0">
                        <bitfield name="PSEUDO_REG" low="0" high="2" type="pseudo_reg"/>
                </reg32>