ir3, freedreno: Round up constlen earlier

[mesa.git] / src / freedreno / vulkan / tu_pipeline.c

diff --git a/src/freedreno/vulkan/tu_pipeline.c b/src/freedreno/vulkan/tu_pipeline.c
index 964d7438ab6f6a437bcca813c4ed48ffb7cfd99f..811c777b3e060cff2dab08b3ce613e796ebd8c8b 100644 (file)
--- a/src/freedreno/vulkan/tu_pipeline.c
+++ b/src/freedreno/vulkan/tu_pipeline.c
@@ -412,7 +412,7 @@ tu6_emit_xs_config(struct tu_cs *cs,
    tu_cs_emit(cs, xs->instrlen);
 
    tu_cs_emit_pkt4(cs, cfg->reg_hlsq_xs_ctrl, 1);
-   tu_cs_emit(cs, A6XX_HLSQ_VS_CNTL_CONSTLEN(align(xs->constlen, 4)) |
+   tu_cs_emit(cs, A6XX_HLSQ_VS_CNTL_CONSTLEN(xs->constlen) |
                   A6XX_HLSQ_VS_CNTL_ENABLED);
 
    /* emit program binary