dst->d[3] = src->d[3] - floor(src->d[3]);
}
+static void
+micro_dflr(union tgsi_double_channel *dst,
+ const union tgsi_double_channel *src)
+{
+ dst->d[0] = floor(src->d[0]);
+ dst->d[1] = floor(src->d[1]);
+ dst->d[2] = floor(src->d[2]);
+ dst->d[3] = floor(src->d[3]);
+}
+
static void
micro_dldexp(union tgsi_double_channel *dst,
const union tgsi_double_channel *src0,
}
}
-
-/**
- * Check if there's a potential src/dst register data dependency when
- * using SOA execution.
- * Example:
- * MOV T, T.yxwz;
- * This would expand into:
- * MOV t0, t1;
- * MOV t1, t0;
- * MOV t2, t3;
- * MOV t3, t2;
- * The second instruction will have the wrong value for t0 if executed as-is.
- */
-boolean
-tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst)
-{
- uint i, chan;
-
- uint writemask = inst->Dst[0].Register.WriteMask;
- if (writemask == TGSI_WRITEMASK_X ||
- writemask == TGSI_WRITEMASK_Y ||
- writemask == TGSI_WRITEMASK_Z ||
- writemask == TGSI_WRITEMASK_W ||
- writemask == TGSI_WRITEMASK_NONE) {
- /* no chance of data dependency */
- return FALSE;
- }
-
- /* loop over src regs */
- for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
- if ((inst->Src[i].Register.File ==
- inst->Dst[0].Register.File) &&
- ((inst->Src[i].Register.Index ==
- inst->Dst[0].Register.Index) ||
- inst->Src[i].Register.Indirect ||
- inst->Dst[0].Register.Indirect)) {
- /* loop over dest channels */
- uint channelsWritten = 0x0;
- for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
- if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
- /* check if we're reading a channel that's been written */
- uint swizzle = tgsi_util_get_full_src_register_swizzle(&inst->Src[i], chan);
- if (channelsWritten & (1 << swizzle)) {
- return TRUE;
- }
-
- channelsWritten |= (1 << chan);
- }
- }
- }
- }
- return FALSE;
-}
-
-
/**
* Initialize machine state by expanding tokens to full instructions,
* allocating temporary storage, setting up constants, etc.
* sizeof(struct tgsi_full_declaration));
maxDeclarations += 10;
}
- if (parse.FullToken.FullDeclaration.Declaration.File == TGSI_FILE_OUTPUT) {
- unsigned reg;
- for (reg = parse.FullToken.FullDeclaration.Range.First;
- reg <= parse.FullToken.FullDeclaration.Range.Last;
- ++reg) {
- ++mach->NumOutputs;
- }
- }
+ if (parse.FullToken.FullDeclaration.Declaration.File == TGSI_FILE_OUTPUT)
+ mach->NumOutputs = MAX2(mach->NumOutputs, parse.FullToken.FullDeclaration.Range.Last + 1);
else if (parse.FullToken.FullDeclaration.Declaration.File == TGSI_FILE_SYSTEM_VALUE) {
const struct tgsi_full_declaration *decl = &parse.FullToken.FullDeclaration;
mach->SysSemanticToIndex[decl->Semantic.Name] = decl->Range.First;
tgsi_exec_machine_create(enum pipe_shader_type shader_type)
{
struct tgsi_exec_machine *mach;
- uint i;
mach = align_malloc( sizeof *mach, 16 );
if (!mach)
exec_double_unary(mach, inst, micro_dfrac);
break;
+ case TGSI_OPCODE_DFLR:
+ exec_double_unary(mach, inst, micro_dflr);
+ break;
+
case TGSI_OPCODE_DLDEXP:
exec_dldexp(mach, inst);
break;