dst.w = src0.w \times src1.w + src2.w
-.. opcode:: SUB - Subtract
-
-.. math::
-
- dst.x = src0.x - src1.x
-
- dst.y = src0.y - src1.y
-
- dst.z = src0.z - src1.z
-
- dst.w = src0.w - src1.w
-
-
.. opcode:: LRP - Linear Interpolate
.. math::
dst.w = src.w - \lfloor src.w\rfloor
-.. opcode:: CLAMP - Clamp
-
-.. math::
-
- dst.x = clamp(src0.x, src1.x, src2.x)
-
- dst.y = clamp(src0.y, src1.y, src2.y)
-
- dst.z = clamp(src0.z, src1.z, src2.z)
-
- dst.w = clamp(src0.w, src1.w, src2.w)
-
-
.. opcode:: FLR - Floor
.. math::
dst.w = 1
-.. opcode:: ABS - Absolute
-
-.. math::
-
- dst.x = |src.x|
-
- dst.y = |src.y|
-
- dst.z = |src.z|
-
- dst.w = |src.w|
-
-
.. opcode:: DPH - Homogeneous Dot Product
This instruction replicates its result.
.. opcode:: DABS - Absolute
+.. math::
+
dst.xy = |src0.xy|
+
dst.zw = |src0.zw|
.. opcode:: DADD - Add
.. opcode:: I64ABS - 64-bit Integer Absolute Value
+.. math::
+
dst.xy = |src0.xy|
+
dst.zw = |src0.zw|
.. opcode:: I64NEG - 64-bit Integer Negate
.. math::
dst.xy = -src.xy
+
dst.zw = -src.zw
.. opcode:: I64SSG - 64-bit Integer Set Sign
.. math::
dst.xy = (src0.xy < 0) ? -1 : (src0.xy > 0) ? 1 : 0
+
dst.zw = (src0.zw < 0) ? -1 : (src0.zw > 0) ? 1 : 0
.. opcode:: U64ADD - 64-bit Integer Add
.. math::
dst.xy = src0.xy + src1.xy
+
dst.zw = src0.zw + src1.zw
.. opcode:: U64MUL - 64-bit Integer Multiply
.. math::
dst.xy = src0.xy * src1.xy
+
dst.zw = src0.zw * src1.zw
.. opcode:: U64SEQ - 64-bit Integer Set on Equal
.. math::
dst.x = src0.xy == src1.xy ? \sim 0 : 0
+
dst.z = src0.zw == src1.zw ? \sim 0 : 0
.. opcode:: U64SNE - 64-bit Integer Set on Not Equal
.. math::
dst.x = src0.xy != src1.xy ? \sim 0 : 0
+
dst.z = src0.zw != src1.zw ? \sim 0 : 0
.. opcode:: U64SLT - 64-bit Unsigned Integer Set on Less Than
.. math::
dst.x = src0.xy < src1.xy ? \sim 0 : 0
+
dst.z = src0.zw < src1.zw ? \sim 0 : 0
.. opcode:: U64SGE - 64-bit Unsigned Integer Set on Greater Equal
.. math::
dst.x = src0.xy >= src1.xy ? \sim 0 : 0
+
dst.z = src0.zw >= src1.zw ? \sim 0 : 0
.. opcode:: I64SLT - 64-bit Signed Integer Set on Less Than
.. math::
dst.x = src0.xy < src1.xy ? \sim 0 : 0
+
dst.z = src0.zw < src1.zw ? \sim 0 : 0
.. opcode:: I64SGE - 64-bit Signed Integer Set on Greater Equal
.. math::
dst.x = src0.xy >= src1.xy ? \sim 0 : 0
+
dst.z = src0.zw >= src1.zw ? \sim 0 : 0
.. opcode:: I64MIN - Minimum of 64-bit Signed Integers
.. math::
dst.xy = min(src0.xy, src1.xy)
+
dst.zw = min(src0.zw, src1.zw)
.. opcode:: U64MIN - Minimum of 64-bit Unsigned Integers
.. math::
dst.xy = min(src0.xy, src1.xy)
+
dst.zw = min(src0.zw, src1.zw)
.. opcode:: I64MAX - Maximum of 64-bit Signed Integers
.. math::
dst.xy = max(src0.xy, src1.xy)
+
dst.zw = max(src0.zw, src1.zw)
.. opcode:: U64MAX - Maximum of 64-bit Unsigned Integers
.. math::
dst.xy = max(src0.xy, src1.xy)
+
dst.zw = max(src0.zw, src1.zw)
.. opcode:: U64SHL - Shift Left 64-bit Unsigned Integer
.. math::
dst.xy = src0.xy << (0x3f \& src1.x)
+
dst.zw = src0.zw << (0x3f \& src1.y)
.. opcode:: I64SHR - Arithmetic Shift Right (of 64-bit Signed Integer)
.. math::
dst.xy = src0.xy >> (0x3f \& src1.x)
+
dst.zw = src0.zw >> (0x3f \& src1.y)
.. opcode:: U64SHR - Logical Shift Right (of 64-bit Unsigned Integer)
.. math::
dst.xy = src0.xy >> (unsigned) (0x3f \& src1.x)
+
dst.zw = src0.zw >> (unsigned) (0x3f \& src1.y)
.. opcode:: I64DIV - 64-bit Signed Integer Division
.. math::
dst.xy = src0.xy \ src1.xy
+
dst.zw = src0.zw \ src1.zw
.. opcode:: U64DIV - 64-bit Unsigned Integer Division
.. math::
dst.xy = src0.xy \ src1.xy
+
dst.zw = src0.zw \ src1.zw
.. opcode:: U64MOD - 64-bit Unsigned Integer Remainder
.. math::
dst.xy = src0.xy \bmod src1.xy
+
dst.zw = src0.zw \bmod src1.zw
.. opcode:: I64MOD - 64-bit Signed Integer Remainder
.. math::
dst.xy = src0.xy \bmod src1.xy
+
dst.zw = src0.zw \bmod src1.zw
.. opcode:: F2U64 - Float to 64-bit Unsigned Int
.. math::
dst.xy = (uint64_t) src0.x
+
dst.zw = (uint64_t) src0.y
.. opcode:: F2I64 - Float to 64-bit Int
.. math::
dst.xy = (int64_t) src0.x
+
dst.zw = (int64_t) src0.y
.. opcode:: U2I64 - Unsigned Integer to 64-bit Integer
.. math::
dst.xy = (uint64_t) src0.x
+
dst.zw = (uint64_t) src0.y
.. opcode:: I2I64 - Signed Integer to 64-bit Integer
.. math::
dst.xy = (int64_t) src0.x
+
dst.zw = (int64_t) src0.y
.. opcode:: D2U64 - Double to 64-bit Unsigned Int
.. math::
dst.xy = (uint64_t) src0.xy
+
dst.zw = (uint64_t) src0.zw
.. opcode:: D2I64 - Double to 64-bit Int
.. math::
dst.xy = (int64_t) src0.xy
+
dst.zw = (int64_t) src0.zw
.. opcode:: U642F - 64-bit unsigned integer to float
.. math::
dst.x = (float) src0.xy
+
dst.y = (float) src0.zw
.. opcode:: I642F - 64-bit Int to Float
.. math::
dst.x = (float) src0.xy
+
dst.y = (float) src0.zw
.. opcode:: U642D - 64-bit unsigned integer to double
.. math::
dst.xy = (double) src0.xy
+
dst.zw = (double) src0.zw
.. opcode:: I642D - 64-bit Int to double
.. math::
dst.xy = (double) src0.xy
+
dst.zw = (double) src0.zw
.. _samplingopcodes:
which means that points will be generated instead of primitives.
NUM_CLIPDIST_ENABLED
-""""""""""""""""
+""""""""""""""""""""
How many clip distance scalar outputs are enabled.
NUM_CULLDIST_ENABLED
-""""""""""""""""
+""""""""""""""""""""
How many cull distance scalar outputs are enabled.
is bound. This is only a hint to the driver and doesn't have to be precise.
Only set for VS and TES.
-TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH / HEIGHT / DEPTH
-"""""""""""""""""""""""""""""""""""""""""""""""""""
+CS_FIXED_BLOCK_WIDTH / HEIGHT / DEPTH
+"""""""""""""""""""""""""""""""""""""
Threads per block in each dimension, if known at compile time. If the block size
is known all three should be at least 1. If it is unknown they should all be set
to 0 or not set.
+MUL_ZERO_WINS
+"""""""""""""
+
+The MUL TGSI operation (FP32 multiplication) will return 0 if either
+of the operands are equal to 0. That means that 0 * Inf = 0. This
+should be set the same way for an entire pipeline. Note that this
+applies not only to the literal MUL TGSI opcode, but all FP32
+multiplications implied by other operations, such as MAD, FMA, DP2,
+DP3, DP4, DPH, DST, LOG, LRP, XPD, and possibly others. If there is a
+mismatch between shaders, then it is unspecified whether this behavior
+will be enabled.
+
+
Texture Sampling and Texture Formats
------------------------------------