#include "etnaviv_screen.h"
#include "etnaviv_translate.h"
+#include "util/hash_table.h"
#include "util/u_inlines.h"
#include "util/u_memory.h"
+#include "drm-uapi/drm_fourcc.h"
+
+static enum etna_surface_layout modifier_to_layout(uint64_t modifier)
+{
+ switch (modifier) {
+ case DRM_FORMAT_MOD_VIVANTE_TILED:
+ return ETNA_LAYOUT_TILED;
+ case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
+ return ETNA_LAYOUT_SUPER_TILED;
+ case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:
+ return ETNA_LAYOUT_MULTI_TILED;
+ case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:
+ return ETNA_LAYOUT_MULTI_SUPERTILED;
+ case DRM_FORMAT_MOD_LINEAR:
+ default:
+ return ETNA_LAYOUT_LINEAR;
+ }
+}
+
+static uint64_t layout_to_modifier(enum etna_surface_layout layout)
+{
+ switch (layout) {
+ case ETNA_LAYOUT_TILED:
+ return DRM_FORMAT_MOD_VIVANTE_TILED;
+ case ETNA_LAYOUT_SUPER_TILED:
+ return DRM_FORMAT_MOD_VIVANTE_SUPER_TILED;
+ case ETNA_LAYOUT_MULTI_TILED:
+ return DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED;
+ case ETNA_LAYOUT_MULTI_SUPERTILED:
+ return DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED;
+ case ETNA_LAYOUT_LINEAR:
+ return DRM_FORMAT_MOD_LINEAR;
+ default:
+ return DRM_FORMAT_MOD_INVALID;
+ }
+}
+
/* A tile is 4x4 pixels, having 'screen->specs.bits_per_tile' of tile status.
* So, in a buffer of N pixels, there are N / (4 * 4) tiles.
* We need N * screen->specs.bits_per_tile / (4 * 4) bits of tile status, or
struct etna_resource *rsc)
{
struct etna_screen *screen = etna_screen(pscreen);
- size_t rt_ts_size, ts_layer_stride, pixels;
+ size_t rt_ts_size, ts_layer_stride;
+ size_t ts_bits_per_tile, bytes_per_tile;
+ uint8_t ts_mode = TS_MODE_128B; /* only used by halti5 */
+ int8_t ts_compress_fmt;
assert(!rsc->ts_bo);
- /* TS only for level 0 -- XXX is this formula correct? */
- pixels = rsc->levels[0].layer_stride / util_format_get_blocksize(rsc->base.format);
- ts_layer_stride = align(pixels * screen->specs.bits_per_tile / 0x80,
+ /* pre-v4 compression is largely useless, so disable it when not wanted for MSAA
+ * v4 compression can be enabled everywhere without any known drawback,
+ * except that in-place resolve must go through a slower path
+ */
+ ts_compress_fmt = (screen->specs.v4_compression || rsc->base.nr_samples > 1) ?
+ translate_ts_format(rsc->base.format) : -1;
+
+ if (screen->specs.halti >= 5) {
+ /* enable 256B ts mode with compression, as it improves performance
+ * the size of the resource might also determine if we want to use it or not
+ */
+ if (ts_compress_fmt >= 0)
+ ts_mode = TS_MODE_256B;
+
+ ts_bits_per_tile = 4;
+ bytes_per_tile = ts_mode == TS_MODE_256B ? 256 : 128;
+ } else {
+ ts_bits_per_tile = screen->specs.bits_per_tile;
+ bytes_per_tile = 64;
+ }
+
+ ts_layer_stride = align(DIV_ROUND_UP(rsc->levels[0].layer_stride,
+ bytes_per_tile * 8 / ts_bits_per_tile),
0x100 * screen->specs.pixel_pipes);
rt_ts_size = ts_layer_stride * rsc->base.array_size;
if (rt_ts_size == 0)
rsc->levels[0].ts_offset = 0;
rsc->levels[0].ts_layer_stride = ts_layer_stride;
rsc->levels[0].ts_size = rt_ts_size;
-
- /* It is important to initialize the TS, as random pattern
- * can result in crashes. Do this on the CPU as this only happens once
- * per surface anyway and it's a small area, so it may not be worth
- * queuing this to the GPU. */
- void *ts_map = etna_bo_map(rt_ts);
- memset(ts_map, screen->specs.ts_clear_value, rt_ts_size);
+ rsc->levels[0].ts_mode = ts_mode;
+ rsc->levels[0].ts_compress_fmt = ts_compress_fmt;
return true;
}
-static boolean
+static bool
etna_screen_can_create_resource(struct pipe_screen *pscreen,
const struct pipe_resource *templat)
{
struct etna_screen *screen = etna_screen(pscreen);
- if (!translate_samples_to_xyscale(templat->nr_samples, NULL, NULL, NULL))
+ if (!translate_samples_to_xyscale(templat->nr_samples, NULL, NULL))
return false;
/* templat->bind is not set here, so we must use the minimum sizes */
mip->width = width;
mip->height = height;
+ mip->depth = depth;
mip->padded_width = align(width * msaa_xscale, paddingX);
mip->padded_height = align(height * msaa_yscale, paddingY);
mip->stride = util_format_get_stride(prsc->format, mip->padded_width);
return size;
}
+/* Is rs alignment needed? */
+static bool is_rs_align(struct etna_screen *screen,
+ const struct pipe_resource *tmpl)
+{
+ return screen->specs.use_blt ? false : (
+ VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN) ||
+ !etna_resource_sampler_only(tmpl));
+}
+
/* Create a new resource object, using the given template info */
struct pipe_resource *
etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
- const struct pipe_resource *templat)
+ uint64_t modifier, const struct pipe_resource *templat)
{
struct etna_screen *screen = etna_screen(pscreen);
+ struct etna_resource *rsc;
unsigned size;
DBG_F(ETNA_DBG_RESOURCE_MSGS,
}
int msaa_xscale = 1, msaa_yscale = 1;
- if (!translate_samples_to_xyscale(nr_samples, &msaa_xscale, &msaa_yscale, NULL)) {
+ if (!translate_samples_to_xyscale(nr_samples, &msaa_xscale, &msaa_yscale)) {
/* Number of samples not supported */
return NULL;
}
- /* If we have the TEXTURE_HALIGN feature, we can always align to the
- * resolve engine's width. If not, we must not align resources used
- * only for textures. */
- bool rs_align = VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN) ||
- !etna_resource_sampler_only(templat);
-
/* Determine needed padding (alignment of height/width) */
unsigned paddingX = 0, paddingY = 0;
unsigned halign = TEXTURE_HALIGN_FOUR;
- etna_layout_multiple(layout, screen->specs.pixel_pipes, rs_align, &paddingX,
- &paddingY, &halign);
- assert(paddingX && paddingY);
-
- if (templat->target != PIPE_BUFFER) {
- unsigned min_paddingY = 4 * screen->specs.pixel_pipes;
- if (paddingY < min_paddingY)
- paddingY = min_paddingY;
+ if (!util_format_is_compressed(templat->format)) {
+ /* If we have the TEXTURE_HALIGN feature, we can always align to the
+ * resolve engine's width. If not, we must not align resources used
+ * only for textures. If this GPU uses the BLT engine, never do RS align.
+ */
+ etna_layout_multiple(layout, screen->specs.pixel_pipes,
+ is_rs_align (screen, templat),
+ &paddingX, &paddingY, &halign);
+ assert(paddingX && paddingY);
+ } else {
+ /* Compressed textures are padded to their block size, but we don't have
+ * to do anything special for that. */
+ paddingX = 1;
+ paddingY = 1;
}
- struct etna_resource *rsc = CALLOC_STRUCT(etna_resource);
+ if (!screen->specs.use_blt && templat->target != PIPE_BUFFER && layout == ETNA_LAYOUT_LINEAR)
+ paddingY = align(paddingY, ETNA_RS_HEIGHT_MASK + 1);
+
+ if (templat->bind & PIPE_BIND_SCANOUT && screen->ro->kms_fd >= 0) {
+ struct pipe_resource scanout_templat = *templat;
+ struct renderonly_scanout *scanout;
+ struct winsys_handle handle;
+
+ /* pad scanout buffer size to be compatible with the RS */
+ if (!screen->specs.use_blt && modifier == DRM_FORMAT_MOD_LINEAR) {
+ paddingX = align(paddingX, ETNA_RS_WIDTH_MASK + 1);
+ paddingY = align(paddingY, ETNA_RS_HEIGHT_MASK + 1);
+ }
+
+ scanout_templat.width0 = align(scanout_templat.width0, paddingX);
+ scanout_templat.height0 = align(scanout_templat.height0, paddingY);
+
+ scanout = renderonly_scanout_for_resource(&scanout_templat,
+ screen->ro, &handle);
+ if (!scanout)
+ return NULL;
+ assert(handle.type == WINSYS_HANDLE_TYPE_FD);
+ handle.modifier = modifier;
+ rsc = etna_resource(pscreen->resource_from_handle(pscreen, templat,
+ &handle,
+ PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE));
+ close(handle.handle);
+ if (!rsc)
+ return NULL;
+
+ rsc->scanout = scanout;
+
+ return &rsc->base;
+ }
+
+ rsc = CALLOC_STRUCT(etna_resource);
if (!rsc)
return NULL;
rsc->halign = halign;
pipe_reference_init(&rsc->base.reference, 1);
- list_inithead(&rsc->list);
+ util_range_init(&rsc->valid_buffer_range);
size = setup_miptree(rsc, paddingX, paddingY, msaa_xscale, msaa_yscale);
struct etna_bo *bo = etna_bo_new(screen->dev, size, flags);
if (unlikely(bo == NULL)) {
BUG("Problem allocating video memory for resource");
- return NULL;
+ goto free_rsc;
}
rsc->bo = bo;
rsc->ts_bo = 0; /* TS is only created when first bound to surface */
- if (templat->bind & PIPE_BIND_SCANOUT)
- rsc->scanout = renderonly_scanout_for_resource(&rsc->base, screen->ro);
-
if (DBG_ENABLED(ETNA_DBG_ZERO)) {
void *map = etna_bo_map(bo);
memset(map, 0, size);
}
+ mtx_init(&rsc->lock, mtx_recursive);
+ rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer,
+ _mesa_key_pointer_equal);
+ if (!rsc->pending_ctx)
+ goto free_rsc;
+
return &rsc->base;
+
+free_rsc:
+ FREE(rsc);
+ return NULL;
}
static struct pipe_resource *
const struct pipe_resource *templat)
{
struct etna_screen *screen = etna_screen(pscreen);
-
- /* Figure out what tiling to use -- for now, assume that texture cannot be linear.
- * there is a capability LINEAR_TEXTURE_SUPPORT (supported on gc880 and
- * gc2000 at least), but not sure how it works.
- * Buffers always have LINEAR layout.
+ unsigned layout = ETNA_LAYOUT_TILED;
+
+ /* At this point we don't know if the resource will be used as a texture,
+ * render target, or both, because gallium sets the bits whenever possible
+ * This matters because on some GPUs (GC2000) there is no tiling that is
+ * compatible with both TE and PE.
+ *
+ * We expect that depth/stencil buffers will always be used by PE (rendering),
+ * and any other non-scanout resource will be used as a texture at some point,
+ * So allocate a render-compatible base buffer for scanout/depthstencil buffers,
+ * and a texture-compatible base buffer in other cases
+ *
*/
- unsigned layout = ETNA_LAYOUT_LINEAR;
- if (etna_resource_sampler_only(templat)) {
- /* The buffer is only used for texturing, so create something
- * directly compatible with the sampler. Such a buffer can
- * never be rendered to. */
- layout = ETNA_LAYOUT_TILED;
-
- if (util_format_is_compressed(templat->format))
- layout = ETNA_LAYOUT_LINEAR;
- } else if (templat->target != PIPE_BUFFER) {
- bool want_multitiled = false;
- bool want_supertiled = screen->specs.can_supertile;
-
- /* When this GPU supports single-buffer rendering, don't ever enable
- * multi-tiling. This replicates the blob behavior on GC3000.
- */
- if (!screen->specs.single_buffer)
- want_multitiled = screen->specs.pixel_pipes > 1;
-
- /* Keep single byte blocksized resources as tiled, since we
- * are unable to use the RS blit to de-tile them. However,
- * if they're used as a render target or depth/stencil, they
- * must be multi-tiled for GPUs with multiple pixel pipes.
- * Ignore depth/stencil here, but it is an error for a render
- * target.
- */
- if (util_format_get_blocksize(templat->format) == 1 &&
- !(templat->bind & PIPE_BIND_DEPTH_STENCIL)) {
- assert(!(templat->bind & PIPE_BIND_RENDER_TARGET && want_multitiled));
- want_multitiled = want_supertiled = false;
- }
-
- layout = ETNA_LAYOUT_BIT_TILE;
- if (want_multitiled)
+ if (templat->bind & (PIPE_BIND_SCANOUT | PIPE_BIND_DEPTH_STENCIL)) {
+ if (screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer)
layout |= ETNA_LAYOUT_BIT_MULTI;
- if (want_supertiled)
+ if (screen->specs.can_supertile)
layout |= ETNA_LAYOUT_BIT_SUPER;
+ } else if (VIV_FEATURE(screen, chipMinorFeatures2, SUPERTILED_TEXTURE) &&
+ etna_resource_hw_tileable(screen->specs.use_blt, templat)) {
+ layout |= ETNA_LAYOUT_BIT_SUPER;
}
- if (templat->target == PIPE_TEXTURE_3D)
+ if ((templat->bind & PIPE_BIND_LINEAR) || /* linear base requested */
+ templat->target == PIPE_BUFFER || /* buffer always linear */
+ /* compressed textures don't use tiling, they have their own "tiles" */
+ util_format_is_compressed(templat->format)) {
layout = ETNA_LAYOUT_LINEAR;
+ }
- return etna_resource_alloc(pscreen, layout, templat);
+ /* modifier is only used for scanout surfaces, so safe to use LINEAR here */
+ return etna_resource_alloc(pscreen, layout, DRM_FORMAT_MOD_LINEAR, templat);
}
-static void
-etna_resource_changed(struct pipe_screen *pscreen, struct pipe_resource *prsc)
+enum modifier_priority {
+ MODIFIER_PRIORITY_INVALID = 0,
+ MODIFIER_PRIORITY_LINEAR,
+ MODIFIER_PRIORITY_SPLIT_TILED,
+ MODIFIER_PRIORITY_SPLIT_SUPER_TILED,
+ MODIFIER_PRIORITY_TILED,
+ MODIFIER_PRIORITY_SUPER_TILED,
+};
+
+static const uint64_t priority_to_modifier[] = {
+ [MODIFIER_PRIORITY_INVALID] = DRM_FORMAT_MOD_INVALID,
+ [MODIFIER_PRIORITY_LINEAR] = DRM_FORMAT_MOD_LINEAR,
+ [MODIFIER_PRIORITY_SPLIT_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED,
+ [MODIFIER_PRIORITY_SPLIT_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED,
+ [MODIFIER_PRIORITY_TILED] = DRM_FORMAT_MOD_VIVANTE_TILED,
+ [MODIFIER_PRIORITY_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
+};
+
+static uint64_t
+select_best_modifier(const struct etna_screen * screen,
+ const uint64_t *modifiers, const unsigned count)
{
- struct etna_resource *res = etna_resource(prsc);
+ enum modifier_priority prio = MODIFIER_PRIORITY_INVALID;
+
+ for (int i = 0; i < count; i++) {
+ switch (modifiers[i]) {
+ case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
+ if ((screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer) ||
+ !screen->specs.can_supertile)
+ break;
+ prio = MAX2(prio, MODIFIER_PRIORITY_SUPER_TILED);
+ break;
+ case DRM_FORMAT_MOD_VIVANTE_TILED:
+ if (screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer)
+ break;
+ prio = MAX2(prio, MODIFIER_PRIORITY_TILED);
+ break;
+ case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:
+ if ((screen->specs.pixel_pipes < 2) || !screen->specs.can_supertile)
+ break;
+ prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_SUPER_TILED);
+ break;
+ case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:
+ if (screen->specs.pixel_pipes < 2)
+ break;
+ prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_TILED);
+ break;
+ case DRM_FORMAT_MOD_LINEAR:
+ prio = MAX2(prio, MODIFIER_PRIORITY_LINEAR);
+ break;
+ case DRM_FORMAT_MOD_INVALID:
+ default:
+ break;
+ }
+ }
+
+ return priority_to_modifier[prio];
+}
- /* Make sure texture is older than the imported renderable buffer,
- * so etna_update_sampler_source will copy the pixel data again.
+static struct pipe_resource *
+etna_resource_create_modifiers(struct pipe_screen *pscreen,
+ const struct pipe_resource *templat,
+ const uint64_t *modifiers, int count)
+{
+ struct etna_screen *screen = etna_screen(pscreen);
+ struct pipe_resource tmpl = *templat;
+ uint64_t modifier = select_best_modifier(screen, modifiers, count);
+
+ if (modifier == DRM_FORMAT_MOD_INVALID)
+ return NULL;
+
+ /*
+ * We currently assume that all buffers allocated through this interface
+ * should be scanout enabled.
*/
- if (res->texture)
- etna_resource(res->texture)->seqno = res->seqno - 1;
+ tmpl.bind |= PIPE_BIND_SCANOUT;
+
+ return etna_resource_alloc(pscreen, modifier_to_layout(modifier), modifier, &tmpl);
+}
+
+static void
+etna_resource_changed(struct pipe_screen *pscreen, struct pipe_resource *prsc)
+{
+ etna_resource(prsc)->seqno++;
}
static void
{
struct etna_resource *rsc = etna_resource(prsc);
+ mtx_lock(&rsc->lock);
+ assert(!_mesa_set_next_entry(rsc->pending_ctx, NULL));
+ _mesa_set_destroy(rsc->pending_ctx, NULL);
+ mtx_unlock(&rsc->lock);
+
if (rsc->bo)
etna_bo_del(rsc->bo);
if (rsc->scanout)
renderonly_scanout_destroy(rsc->scanout, etna_screen(pscreen)->ro);
- list_delinit(&rsc->list);
+ util_range_destroy(&rsc->valid_buffer_range);
pipe_resource_reference(&rsc->texture, NULL);
+ pipe_resource_reference(&rsc->render, NULL);
+
+ for (unsigned i = 0; i < ETNA_NUM_LOD; i++)
+ FREE(rsc->levels[i].patch_offsets);
+
+ mtx_destroy(&rsc->lock);
FREE(rsc);
}
struct winsys_handle *handle, unsigned usage)
{
struct etna_screen *screen = etna_screen(pscreen);
- struct etna_resource *rsc = CALLOC_STRUCT(etna_resource);
- struct etna_resource_level *level = &rsc->levels[0];
- struct pipe_resource *prsc = &rsc->base;
- struct pipe_resource *ptiled = NULL;
+ struct etna_resource *rsc;
+ struct etna_resource_level *level;
+ struct pipe_resource *prsc;
DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
"nr_samples=%u, usage=%u, bind=%x, flags=%x",
tmpl->height0, tmpl->depth0, tmpl->array_size, tmpl->last_level,
tmpl->nr_samples, tmpl->usage, tmpl->bind, tmpl->flags);
+ rsc = CALLOC_STRUCT(etna_resource);
if (!rsc)
return NULL;
+ level = &rsc->levels[0];
+ prsc = &rsc->base;
+
*prsc = *tmpl;
pipe_reference_init(&prsc->reference, 1);
- list_inithead(&rsc->list);
+ util_range_init(&rsc->valid_buffer_range);
prsc->screen = pscreen;
rsc->bo = etna_screen_bo_from_handle(pscreen, handle, &level->stride);
goto fail;
rsc->seqno = 1;
+ rsc->layout = modifier_to_layout(handle->modifier);
+ rsc->halign = TEXTURE_HALIGN_FOUR;
level->width = tmpl->width0;
level->height = tmpl->height0;
+ level->depth = tmpl->depth0;
+ level->offset = handle->offset;
- /* We will be using the RS to copy with this resource, so we must
- * ensure that it is appropriately aligned for the RS requirements. */
- unsigned paddingX = ETNA_RS_WIDTH_MASK + 1;
- unsigned paddingY = (ETNA_RS_HEIGHT_MASK + 1) * screen->specs.pixel_pipes;
+ /* Determine padding of the imported resource. */
+ unsigned paddingX = 0, paddingY = 0;
+ etna_layout_multiple(rsc->layout, screen->specs.pixel_pipes,
+ is_rs_align(screen, tmpl),
+ &paddingX, &paddingY, &rsc->halign);
+ if (!screen->specs.use_blt && rsc->layout == ETNA_LAYOUT_LINEAR)
+ paddingY = align(paddingY, ETNA_RS_HEIGHT_MASK + 1);
level->padded_width = align(level->width, paddingX);
level->padded_height = align(level->height, paddingY);
+ level->layer_stride = level->stride * util_format_get_nblocksy(prsc->format,
+ level->padded_height);
+ level->size = level->layer_stride;
+
/* The DDX must give us a BO which conforms to our padding size.
* The stride of the BO must be greater or equal to our padded
* stride. The size of the BO must accomodate the padded height. */
if (level->stride < util_format_get_stride(tmpl->format, level->padded_width)) {
- BUG("BO stride is too small for RS engine width padding");
+ BUG("BO stride %u is too small for RS engine width padding (%zu, format %s)",
+ level->stride, util_format_get_stride(tmpl->format, level->padded_width),
+ util_format_name(tmpl->format));
goto fail;
}
if (etna_bo_size(rsc->bo) < level->stride * level->padded_height) {
- BUG("BO size is too small for RS engine height padding");
+ BUG("BO size %u is too small for RS engine height padding (%u, format %s)",
+ etna_bo_size(rsc->bo), level->stride * level->padded_height,
+ util_format_name(tmpl->format));
goto fail;
}
- if (handle->type == DRM_API_HANDLE_TYPE_SHARED && tmpl->bind & PIPE_BIND_RENDER_TARGET) {
- /* Render targets are linear in Xorg but must be tiled
- * here. It would be nice if dri_drawable_get_format()
- * set scanout for these buffers too. */
- struct etna_resource *tiled;
-
- ptiled = etna_resource_create(pscreen, tmpl);
- if (!ptiled)
- goto fail;
-
- tiled = etna_resource(ptiled);
- tiled->scanout = renderonly_scanout_for_prime(prsc, screen->ro);
- if (!tiled->scanout)
- goto fail;
-
- return ptiled;
- }
+ mtx_init(&rsc->lock, mtx_recursive);
+ rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer,
+ _mesa_key_pointer_equal);
+ if (!rsc->pending_ctx)
+ goto fail;
return prsc;
fail:
etna_resource_destroy(pscreen, prsc);
- if (ptiled)
- etna_resource_destroy(pscreen, ptiled);
return NULL;
}
-static boolean
+static bool
etna_resource_get_handle(struct pipe_screen *pscreen,
struct pipe_context *pctx,
struct pipe_resource *prsc,
struct winsys_handle *handle, unsigned usage)
{
struct etna_resource *rsc = etna_resource(prsc);
-
- if (renderonly_get_handle(rsc->scanout, handle))
- return TRUE;
-
- return etna_screen_bo_get_handle(pscreen, rsc->bo, rsc->levels[0].stride,
- handle);
+ /* Scanout is always attached to the base resource */
+ struct renderonly_scanout *scanout = rsc->scanout;
+
+ handle->stride = rsc->levels[0].stride;
+ handle->offset = rsc->levels[0].offset;
+ handle->modifier = layout_to_modifier(rsc->layout);
+
+ if (handle->type == WINSYS_HANDLE_TYPE_SHARED) {
+ return etna_bo_get_name(rsc->bo, &handle->handle) == 0;
+ } else if (handle->type == WINSYS_HANDLE_TYPE_KMS) {
+ if (renderonly_get_handle(scanout, handle)) {
+ return true;
+ } else {
+ handle->handle = etna_bo_handle(rsc->bo);
+ return true;
+ }
+ } else if (handle->type == WINSYS_HANDLE_TYPE_FD) {
+ handle->handle = etna_bo_dmabuf(rsc->bo);
+ return true;
+ } else {
+ return false;
+ }
}
void
etna_resource_used(struct etna_context *ctx, struct pipe_resource *prsc,
enum etna_resource_status status)
{
+ struct pipe_resource *referenced = NULL;
struct etna_resource *rsc;
if (!prsc)
return;
+ mtx_lock(&ctx->lock);
+
rsc = etna_resource(prsc);
- rsc->status |= status;
-
- /* TODO resources can actually be shared across contexts,
- * so I'm not sure a single list-head will do the trick? */
- debug_assert((rsc->pending_ctx == ctx) || !rsc->pending_ctx);
- list_delinit(&rsc->list);
- list_addtail(&rsc->list, &ctx->used_resources);
- rsc->pending_ctx = ctx;
-}
+again:
+ mtx_lock(&rsc->lock);
+
+ set_foreach(rsc->pending_ctx, entry) {
+ struct etna_context *extctx = (struct etna_context *)entry->key;
+ struct pipe_context *pctx = &extctx->base;
+ bool need_flush = false;
+
+ if (mtx_trylock(&extctx->lock) != thrd_success) {
+ /*
+ * The other context could be locked in etna_flush() and
+ * stuck waiting for the resource lock, so release the
+ * resource lock here, let etna_flush() finish, and try
+ * again.
+ */
+ mtx_unlock(&rsc->lock);
+ thrd_yield();
+ goto again;
+ }
-void
-etna_resource_wait(struct pipe_context *pctx, struct etna_resource *rsc)
-{
- if (rsc->status & ETNA_PENDING_WRITE) {
- struct pipe_fence_handle *fence;
- struct pipe_screen *pscreen = pctx->screen;
+ set_foreach(extctx->used_resources_read, entry2) {
+ struct etna_resource *rsc2 = (struct etna_resource *)entry2->key;
+ if (ctx == extctx || rsc2 != rsc)
+ continue;
+
+ if (status & ETNA_PENDING_WRITE) {
+ need_flush = true;
+ break;
+ }
+ }
- pctx->flush(pctx, &fence, 0);
+ if (need_flush) {
+ pctx->flush(pctx, NULL, 0);
+ mtx_unlock(&extctx->lock);
+ continue;
+ }
+
+ set_foreach(extctx->used_resources_write, entry2) {
+ struct etna_resource *rsc2 = (struct etna_resource *)entry2->key;
+ if (ctx == extctx || rsc2 != rsc)
+ continue;
- if (!pscreen->fence_finish(pscreen, pctx, fence, 5000000000ULL))
- BUG("fence timed out (hung GPU?)");
+ need_flush = true;
+ break;
+ }
- pscreen->fence_reference(pscreen, &fence, NULL);
+ if (need_flush)
+ pctx->flush(pctx, NULL, 0);
+
+ mtx_unlock(&extctx->lock);
+ }
+
+ rsc->status = status;
+
+ if (!_mesa_set_search(rsc->pending_ctx, ctx)) {
+ pipe_resource_reference(&referenced, prsc);
+ _mesa_set_add((status & ETNA_PENDING_READ) ?
+ ctx->used_resources_read : ctx->used_resources_write, rsc);
+ _mesa_set_add(rsc->pending_ctx, ctx);
}
+
+ mtx_unlock(&rsc->lock);
+ mtx_unlock(&ctx->lock);
+}
+
+bool
+etna_resource_has_valid_ts(struct etna_resource *rsc)
+{
+ if (!rsc->ts_bo)
+ return false;
+
+ for (int level = 0; level <= rsc->base.last_level; level++)
+ if (rsc->levels[level].ts_valid)
+ return true;
+
+ return false;
}
void
{
pscreen->can_create_resource = etna_screen_can_create_resource;
pscreen->resource_create = etna_resource_create;
+ pscreen->resource_create_with_modifiers = etna_resource_create_modifiers;
pscreen->resource_from_handle = etna_resource_from_handle;
pscreen->resource_get_handle = etna_resource_get_handle;
pscreen->resource_changed = etna_resource_changed;
projects / mesa.git / blobdiff