etnaviv: update headers from rnndb

[mesa.git] / src / gallium / drivers / etnaviv / hw / state_3d.xml.h

diff --git a/src/gallium/drivers/etnaviv/hw/state_3d.xml.h b/src/gallium/drivers/etnaviv/hw/state_3d.xml.h
index 168d59b4a5601555e397e394d594bdeebc07e976..0116aa4ad743b15e045f811b1b24307016552e5d 100644 (file)
--- a/src/gallium/drivers/etnaviv/hw/state_3d.xml.h
+++ b/src/gallium/drivers/etnaviv/hw/state_3d.xml.h
@@ -8,15 +8,15 @@ http://0x04.net/cgit/index.cgi/rules-ng-ng
 git clone git://0x04.net/rules-ng-ng
 
 The rules-ng-ng source files this header was generated from are:
-- state.xml     (  26087 bytes, from 2018-02-10 13:09:26)
-- common.xml    (  35468 bytes, from 2018-02-10 13:09:26)
-- common_3d.xml (  14781 bytes, from 2019-06-02 11:12:51)
-- state_hi.xml  (  30232 bytes, from 2018-03-30 07:48:22)
-- copyright.xml (   1597 bytes, from 2018-02-10 13:09:26)
-- state_2d.xml  (  51552 bytes, from 2018-02-10 13:09:26)
-- state_3d.xml  (  80352 bytes, from 2019-04-23 18:58:17)
-- state_blt.xml (  13405 bytes, from 2018-02-10 13:09:26)
-- state_vg.xml  (   5975 bytes, from 2018-02-10 13:09:26)
+- state.xml     (  26087 bytes, from 2019-06-10 23:29:22)
+- common.xml    (  35468 bytes, from 2019-06-10 23:29:22)
+- common_3d.xml (  14984 bytes, from 2019-07-01 19:47:22)
+- state_hi.xml  (  30232 bytes, from 2019-06-10 23:29:22)
+- copyright.xml (   1597 bytes, from 2019-06-10 23:29:22)
+- state_2d.xml  (  51552 bytes, from 2019-06-10 23:29:22)
+- state_3d.xml  (  79878 bytes, from 2019-07-01 19:47:36)
+- state_blt.xml (  13381 bytes, from 2019-07-01 19:46:55)
+- state_vg.xml  (   5975 bytes, from 2019-06-10 23:29:22)
 
 Copyright (C) 2012-2019 by the following authors:
 - Wladimir J. van der Laan <laanwj@gmail.com>
@@ -122,14 +122,6 @@ DEALINGS IN THE SOFTWARE.
 #define LOGIC_OP_OR_REVERSE                                    0x0000000d
 #define LOGIC_OP_OR                                            0x0000000e
 #define LOGIC_OP_SET                                           0x0000000f
-#define TS_SAMPLER_FORMAT_A4R4G4B4                             0x00000000
-#define TS_SAMPLER_FORMAT_A1R5G5B5                             0x00000001
-#define TS_SAMPLER_FORMAT_R5G6B5                               0x00000002
-#define TS_SAMPLER_FORMAT_A8R8G8B8                             0x00000003
-#define TS_SAMPLER_FORMAT_X8R8G8B8                             0x00000004
-#define TS_SAMPLER_FORMAT_D24X8                                        0x00000005
-#define TS_SAMPLER_FORMAT_D16                                  0x00000008
-#define TS_SAMPLER_FORMAT_RAW                                  0x0000000f
 #define VARYING_NUM_COMPONENTS_VAR0__MASK                      0x00000007
 #define VARYING_NUM_COMPONENTS_VAR0__SHIFT                     0
 #define VARYING_NUM_COMPONENTS_VAR0(x)                         (((x) << VARYING_NUM_COMPONENTS_VAR0__SHIFT) & VARYING_NUM_COMPONENTS_VAR0__MASK)
@@ -1048,12 +1040,12 @@ DEALINGS IN THE SOFTWARE.
 #define VIVS_PE_STENCIL_CONFIG_EXT2_WRITE_MASK_BACK(x)         (((x) << VIVS_PE_STENCIL_CONFIG_EXT2_WRITE_MASK_BACK__SHIFT) & VIVS_PE_STENCIL_CONFIG_EXT2_WRITE_MASK_BACK__MASK)
 
 #define VIVS_PE_MEM_CONFIG                                     0x000014bc
-#define VIVS_PE_MEM_CONFIG_COLOR_CACHE_MODE__MASK              0x01000000
-#define VIVS_PE_MEM_CONFIG_COLOR_CACHE_MODE__SHIFT             24
-#define VIVS_PE_MEM_CONFIG_COLOR_CACHE_MODE(x)                 (((x) << VIVS_PE_MEM_CONFIG_COLOR_CACHE_MODE__SHIFT) & VIVS_PE_MEM_CONFIG_COLOR_CACHE_MODE__MASK)
-#define VIVS_PE_MEM_CONFIG_DEPTH_CACHE_MODE__MASK              0x04000000
-#define VIVS_PE_MEM_CONFIG_DEPTH_CACHE_MODE__SHIFT             26
-#define VIVS_PE_MEM_CONFIG_DEPTH_CACHE_MODE(x)                 (((x) << VIVS_PE_MEM_CONFIG_DEPTH_CACHE_MODE__SHIFT) & VIVS_PE_MEM_CONFIG_DEPTH_CACHE_MODE__MASK)
+#define VIVS_PE_MEM_CONFIG_COLOR_TS_MODE__MASK                 0x01000000
+#define VIVS_PE_MEM_CONFIG_COLOR_TS_MODE__SHIFT                        24
+#define VIVS_PE_MEM_CONFIG_COLOR_TS_MODE(x)                    (((x) << VIVS_PE_MEM_CONFIG_COLOR_TS_MODE__SHIFT) & VIVS_PE_MEM_CONFIG_COLOR_TS_MODE__MASK)
+#define VIVS_PE_MEM_CONFIG_DEPTH_TS_MODE__MASK                 0x04000000
+#define VIVS_PE_MEM_CONFIG_DEPTH_TS_MODE__SHIFT                        26
+#define VIVS_PE_MEM_CONFIG_DEPTH_TS_MODE(x)                    (((x) << VIVS_PE_MEM_CONFIG_DEPTH_TS_MODE__SHIFT) & VIVS_PE_MEM_CONFIG_DEPTH_TS_MODE__MASK)
 
 #define VIVS_PE_HALTI4_UNK014C0                                        0x000014c0
 
@@ -1283,7 +1275,7 @@ DEALINGS IN THE SOFTWARE.
 #define VIVS_TS_MEM_CONFIG_COLOR_COMPRESSION_FORMAT(x)         (((x) << VIVS_TS_MEM_CONFIG_COLOR_COMPRESSION_FORMAT__SHIFT) & VIVS_TS_MEM_CONFIG_COLOR_COMPRESSION_FORMAT__MASK)
 #define VIVS_TS_MEM_CONFIG_UNK12                               0x00001000
 #define VIVS_TS_MEM_CONFIG_HDEPTH_AUTO_DISABLE                 0x00002000
-#define VIVS_TS_MEM_CONFIG_UNK14                               0x00004000
+#define VIVS_TS_MEM_CONFIG_STENCIL_ENABLE                      0x00004000
 #define VIVS_TS_MEM_CONFIG_UNK21                               0x00200000
 
 #define VIVS_TS_COLOR_STATUS_BASE                              0x00001658
@@ -1315,12 +1307,11 @@ DEALINGS IN THE SOFTWARE.
 #define VIVS_TS_SAMPLER__LEN                                   0x00000008
 
 #define VIVS_TS_SAMPLER_CONFIG(i0)                            (0x00001720 + 0x4*(i0))
-#define VIVS_TS_SAMPLER_CONFIG_ENABLE__MASK                    0x00000003
-#define VIVS_TS_SAMPLER_CONFIG_ENABLE__SHIFT                   0
-#define VIVS_TS_SAMPLER_CONFIG_ENABLE(x)                       (((x) << VIVS_TS_SAMPLER_CONFIG_ENABLE__SHIFT) & VIVS_TS_SAMPLER_CONFIG_ENABLE__MASK)
-#define VIVS_TS_SAMPLER_CONFIG_FORMAT__MASK                    0x000000f0
-#define VIVS_TS_SAMPLER_CONFIG_FORMAT__SHIFT                   4
-#define VIVS_TS_SAMPLER_CONFIG_FORMAT(x)                       (((x) << VIVS_TS_SAMPLER_CONFIG_FORMAT__SHIFT) & VIVS_TS_SAMPLER_CONFIG_FORMAT__MASK)
+#define VIVS_TS_SAMPLER_CONFIG_ENABLE                          0x00000001
+#define VIVS_TS_SAMPLER_CONFIG_COMPRESSION                     0x00000002
+#define VIVS_TS_SAMPLER_CONFIG_COMPRESSION_FORMAT__MASK                0x000000f0
+#define VIVS_TS_SAMPLER_CONFIG_COMPRESSION_FORMAT__SHIFT       4
+#define VIVS_TS_SAMPLER_CONFIG_COMPRESSION_FORMAT(x)           (((x) << VIVS_TS_SAMPLER_CONFIG_COMPRESSION_FORMAT__SHIFT) & VIVS_TS_SAMPLER_CONFIG_COMPRESSION_FORMAT__MASK)
 #define VIVS_TS_SAMPLER_CONFIG_UNK11__MASK                     0x00003800
 #define VIVS_TS_SAMPLER_CONFIG_UNK11__SHIFT                    11
 #define VIVS_TS_SAMPLER_CONFIG_UNK11(x)                                (((x) << VIVS_TS_SAMPLER_CONFIG_UNK11__SHIFT) & VIVS_TS_SAMPLER_CONFIG_UNK11__MASK)
@@ -1483,9 +1474,9 @@ DEALINGS IN THE SOFTWARE.
 #define VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_A__MASK                        0x00700000
 #define VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_A__SHIFT               20
 #define VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_A(x)                   (((x) << VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_A__SHIFT) & VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_A__MASK)
-#define VIVS_TE_SAMPLER_CONFIG1_CACHE_MODE__MASK               0x00800000
-#define VIVS_TE_SAMPLER_CONFIG1_CACHE_MODE__SHIFT              23
-#define VIVS_TE_SAMPLER_CONFIG1_CACHE_MODE(x)                  (((x) << VIVS_TE_SAMPLER_CONFIG1_CACHE_MODE__SHIFT) & VIVS_TE_SAMPLER_CONFIG1_CACHE_MODE__MASK)
+#define VIVS_TE_SAMPLER_CONFIG1_TS_MODE__MASK                  0x00800000
+#define VIVS_TE_SAMPLER_CONFIG1_TS_MODE__SHIFT                 23
+#define VIVS_TE_SAMPLER_CONFIG1_TS_MODE(x)                     (((x) << VIVS_TE_SAMPLER_CONFIG1_TS_MODE__SHIFT) & VIVS_TE_SAMPLER_CONFIG1_TS_MODE__MASK)
 #define VIVS_TE_SAMPLER_CONFIG1_TEXTURE_ARRAY                  0x01000000
 #define VIVS_TE_SAMPLER_CONFIG1_SEAMLESS_CUBE_MAP              0x02000000
 #define VIVS_TE_SAMPLER_CONFIG1_HALIGN__MASK                   0x1c000000
@@ -1606,9 +1597,9 @@ DEALINGS IN THE SOFTWARE.
 #define VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_A__MASK               0x00700000
 #define VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_A__SHIFT              20
 #define VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_A(x)                  (((x) << VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_A__SHIFT) & VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_A__MASK)
-#define VIVS_NTE_SAMPLER_CONFIG1_CACHE_MODE__MASK              0x00800000
-#define VIVS_NTE_SAMPLER_CONFIG1_CACHE_MODE__SHIFT             23
-#define VIVS_NTE_SAMPLER_CONFIG1_CACHE_MODE(x)                 (((x) << VIVS_NTE_SAMPLER_CONFIG1_CACHE_MODE__SHIFT) & VIVS_NTE_SAMPLER_CONFIG1_CACHE_MODE__MASK)
+#define VIVS_NTE_SAMPLER_CONFIG1_TS_MODE__MASK                 0x00800000
+#define VIVS_NTE_SAMPLER_CONFIG1_TS_MODE__SHIFT                        23
+#define VIVS_NTE_SAMPLER_CONFIG1_TS_MODE(x)                    (((x) << VIVS_NTE_SAMPLER_CONFIG1_TS_MODE__SHIFT) & VIVS_NTE_SAMPLER_CONFIG1_TS_MODE__MASK)
 #define VIVS_NTE_SAMPLER_CONFIG1_TEXTURE_ARRAY                 0x01000000
 #define VIVS_NTE_SAMPLER_CONFIG1_SEAMLESS_CUBE_MAP             0x02000000
 #define VIVS_NTE_SAMPLER_CONFIG1_HALIGN__MASK                  0x1c000000
@@ -1710,9 +1701,10 @@ DEALINGS IN THE SOFTWARE.
 #define VIVS_NTE_DESCRIPTOR_ADDR(i0)                          (0x00015c00 + 0x4*(i0))
 
 #define VIVS_NTE_DESCRIPTOR_TX_CTRL(i0)                               (0x00015e00 + 0x4*(i0))
-#define VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_ENABLE__MASK            0x00000003
-#define VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_ENABLE__SHIFT           0
-#define VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_ENABLE(x)               (((x) << VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_ENABLE__SHIFT) & VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_ENABLE__MASK)
+#define VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_MODE__MASK              0x00000001
+#define VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_MODE__SHIFT             0
+#define VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_MODE(x)                 (((x) << VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_MODE__SHIFT) & VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_MODE__MASK)
+#define VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_ENABLE                  0x00000002
 #define VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_INDEX__MASK             0x0000001c
 #define VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_INDEX__SHIFT            2
 #define VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_INDEX(x)                        (((x) << VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_INDEX__SHIFT) & VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_INDEX__MASK)