freedreno/ir3: stop hard-coding FS input regs

[mesa.git] / src / gallium / drivers / freedreno / a3xx / fd3_program.c

diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_program.c b/src/gallium/drivers/freedreno/a3xx/fd3_program.c
index 64eeb106e535ad8f95c97ade27a2dad7e170e7cd..b6f8ff33c4785a4292259048971fd6c8c4351e07 100644 (file)
--- a/src/gallium/drivers/freedreno/a3xx/fd3_program.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_program.c
@@ -140,7 +140,9 @@ fd3_program_emit(struct fd_ringbuffer *ring, struct fd3_emit *emit,
        const struct ir3_info *vsi, *fsi;
        enum a3xx_instrbuffermode fpbuffer, vpbuffer;
        uint32_t fpbuffersz, vpbuffersz, fsoff;
-       uint32_t pos_regid, posz_regid, psize_regid, color_regid[4] = {0};
+       uint32_t pos_regid, posz_regid, psize_regid;
+       uint32_t vcoord_regid, face_regid, coord_regid, zwcoord_regid;
+       uint32_t color_regid[4] = {0};
        int constmode;
        int i, j;
 
@@ -208,6 +210,11 @@ fd3_program_emit(struct fd_ringbuffer *ring, struct fd3_emit *emit,
                color_regid[3] = ir3_find_output_regid(fp, FRAG_RESULT_DATA3);
        }
 
+       face_regid      = ir3_find_sysval_regid(fp, SYSTEM_VALUE_FRONT_FACE);
+       coord_regid     = ir3_find_sysval_regid(fp, SYSTEM_VALUE_FRAG_COORD);
+       zwcoord_regid   = (coord_regid == regid(63,0)) ? regid(63,0) : (coord_regid + 2);
+       vcoord_regid    = ir3_find_sysval_regid(fp, SYSTEM_VALUE_VARYING_COORD);
+
        /* adjust regids for alpha output formats. there is no alpha render
         * format, so it's just treated like red
         */
@@ -230,10 +237,11 @@ fd3_program_emit(struct fd_ringbuffer *ring, struct fd3_emit *emit,
                        A3XX_HLSQ_CONTROL_0_REG_SPCONSTFULLUPDATE);
        OUT_RING(ring, A3XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE(TWO_QUADS) |
                        A3XX_HLSQ_CONTROL_1_REG_VSSUPERTHREADENABLE |
-                       COND(fp->frag_coord, A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDXYREGID(regid(0,0)) |
-                                       A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDZWREGID(regid(0,2))));
-       OUT_RING(ring, A3XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD(31));
-       OUT_RING(ring, A3XX_HLSQ_CONTROL_3_REG_REGID(fp->pos_regid));
+                       A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDXYREGID(coord_regid) |
+                       A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDZWREGID(zwcoord_regid));
+       OUT_RING(ring, A3XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD(31) |
+                       A3XX_HLSQ_CONTROL_2_REG_FACENESSREGID(face_regid));
+       OUT_RING(ring, A3XX_HLSQ_CONTROL_3_REG_REGID(vcoord_regid));
        OUT_RING(ring, A3XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH(vp->constlen) |
                        A3XX_HLSQ_VS_CONTROL_REG_CONSTSTARTOFFSET(0) |
                        A3XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH(vpbuffersz));