util: Move gallium's PIPE_FORMAT utils to /util/format/
[mesa.git] / src / gallium / drivers / freedreno / a3xx / fd3_texture.c
index 9d54d41e1adb4a2a9089b4df2fb152f7afbbdb51..9fc91273b6d89d3c362ac3dace79c251aeb31eaf 100644 (file)
@@ -1,5 +1,3 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
 /*
  * Copyright (C) 2013 Rob Clark <robclark@freedesktop.org>
  *
 #include "util/u_string.h"
 #include "util/u_memory.h"
 #include "util/u_inlines.h"
-#include "util/u_format.h"
+#include "util/format/u_format.h"
 
 #include "fd3_texture.h"
 #include "fd3_format.h"
 
 static enum a3xx_tex_clamp
-tex_clamp(unsigned wrap, bool clamp_to_edge)
+tex_clamp(unsigned wrap, bool clamp_to_edge, bool *needs_border)
 {
        /* Hardware does not support _CLAMP, but we emulate it: */
        if (wrap == PIPE_TEX_WRAP_CLAMP) {
@@ -50,6 +48,7 @@ tex_clamp(unsigned wrap, bool clamp_to_edge)
        case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
                return A3XX_TEX_CLAMP_TO_EDGE;
        case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
+               *needs_border = true;
                return A3XX_TEX_CLAMP_TO_BORDER;
        case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
                /* only works for PoT.. need to emulate otherwise! */
@@ -113,6 +112,7 @@ fd3_sampler_state_create(struct pipe_context *pctx,
                so->saturate_r = (cso->wrap_r == PIPE_TEX_WRAP_CLAMP);
        }
 
+       so->needs_border = false;
        so->texsamp0 =
                        COND(!cso->normalized_coords, A3XX_TEX_SAMP_0_UNNORM_COORDS) |
                        COND(!cso->seamless_cube_map, A3XX_TEX_SAMP_0_CUBEMAPSEAMLESSFILTOFF) |
@@ -120,20 +120,27 @@ fd3_sampler_state_create(struct pipe_context *pctx,
                        A3XX_TEX_SAMP_0_XY_MAG(tex_filter(cso->mag_img_filter, aniso)) |
                        A3XX_TEX_SAMP_0_XY_MIN(tex_filter(cso->min_img_filter, aniso)) |
                        A3XX_TEX_SAMP_0_ANISO(aniso) |
-                       A3XX_TEX_SAMP_0_WRAP_S(tex_clamp(cso->wrap_s, clamp_to_edge)) |
-                       A3XX_TEX_SAMP_0_WRAP_T(tex_clamp(cso->wrap_t, clamp_to_edge)) |
-                       A3XX_TEX_SAMP_0_WRAP_R(tex_clamp(cso->wrap_r, clamp_to_edge));
+                       A3XX_TEX_SAMP_0_WRAP_S(tex_clamp(cso->wrap_s, clamp_to_edge, &so->needs_border)) |
+                       A3XX_TEX_SAMP_0_WRAP_T(tex_clamp(cso->wrap_t, clamp_to_edge, &so->needs_border)) |
+                       A3XX_TEX_SAMP_0_WRAP_R(tex_clamp(cso->wrap_r, clamp_to_edge, &so->needs_border));
 
        if (cso->compare_mode)
                so->texsamp0 |= A3XX_TEX_SAMP_0_COMPARE_FUNC(cso->compare_func); /* maps 1:1 */
 
+       so->texsamp1 = A3XX_TEX_SAMP_1_LOD_BIAS(cso->lod_bias);
+
        if (cso->min_mip_filter != PIPE_TEX_MIPFILTER_NONE) {
-               so->texsamp1 =
-                               A3XX_TEX_SAMP_1_LOD_BIAS(cso->lod_bias) |
-                               A3XX_TEX_SAMP_1_MIN_LOD(cso->min_lod) |
-                               A3XX_TEX_SAMP_1_MAX_LOD(cso->max_lod);
+               so->texsamp1 |=
+                       A3XX_TEX_SAMP_1_MIN_LOD(cso->min_lod) |
+                       A3XX_TEX_SAMP_1_MAX_LOD(cso->max_lod);
        } else {
-               so->texsamp1 = 0x00000000;
+               /* If we're not doing mipmap filtering, we still need a slightly > 0
+                * LOD clamp so the HW can decide between min and mag filtering of
+                * level 0.
+                */
+               so->texsamp1 |=
+                       A3XX_TEX_SAMP_1_MIN_LOD(MIN2(cso->min_lod, 0.125)) |
+                       A3XX_TEX_SAMP_1_MAX_LOD(MIN2(cso->max_lod, 0.125));
        }
 
        return so;
@@ -141,7 +148,7 @@ fd3_sampler_state_create(struct pipe_context *pctx,
 
 static void
 fd3_sampler_states_bind(struct pipe_context *pctx,
-               unsigned shader, unsigned start,
+               enum pipe_shader_type shader, unsigned start,
                unsigned nr, void **hwcso)
 {
        struct fd_context *ctx = fd_context(pctx);
@@ -227,11 +234,14 @@ fd3_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
        so->base.context = pctx;
 
        so->texconst0 =
+                       A3XX_TEX_CONST_0_TILE_MODE(rsc->tile_mode) |
                        A3XX_TEX_CONST_0_TYPE(tex_type(prsc->target)) |
                        A3XX_TEX_CONST_0_FMT(fd3_pipe2tex(cso->format)) |
                        fd3_tex_swiz(cso->format, cso->swizzle_r, cso->swizzle_g,
                                                cso->swizzle_b, cso->swizzle_a);
 
+       if (prsc->target == PIPE_BUFFER || util_format_is_pure_integer(cso->format))
+               so->texconst0 |= A3XX_TEX_CONST_0_NOCONVERT;
        if (util_format_is_srgb(cso->format))
                so->texconst0 |= A3XX_TEX_CONST_0_SRGB;
 
@@ -239,8 +249,7 @@ fd3_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
                lvl = 0;
                so->texconst1 =
                        A3XX_TEX_CONST_1_FETCHSIZE(fd3_pipe2fetchsize(cso->format)) |
-                       A3XX_TEX_CONST_1_WIDTH(cso->u.buf.last_element -
-                                                                  cso->u.buf.first_element + 1) |
+                       A3XX_TEX_CONST_1_WIDTH(cso->u.buf.size / util_format_get_blocksize(cso->format)) |
                        A3XX_TEX_CONST_1_HEIGHT(1);
        } else {
                unsigned miplevels;