ir3, freedreno: Round up constlen earlier

[mesa.git] / src / gallium / drivers / freedreno / a5xx / fd5_program.c

diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_program.c b/src/gallium/drivers/freedreno/a5xx/fd5_program.c
index a491cf10b040966e4d8b1c160597fe40d20acd33..258a643144345433f972acef73393982c8c89ee8 100644 (file)
--- a/src/gallium/drivers/freedreno/a5xx/fd5_program.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_program.c
@@ -232,7 +232,8 @@ setup_stages(struct fd5_emit *emit, struct stage *s)
                if (s[i].v) {
                        s[i].i = &s[i].v->info;
                        /* constlen is in units of 4 * vec4: */
-                       s[i].constlen = align(s[i].v->constlen, 4) / 4;
+                       assert(s[i].v->constlen % 4 == 0);
+                       s[i].constlen = s[i].v->constlen / 4;
                        /* instrlen is already in units of 16 instr.. although
                         * probably we should ditch that and not make the compiler
                         * care about instruction group size of a3xx vs a5xx