freedreno/a6xx: Document the bit for the magic 32bit-uniforms-as-16b mode.
[mesa.git] / src / gallium / drivers / freedreno / a6xx / fd6_program.c
index fb547560c44348898b6a851b456e92b0bc81087a..7d57b2d1b5d120aa7011ba3cc407561901789812 100644 (file)
@@ -434,8 +434,8 @@ setup_stateobj(struct fd_ringbuffer *ring, struct fd_screen *screen,
        OUT_PKT4(ring, REG_A6XX_SP_UNKNOWN_A9A8, 1);
        OUT_RING(ring, 0);
 
-       OUT_PKT4(ring, REG_A6XX_SP_UNKNOWN_AB00, 1);
-       OUT_RING(ring, 0x5);
+       OUT_PKT4(ring, REG_A6XX_SP_MODE_CONTROL, 1);
+       OUT_RING(ring, A6XX_SP_MODE_CONTROL_CONSTANT_DEMOTION_ENABLE | 4);
 
        OUT_PKT4(ring, REG_A6XX_SP_FS_OUTPUT_CNTL0, 1);
        OUT_RING(ring, A6XX_SP_FS_OUTPUT_CNTL0_DEPTH_REGID(posz_regid) |
@@ -565,7 +565,7 @@ setup_stateobj(struct fd_ringbuffer *ring, struct fd_screen *screen,
                OUT_RING(ring, hs_info->tess.tcs_vertices_out);
 
                /* Total attribute slots in HS incoming patch. */
-               OUT_PKT4(ring, REG_A6XX_PC_UNKNOWN_9801, 1);
+               OUT_PKT4(ring, REG_A6XX_PC_HS_INPUT_SIZE, 1);
                OUT_RING(ring, hs_info->tess.tcs_vertices_out * vs->output_size / 4);
 
                OUT_PKT4(ring, REG_A6XX_SP_HS_UNKNOWN_A831, 1);