freedreno/ir3: Use output type size to set OUTPUT_REG_HALF_PRECISION

[mesa.git] / src / gallium / drivers / freedreno / a6xx / fd6_program.c

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_program.c b/src/gallium/drivers/freedreno/a6xx/fd6_program.c
index b90ad2e06e5b6c0bb2a4500dcd977b0aa703fd81..b73d2031ab3d1c9af3ef826977012519c74d55f0 100644 (file)
--- a/src/gallium/drivers/freedreno/a6xx/fd6_program.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_program.c
@@ -626,11 +626,8 @@ setup_stateobj(struct fd_ringbuffer *ring, struct fd6_program_state *state,
 
        OUT_PKT4(ring, REG_A6XX_SP_FS_OUTPUT_REG(0), 8);
        for (i = 0; i < 8; i++) {
-               // TODO we could have a mix of half and full precision outputs,
-               // we really need to figure out half-precision from IR3_REG_HALF
                OUT_RING(ring, A6XX_SP_FS_OUTPUT_REG_REGID(color_regid[i]) |
-                               COND(false,
-                                       A6XX_SP_FS_OUTPUT_REG_HALF_PRECISION));
+                               COND(s[FS].v->outputs[i].half, A6XX_SP_FS_OUTPUT_REG_HALF_PRECISION));
        }
 
        OUT_PKT4(ring, REG_A6XX_VPC_PACK, 1);