freedreno: switch to layout helper

[mesa.git] / src / gallium / drivers / freedreno / freedreno_resource.h

diff --git a/src/gallium/drivers/freedreno/freedreno_resource.h b/src/gallium/drivers/freedreno/freedreno_resource.h
index d019727bf31573b6ae997bb17eaf9333612d76d0..bc972297a3523b2bce1a9a17d3c5c8844ed0166f 100644 (file)
--- a/src/gallium/drivers/freedreno/freedreno_resource.h
+++ b/src/gallium/drivers/freedreno/freedreno_resource.h
@@ -38,11 +38,9 @@
 struct fd_resource {
        struct pipe_resource base;
        struct fd_bo *bo;
-       uint32_t cpp;
        enum pipe_format internal_format;
-       bool layer_first;        /* see above description */
-       uint32_t layer_size;
-       struct fdl_slice slices[MAX_MIP_LEVELS];
+       struct fdl_layout layout;
+
        /* buffer range that has been initialized */
        struct util_range valid_buffer_range;
        bool valid;
@@ -52,11 +50,6 @@ struct fd_resource {
        /* TODO rename to secondary or auxiliary? */
        struct fd_resource *stencil;
 
-       uint32_t offset;
-       uint32_t ubwc_offset;
-       uint32_t ubwc_pitch;
-       uint32_t ubwc_size;
-
        /* bitmask of in-flight batches which reference this resource.  Note
         * that the batch doesn't hold reference to resources (but instead
         * the fd_ringbuffer holds refs to the underlying fd_bo), but in case
@@ -78,10 +71,11 @@ struct fd_resource {
        /* Sequence # incremented each time bo changes: */
        uint16_t seqno;
 
-       unsigned tile_mode : 2;
-
        /*
         * LRZ
+        *
+        * TODO lrz width/height/pitch should probably also move to
+        * fdl_layout
         */
        bool lrz_valid : 1;
        uint16_t lrz_width;  // for lrz clear, does this differ from lrz_pitch?
@@ -96,6 +90,12 @@ fd_resource(struct pipe_resource *ptex)
        return (struct fd_resource *)ptex;
 }
 
+static inline const struct fd_resource *
+fd_resource_const(const struct pipe_resource *ptex)
+{
+       return (const struct fd_resource *)ptex;
+}
+
 static inline bool
 pending(struct fd_resource *rsc, bool write)
 {
@@ -129,40 +129,28 @@ static inline struct fdl_slice *
 fd_resource_slice(struct fd_resource *rsc, unsigned level)
 {
        assert(level <= rsc->base.last_level);
-       return &rsc->slices[level];
+       return &rsc->layout.slices[level];
 }
 
 static inline uint32_t
 fd_resource_layer_stride(struct fd_resource *rsc, unsigned level)
 {
-       if (rsc->layer_first)
-               return rsc->layer_size;
-       else
-               return fd_resource_slice(rsc, level)->size0;
+       return fdl_layer_stride(&rsc->layout, level);
 }
 
 /* get offset for specified mipmap level and texture/array layer */
 static inline uint32_t
 fd_resource_offset(struct fd_resource *rsc, unsigned level, unsigned layer)
 {
-       struct fdl_slice *slice = fd_resource_slice(rsc, level);
-       unsigned offset = slice->offset;
-       offset += fd_resource_layer_stride(rsc, level) * layer;
+       uint32_t offset = fdl_surface_offset(&rsc->layout, level, layer);
        debug_assert(offset < fd_bo_size(rsc->bo));
-       return offset + rsc->offset;
+       return offset;
 }
 
 static inline uint32_t
 fd_resource_ubwc_offset(struct fd_resource *rsc, unsigned level, unsigned layer)
 {
-       /* for now this doesn't do anything clever, but when UBWC is enabled
-        * for multi layer/level images, it will.
-        */
-       if (rsc->ubwc_size) {
-               debug_assert(level == 0);
-               debug_assert(layer == 0);
-       }
-       return rsc->ubwc_offset;
+       return fdl_ubwc_offset(&rsc->layout, level, layer);
 }
 
 /* This might be a5xx specific, but higher mipmap levels are always linear: */
@@ -172,26 +160,19 @@ fd_resource_level_linear(const struct pipe_resource *prsc, int level)
        struct fd_screen *screen = fd_screen(prsc->screen);
        debug_assert(!is_a3xx(screen));
 
-       unsigned w = u_minify(prsc->width0, level);
-       if (w < 16)
-               return true;
-       return false;
+       return fdl_level_linear(&fd_resource_const(prsc)->layout, level);
 }
 
 static inline uint32_t
 fd_resource_tile_mode(struct pipe_resource *prsc, int level)
 {
-       struct fd_resource *rsc = fd_resource(prsc);
-       if (rsc->tile_mode && fd_resource_level_linear(&rsc->base, level))
-               return 0; /* linear */
-       else
-               return rsc->tile_mode;
+       return fdl_tile_mode(&fd_resource(prsc)->layout, level);
 }
 
 static inline bool
 fd_resource_ubwc_enabled(struct fd_resource *rsc, int level)
 {
-       return rsc->ubwc_size && fd_resource_tile_mode(&rsc->base, level);
+       return fdl_ubwc_enabled(&rsc->layout, level);
 }
 
 /* access # of samples, with 0 normalized to 1 (which is what we care about